Forgot to check these changes in yesterday.
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Jeff Law
parent
7d1257bb57
commit
f6061456e0
187
bfd/libhppa.h
187
bfd/libhppa.h
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@ -123,6 +123,22 @@ enum hppa_reloc_expr_type_alt
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};
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/* Relocations for function calls must be accompanied by parameter
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relocation bits. These bits describe exactly where the caller has
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placed the function's arguments and where it expects to find a return
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value.
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Both ELF and SOM encode this information within the addend field
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of the call relocation. (Note this could break very badly if one
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was to make a call like bl foo + 0x12345678).
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The high order 10 bits contain parameter relocation information,
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the low order 22 bits contain the constant offset. */
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#define HPPA_R_ARG_RELOC(a) (((a) >> 22) & 0x3FF)
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#define HPPA_R_CONSTANT(a) ((((int)(a)) << 10) >> 10)
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#define HPPA_R_ADDEND(r,c) (((r) << 22) + ((c) & 0x3FFFFF))
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/* Some functions to manipulate PA instructions. */
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static INLINE unsigned int
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assemble_3 (x)
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@ -291,7 +307,6 @@ hppa_field_adjust (value, constant_value, r_field)
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unsigned long constant_value;
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unsigned short r_field;
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{
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unsigned long init_value = value;
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value += constant_value;
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switch (r_field)
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{
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@ -346,4 +361,174 @@ hppa_field_adjust (value, constant_value, r_field)
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return value;
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}
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/* PA-RISC OPCODES */
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#define get_opcode(insn) ((insn) & 0xfc000000) >> 26
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/* FIXME: this list is incomplete. It should also be an enumerated
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type rather than #defines. */
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#define LDO 0x0d
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#define LDB 0x10
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#define LDH 0x11
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#define LDW 0x12
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#define LDWM 0x13
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#define STB 0x18
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#define STH 0x19
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#define STW 0x1a
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#define STWM 0x1b
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#define COMICLR 0x24
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#define SUBI 0x25
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#define SUBIO 0x25
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#define ADDIT 0x2c
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#define ADDITO 0x2c
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#define ADDI 0x2d
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#define ADDIO 0x2d
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#define LDIL 0x08
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#define ADDIL 0x0a
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#define MOVB 0x32
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#define MOVIB 0x33
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#define COMBT 0x20
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#define COMBF 0x22
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#define COMIBT 0x21
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#define COMIBF 0x23
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#define ADDBT 0x28
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#define ADDBF 0x2a
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#define ADDIBT 0x29
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#define ADDIBF 0x2b
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#define BVB 0x30
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#define BB 0x31
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#define BL 0x3a
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#define BLE 0x39
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#define BE 0x38
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/* Given a machine instruction, return its format.
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FIXME: opcodes which do not map to a known format
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should return an error of some sort. */
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static char
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bfd_hppa_insn2fmt (insn)
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unsigned long insn;
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{
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char fmt = -1;
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unsigned char op = get_opcode (insn);
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switch (op)
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{
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case ADDI:
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case ADDIT:
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case SUBI:
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fmt = 11;
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break;
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case MOVB:
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case MOVIB:
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case COMBT:
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case COMBF:
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case COMIBT:
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case COMIBF:
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case ADDBT:
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case ADDBF:
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case ADDIBT:
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case ADDIBF:
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case BVB:
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case BB:
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fmt = 12;
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break;
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case LDO:
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case LDB:
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case LDH:
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case LDW:
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case LDWM:
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case STB:
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case STH:
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case STW:
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case STWM:
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fmt = 14;
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break;
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case BL:
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case BE:
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case BLE:
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fmt = 17;
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break;
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case LDIL:
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case ADDIL:
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fmt = 21;
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break;
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default:
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fmt = 32;
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break;
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}
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return fmt;
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}
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/* Insert VALUE into INSN using R_FORMAT to determine exactly what
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bits to change. */
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static unsigned long
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hppa_rebuild_insn (abfd, insn, value, r_format)
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bfd *abfd;
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unsigned long insn;
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unsigned long value;
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unsigned long r_format;
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{
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unsigned long const_part;
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unsigned long rebuilt_part;
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switch (r_format)
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{
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case 11:
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{
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unsigned w1, w;
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const_part = insn & 0xffffe002;
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dis_assemble_12 (value, &w1, &w);
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rebuilt_part = (w1 << 2) | w;
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return const_part | rebuilt_part;
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}
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case 12:
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{
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unsigned w1, w;
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const_part = insn & 0xffffe002;
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dis_assemble_12 (value, &w1, &w);
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rebuilt_part = (w1 << 2) | w;
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return const_part | rebuilt_part;
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}
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case 14:
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const_part = insn & 0xffffc000;
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low_sign_unext (value, 14, &rebuilt_part);
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return const_part | rebuilt_part;
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case 17:
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{
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unsigned w1, w2, w;
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const_part = insn & 0xffe0e002;
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dis_assemble_17 (value, &w1, &w2, &w);
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rebuilt_part = (w2 << 2) | (w1 << 16) | w;
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return const_part | rebuilt_part;
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}
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case 21:
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const_part = insn & 0xffe00000;
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dis_assemble_21 (value, &rebuilt_part);
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return const_part | rebuilt_part;
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case 32:
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const_part = 0;
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return value;
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default:
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abort ();
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}
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return insn;
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}
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#endif /* _HPPA_H */
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