RISC-V: Fix riscv g++ testsuite EH failures.
This fixes some EH failures for the medany code model in the g++ testsuite. The problem is that the assembler is computing some values in the eh_frame section as constants, that instead should have had relocs to be resolved by the linker. This happens in output_cfi_insn in the DW_CFA_advance_loc case where it compares label frags and immediately simplifies if they are the same. We can fix that by forcing a new frag after every instruction that the linker can reduce in size. I've also added a testcase to verify the fix. This was tested with binutils make check, and gcc/g++ make checks on qemu for medlow and medany code models. gas/ * config/tc-riscv.c (append_insn): Call frag_wane and frag_new at end for linker optimizable relocs. * testsuite/gas/riscv/eh-relocs.d: New. * testsuite/gas/riscv/eh-relocs.s: New. * testsuite/gas/riscv/riscv.exp: Run eh-relocs test.
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@ -1,3 +1,11 @@
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2017-11-07 Jim Wilson <jimw@sifive.com>
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* config/tc-riscv.c (append_insn): Call frag_wane and frag_new at
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end for linker optimizable relocs.
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* testsuite/gas/riscv/eh-relocs.d: New.
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* testsuite/gas/riscv/eh-relocs.s: New.
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* testsuite/gas/riscv/riscv.exp: Run eh-relocs test.
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2017-11-07 Palmer Dabbelt <palmer@dabbelt.com>
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* testsuite/gas/riscv/satp.d: New test.
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@ -716,6 +716,21 @@ append_insn (struct riscv_cl_insn *ip, expressionS *address_expr,
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add_fixed_insn (ip);
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install_insn (ip);
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/* We need to start a new frag after any instruction that can be
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optimized away or compressed by the linker during relaxation, to prevent
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the assembler from computing static offsets across such an instruction.
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This is necessary to get correct EH info. */
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if (reloc_type == BFD_RELOC_RISCV_CALL
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|| reloc_type == BFD_RELOC_RISCV_CALL_PLT
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|| reloc_type == BFD_RELOC_RISCV_HI20
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|| reloc_type == BFD_RELOC_RISCV_PCREL_HI20
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|| reloc_type == BFD_RELOC_RISCV_TPREL_HI20
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|| reloc_type == BFD_RELOC_RISCV_TPREL_ADD)
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{
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frag_wane (frag_now);
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frag_new (0);
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}
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}
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/* Build an instruction created by a macro expansion. This is passed
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@ -0,0 +1,12 @@
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#as:
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#objdump: --section=.eh_frame -r
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.*:[ ]+file format .*
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RELOCATION RECORDS FOR .*
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.*
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0+1c R_RISCV_32_PCREL.*
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0+20 R_RISCV_ADD32.*
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0+20 R_RISCV_SUB32.*
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0+25 R_RISCV_SET6.*
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0+25 R_RISCV_SUB6.*
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@ -0,0 +1,11 @@
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.text
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.align 2
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.globl _func1
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.type _func1, @function
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_func1:
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.cfi_startproc
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lla a1,_func2
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add sp,sp,-16
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.cfi_def_cfa_offset 16
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.cfi_endproc
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.size _func1, .-_func1
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@ -25,4 +25,5 @@ if [istarget riscv*-*-*] {
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run_dump_test "c-addi4spn-fail"
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run_dump_test "c-addi16sp-fail"
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run_dump_test "satp"
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run_dump_test "eh-relocs"
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}
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