* infrun.c (wait_for_inferior): Mark registers as invalid when
stepping over an instruction that triggered a watchpoint. * remote-mips.c: Numerous changes to support hardware breakpoints and watchpoints on LSI MiniRISC and TinyRISC boards. * mips-tdep.c: Move MIPS16-related macros to config/mips/tm-mips.h. (mips_breakpoint_from_pc): Account for different breakpoint instructions used by PMON and IDT monitor. * config/mips/tm-embed.h: Enable hardware breakpoints on embedded MIPS targets. * config/mips/tm-mips.h: Define breakpoint instructions for PMON and IDT monitor. Move MIPS16-related macros here from mips-tdep.c.
This commit is contained in:
Mark Alexander
parent
77f3ac77b5
commit
f781fe93a6
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@ -1,3 +1,18 @@
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Mon Jun 16 18:38:28 1997 Mark Alexander <marka@cygnus.com>
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* infrun.c (wait_for_inferior): Mark registers as invalid when
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stepping over an instruction that triggered a watchpoint.
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* remote-mips.c: Numerous changes to support hardware breakpoints
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and watchpoints on LSI MiniRISC and TinyRISC boards.
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* mips-tdep.c: Move MIPS16-related macros to config/mips/tm-mips.h.
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(mips_breakpoint_from_pc): Account for different breakpoint
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instructions used by PMON and IDT monitor.
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* config/mips/tm-embed.h: Enable hardware breakpoints on embedded
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MIPS targets.
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* config/mips/tm-mips.h: Define breakpoint instructions for
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PMON and IDT monitor. Move MIPS16-related macros here from
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mips-tdep.c.
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Fri Jun 13 13:44:47 1997 Michael Snyder (msnyder@cleaver.cygnus.com)
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* config/mips/tm-tx39[l].h, tx39[l].mt: change r3900 target to tx39.
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@ -23,6 +23,27 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#undef DEFAULT_MIPS_TYPE
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#define DEFAULT_MIPS_TYPE "r3051"
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/* Watchpoint support */
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#define TARGET_HAS_HARDWARE_WATCHPOINTS
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/* Use these macros for watchpoint insertion/deletion. */
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/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
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#define target_insert_watchpoint(addr, len, type) \
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remote_mips_set_watchpoint (addr, len, type)
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int remote_mips_set_watchpoint PARAMS ((CORE_ADDR addr, int len, int type));
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#define target_remove_watchpoint(addr, len, type) \
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remote_mips_remove_watchpoint (addr, len, type)
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int remote_mips_remove_watchpoint PARAMS ((CORE_ADDR addr, int len, int type));
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/* We need to remove watchpoints when stepping, else we hit them again! */
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#define HAVE_NONSTEPPABLE_WATCHPOINT
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#define STOPPED_BY_WATCHPOINT(w) remote_mips_stopped_by_watchpoint ()
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/* start-sanitize-gm */
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#ifdef GENERAL_MAGIC
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@ -32,29 +53,18 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#undef GET_LONGJMP_TARGET
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/* Watchpoint support */
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#define TARGET_HAS_HARDWARE_WATCHPOINTS
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#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
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(1 == 1) /* We allow all types of hardware watchpoints */
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/* Use these macros for watchpoint insertion/deletion. */
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/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
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#define target_insert_watchpoint(addr, len, type) \
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remote_mips_set_watchpoint (addr, len, type)
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#define target_remove_watchpoint(addr, len, type) \
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remote_mips_remove_watchpoint (addr, len, type)
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/* We need to remove watchpoints when stepping, else we hit them again! */
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#define HAVE_NONSTEPPABLE_WATCHPOINT
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#define STOPPED_BY_WATCHPOINT(w) remote_mips_stopped_by_watchpoint ()
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#define FLUSH_CACHED_MEMORY() flush_cached_memory()
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#else
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/* end-sanitize-gm */
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#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
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remote_mips_can_use_hardware_watchpoint(cnt)
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int remote_mips_can_use_hardware_watchpoint PARAMS ((int cnt));
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/* start-sanitize-gm */
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#endif /* GENERAL_MAGIC */
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/* end-sanitize-gm */
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@ -115,10 +115,16 @@ extern int in_sigtramp PARAMS ((CORE_ADDR, char *));
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#define BIG_ENDIAN 4321
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/* Old-style breakpoint macros. */
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/* Old-style breakpoint macros.
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The IDT board uses an unusual breakpoint value, and sometimes gets
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confused when it sees the usual MIPS breakpoint instruction. */
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#define BIG_BREAKPOINT {0, 0x5, 0, 0xd}
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#define LITTLE_BREAKPOINT {0xd, 0, 0x5, 0}
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#define PMON_BIG_BREAKPOINT {0, 0, 0, 0xd}
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#define PMON_LITTLE_BREAKPOINT {0xd, 0, 0, 0}
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#define IDT_BIG_BREAKPOINT {0, 0, 0x0a, 0xd}
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#define IDT_LITTLE_BREAKPOINT {0xd, 0x0a, 0, 0}
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#define MIPS16_BIG_BREAKPOINT {0xe8, 0xa5}
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#define MIPS16_LITTLE_BREAKPOINT {0xa5, 0xe8}
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@ -519,4 +525,16 @@ extern int mips_ignore_helper PARAMS ((CORE_ADDR pc));
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#define TARGET_MIPS
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#endif
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/* Definitions and declarations used by mips-tdep.c and remote-mips.c */
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#define MIPS_INSTLEN 4 /* Length of an instruction */
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#define MIPS16_INSTLEN 2 /* Length of an instruction on MIPS16*/
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#define MIPS_NUMREGS 32 /* Number of integer or float registers */
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typedef unsigned long t_inst; /* Integer big enough to hold an instruction */
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/* MIPS16 function addresses are odd (bit 0 is set). Here are some
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macros to test, set, or clear bit 0 of addresses. */
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#define IS_MIPS16_ADDR(addr) ((addr) & 1)
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#define MAKE_MIPS16_ADDR(addr) ((addr) | 1)
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#define UNMAKE_MIPS16_ADDR(addr) ((addr) & ~1)
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#endif /* TM_MIPS_H */
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312
gdb/mips-tdep.c
312
gdb/mips-tdep.c
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@ -41,18 +41,6 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* FIXME: Put this declaration in frame.h. */
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extern struct obstack frame_cache_obstack;
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/* FIXME! this code assumes 4-byte instructions. */
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#define MIPS_INSTLEN 4 /* Length of an instruction */
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#define MIPS16_INSTLEN 2 /* Length of an instruction on MIPS16*/
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#define MIPS_NUMREGS 32 /* Number of integer or float registers */
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typedef unsigned long t_inst; /* Integer big enough to hold an instruction */
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/* MIPS16 function addresses are odd (bit 0 is set). Here are some
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macros to test, set, or clear bit 0 of addresses. */
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#define IS_MIPS16_ADDR(addr) ((addr) & 1)
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#define MAKE_MIPS16_ADDR(addr) ((addr) | 1)
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#define UNMAKE_MIPS16_ADDR(addr) ((addr) & ~1)
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#if 0
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static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR));
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#endif
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@ -545,9 +533,9 @@ mips_addr_bits_remove (addr)
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{
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#if GDB_TARGET_IS_MIPS64
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if ((addr >> 32 == (CORE_ADDR)0xffffffff)
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&& (strcmp(target_shortname,"pmon")==0
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|| strcmp(target_shortname,"ddb")==0
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|| strcmp(target_shortname,"sim")==0))
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&& (strcmp (target_shortname,"pmon")==0
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|| strcmp (target_shortname,"ddb")==0
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|| strcmp (target_shortname,"sim")==0))
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{
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/* This hack is a work-around for existing boards using PMON,
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the simulator, and any other 64-bit targets that doesn't have
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@ -574,6 +562,20 @@ mips_addr_bits_remove (addr)
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return addr;
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}
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void
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mips_init_frame_pc_first (fromleaf, prev)
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int fromleaf;
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struct frame_info *prev;
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{
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CORE_ADDR pc, tmp;
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pc = ((fromleaf) ? SAVED_PC_AFTER_CALL (prev->next) :
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prev->next ? FRAME_SAVED_PC (prev->next) : read_pc ());
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tmp = mips_skip_stub (pc);
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prev->pc = tmp ? tmp : pc;
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}
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CORE_ADDR
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mips_frame_saved_pc(frame)
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struct frame_info *frame;
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@ -637,7 +639,7 @@ heuristic_proc_start(pc)
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else
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warning("Hit heuristic-fence-post without finding");
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warning("enclosing function for address 0x%s", paddr (pc));
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warning("enclosing function for address 0x%s", paddr_nz (pc));
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if (!blurb_printed)
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{
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printf_filtered ("\
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@ -1096,29 +1098,36 @@ CORE_ADDR
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mips_frame_chain(frame)
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struct frame_info *frame;
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{
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mips_extra_func_info_t proc_desc;
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CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
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mips_extra_func_info_t proc_desc;
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CORE_ADDR tmp;
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CORE_ADDR saved_pc = FRAME_SAVED_PC(frame);
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if (saved_pc == 0 || inside_entry_file (saved_pc))
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return 0;
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if (saved_pc == 0 || inside_entry_file (saved_pc))
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return 0;
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proc_desc = find_proc_desc(saved_pc, frame);
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if (!proc_desc)
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return 0;
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/* Check if the PC is inside a call stub. If it is, fetch the
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PC of the caller of that stub. */
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if ((tmp = mips_skip_stub (saved_pc)) != 0)
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saved_pc = tmp;
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cached_proc_desc = proc_desc;
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/* Look up the procedure descriptor for this PC. */
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proc_desc = find_proc_desc(saved_pc, frame);
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if (!proc_desc)
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return 0;
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/* If no frame pointer and frame size is zero, we must be at end
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of stack (or otherwise hosed). If we don't check frame size,
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we loop forever if we see a zero size frame. */
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if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
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&& PROC_FRAME_OFFSET (proc_desc) == 0
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/* The previous frame from a sigtramp frame might be frameless
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and have frame size zero. */
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&& !frame->signal_handler_caller)
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return 0;
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else
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return get_frame_pointer (frame, proc_desc);
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cached_proc_desc = proc_desc;
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/* If no frame pointer and frame size is zero, we must be at end
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of stack (or otherwise hosed). If we don't check frame size,
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we loop forever if we see a zero size frame. */
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if (PROC_FRAME_REG (proc_desc) == SP_REGNUM
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&& PROC_FRAME_OFFSET (proc_desc) == 0
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/* The previous frame from a sigtramp frame might be frameless
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and have frame size zero. */
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&& !frame->signal_handler_caller)
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return 0;
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else
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return get_frame_pointer (frame, proc_desc);
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}
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void
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@ -1540,12 +1549,11 @@ mips_print_register (regnum, all)
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if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+MIPS_NUMREGS
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&& !((regnum-FP0_REGNUM) & 1))
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{
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char dbuffer[MAX_REGISTER_RAW_SIZE];
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char dbuffer[2 * MAX_REGISTER_RAW_SIZE];
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/* MIPS doubles are stored in a register pair with the least
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signficant register in the lower-numbered register. */
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read_relative_register_raw_bytes (regnum+1, dbuffer);
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read_relative_register_raw_bytes (regnum, dbuffer+MIPS_REGSIZE);
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read_relative_register_raw_bytes (regnum, dbuffer);
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read_relative_register_raw_bytes (regnum+1, dbuffer+MIPS_REGSIZE);
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REGISTER_CONVERT_TO_TYPE (regnum, builtin_type_double, dbuffer);
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printf_filtered ("(d%d: ", regnum-FP0_REGNUM);
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val_print (builtin_type_double, dbuffer, 0,
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@ -1901,19 +1909,7 @@ mips_extract_return_value (valtype, regbuf, valbuf)
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if (TYPE_CODE (valtype) == TYPE_CODE_FLT
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&& (mips_fpu == MIPS_FPU_DOUBLE
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|| (mips_fpu == MIPS_FPU_SINGLE && len <= MIPS_REGSIZE)))
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{
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regnum = FP0_REGNUM;
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/* If this is a double, the odd-numbered register (FP1) contains the
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high word of the result. Copy that to the buffer before
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copying the low word in FP0. */
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if (len > MIPS_REGSIZE)
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{
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memcpy (valbuf, regbuf + REGISTER_BYTE (regnum+1), MIPS_REGSIZE);
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len -= MIPS_REGSIZE;
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valbuf += MIPS_REGSIZE;
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}
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}
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regnum = FP0_REGNUM;
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if (TARGET_BYTE_ORDER == BIG_ENDIAN
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&& TYPE_CODE (valtype) != TYPE_CODE_FLT
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@ -1921,6 +1917,7 @@ mips_extract_return_value (valtype, regbuf, valbuf)
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offset = REGISTER_RAW_SIZE (regnum) - len;
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memcpy (valbuf, regbuf + REGISTER_BYTE (regnum) + offset, len);
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REGISTER_CONVERT_TO_TYPE (regnum, valtype, valbuf);
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}
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/* Given a return value in `regbuf' with a type `valtype',
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@ -1940,10 +1937,7 @@ mips_store_return_value (valtype, valbuf)
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regnum = FP0_REGNUM;
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memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype));
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#ifdef REGISTER_CONVERT_FROM_TYPE
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REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer);
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#endif
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write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype));
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}
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@ -2173,8 +2167,19 @@ unsigned char *mips_breakpoint_from_pc (pcptr, lenptr)
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else
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{
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static char big_breakpoint[] = BIG_BREAKPOINT;
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static char pmon_big_breakpoint[] = PMON_BIG_BREAKPOINT;
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static char idt_big_breakpoint[] = IDT_BIG_BREAKPOINT;
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*lenptr = sizeof(big_breakpoint);
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return big_breakpoint;
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if (strcmp (target_shortname, "mips") == 0)
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return idt_big_breakpoint;
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else if (strcmp (target_shortname, "ddb") == 0
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|| strcmp (target_shortname, "pmon") == 0
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|| strcmp (target_shortname, "lsi") == 0)
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return pmon_big_breakpoint;
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else
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return big_breakpoint;
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}
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}
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else
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@ -2189,8 +2194,19 @@ unsigned char *mips_breakpoint_from_pc (pcptr, lenptr)
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else
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{
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static char little_breakpoint[] = LITTLE_BREAKPOINT;
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static char pmon_little_breakpoint[] = PMON_LITTLE_BREAKPOINT;
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static char idt_little_breakpoint[] = IDT_LITTLE_BREAKPOINT;
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*lenptr = sizeof(little_breakpoint);
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return little_breakpoint;
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if (strcmp (target_shortname, "mips") == 0)
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return idt_little_breakpoint;
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else if (strcmp (target_shortname, "ddb") == 0
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|| strcmp (target_shortname, "pmon") == 0
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|| strcmp (target_shortname, "lsi") == 0)
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return pmon_little_breakpoint;
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else
|
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return little_breakpoint;
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}
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}
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}
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@ -2215,6 +2231,186 @@ mips_about_to_return (pc)
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}
|
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|
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/* If PC is in a mips16 call or return stub, return the address of the target
|
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PC, which is either the callee or the caller. There are several
|
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cases which must be handled:
|
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|
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* If the PC is in __mips16_ret_{d,s}f, this is a return stub and the
|
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target PC is in $31 ($ra).
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* If the PC is in __mips16_call_stub_{1..10}, this is a call stub
|
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and the target PC is in $2.
|
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* If the PC at the start of __mips16_call_stub_{s,d}f_{0..10}, i.e.
|
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before the jal instruction, this is effectively a call stub
|
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and the the target PC is in $2. Otherwise this is effectively
|
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a return stub and the target PC is in $18.
|
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|
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See the source code for the stubs in gcc/config/mips/mips16.S for
|
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gory details.
|
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|
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This function implements the SKIP_TRAMPOLINE_CODE macro.
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*/
|
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|
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CORE_ADDR
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mips_skip_stub (pc)
|
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CORE_ADDR pc;
|
||||
{
|
||||
char *name;
|
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CORE_ADDR start_addr;
|
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|
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/* Find the starting address and name of the function containing the PC. */
|
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if (find_pc_partial_function (pc, &name, &start_addr, NULL) == 0)
|
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return 0;
|
||||
|
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/* If the PC is in __mips16_ret_{d,s}f, this is a return stub and the
|
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target PC is in $31 ($ra). */
|
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if (strcmp (name, "__mips16_ret_sf") == 0
|
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|| strcmp (name, "__mips16_ret_df") == 0)
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return read_register (RA_REGNUM);
|
||||
|
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if (strncmp (name, "__mips16_call_stub_", 19) == 0)
|
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{
|
||||
/* If the PC is in __mips16_call_stub_{1..10}, this is a call stub
|
||||
and the target PC is in $2. */
|
||||
if (name[19] >= '0' && name[19] <= '9')
|
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return read_register (2);
|
||||
|
||||
/* If the PC at the start of __mips16_call_stub_{s,d}f_{0..10}, i.e.
|
||||
before the jal instruction, this is effectively a call stub
|
||||
and the the target PC is in $2. Otherwise this is effectively
|
||||
a return stub and the target PC is in $18. */
|
||||
else if (name[19] == 's' || name[19] == 'd')
|
||||
{
|
||||
if (pc == start_addr)
|
||||
{
|
||||
/* Check if the target of the stub is a compiler-generated
|
||||
stub. Such a stub for a function bar might have a name
|
||||
like __fn_stub_bar, and might look like this:
|
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mfc1 $4,$f13
|
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mfc1 $5,$f12
|
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mfc1 $6,$f15
|
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mfc1 $7,$f14
|
||||
la $1,bar (becomes a lui/addiu pair)
|
||||
jr $1
|
||||
So scan down to the lui/addi and extract the target
|
||||
address from those two instructions. */
|
||||
|
||||
CORE_ADDR target_pc = read_register (2);
|
||||
t_inst inst;
|
||||
int i;
|
||||
|
||||
/* See if the name of the target function is __fn_stub_*. */
|
||||
if (find_pc_partial_function (target_pc, &name, NULL, NULL) == 0)
|
||||
return target_pc;
|
||||
if (strncmp (name, "__fn_stub_", 10) != 0
|
||||
&& strcmp (name, "etext") != 0
|
||||
&& strcmp (name, "_etext") != 0)
|
||||
return target_pc;
|
||||
|
||||
/* Scan through this _fn_stub_ code for the lui/addiu pair.
|
||||
The limit on the search is arbitrarily set to 20
|
||||
instructions. FIXME. */
|
||||
for (i = 0, pc = 0; i < 20; i++, target_pc += MIPS_INSTLEN)
|
||||
{
|
||||
inst = mips_fetch_instruction (target_pc);
|
||||
if ((inst & 0xffff0000) == 0x3c010000) /* lui $at */
|
||||
pc = (inst << 16) & 0xffff0000; /* high word */
|
||||
else if ((inst & 0xffff0000) == 0x24210000) /* addiu $at */
|
||||
return pc | (inst & 0xffff); /* low word */
|
||||
}
|
||||
|
||||
/* Couldn't find the lui/addui pair, so return stub address. */
|
||||
return target_pc;
|
||||
}
|
||||
else
|
||||
/* This is the 'return' part of a call stub. The return
|
||||
address is in $r18. */
|
||||
return read_register (18);
|
||||
}
|
||||
}
|
||||
return 0; /* not a stub */
|
||||
}
|
||||
|
||||
|
||||
/* Return non-zero if the PC is inside a call thunk (aka stub or trampoline).
|
||||
This implements the IN_SOLIB_CALL_TRAMPOLINE macro. */
|
||||
|
||||
int
|
||||
mips_in_call_stub (pc, name)
|
||||
CORE_ADDR pc;
|
||||
char *name;
|
||||
{
|
||||
CORE_ADDR start_addr;
|
||||
|
||||
/* Find the starting address of the function containing the PC. If the
|
||||
caller didn't give us a name, look it up at the same time. */
|
||||
if (find_pc_partial_function (pc, name ? NULL : &name, &start_addr, NULL) == 0)
|
||||
return 0;
|
||||
|
||||
if (strncmp (name, "__mips16_call_stub_", 19) == 0)
|
||||
{
|
||||
/* If the PC is in __mips16_call_stub_{1..10}, this is a call stub. */
|
||||
if (name[19] >= '0' && name[19] <= '9')
|
||||
return 1;
|
||||
/* If the PC at the start of __mips16_call_stub_{s,d}f_{0..10}, i.e.
|
||||
before the jal instruction, this is effectively a call stub. */
|
||||
else if (name[19] == 's' || name[19] == 'd')
|
||||
return pc == start_addr;
|
||||
}
|
||||
|
||||
return 0; /* not a stub */
|
||||
}
|
||||
|
||||
|
||||
/* Return non-zero if the PC is inside a return thunk (aka stub or trampoline).
|
||||
This implements the IN_SOLIB_RETURN_TRAMPOLINE macro. */
|
||||
|
||||
int
|
||||
mips_in_return_stub (pc, name)
|
||||
CORE_ADDR pc;
|
||||
char *name;
|
||||
{
|
||||
CORE_ADDR start_addr;
|
||||
|
||||
/* Find the starting address of the function containing the PC. */
|
||||
if (find_pc_partial_function (pc, NULL, &start_addr, NULL) == 0)
|
||||
return 0;
|
||||
|
||||
/* If the PC is in __mips16_ret_{d,s}f, this is a return stub. */
|
||||
if (strcmp (name, "__mips16_ret_sf") == 0
|
||||
|| strcmp (name, "__mips16_ret_df") == 0)
|
||||
return 1;
|
||||
|
||||
/* If the PC is in __mips16_call_stub_{s,d}f_{0..10} but not at the start,
|
||||
i.e. after the jal instruction, this is effectively a return stub. */
|
||||
if (strncmp (name, "__mips16_call_stub_", 19) == 0
|
||||
&& (name[19] == 's' || name[19] == 'd')
|
||||
&& pc != start_addr)
|
||||
return 1;
|
||||
|
||||
return 0; /* not a stub */
|
||||
}
|
||||
|
||||
|
||||
/* Return non-zero if the PC is in a library helper function that should
|
||||
be ignored. This implements the IGNORE_HELPER_CALL macro. */
|
||||
|
||||
int
|
||||
mips_ignore_helper (pc)
|
||||
CORE_ADDR pc;
|
||||
{
|
||||
char *name;
|
||||
|
||||
/* Find the starting address and name of the function containing the PC. */
|
||||
if (find_pc_partial_function (pc, &name, NULL, NULL) == 0)
|
||||
return 0;
|
||||
|
||||
/* If the PC is in __mips16_ret_{d,s}f, this is a library helper function
|
||||
that we want to ignore. */
|
||||
return (strcmp (name, "__mips16_ret_sf") == 0
|
||||
|| strcmp (name, "__mips16_ret_df") == 0);
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
_initialize_mips_tdep ()
|
||||
{
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
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Reference in New Issue