PowerPC VLE sh_flags and p_flags
ELF section sh_flags SHF_PPC_VLE was being set based on arch/mach, which meant all code sections in an object file has the flag or all lacked it. We can do better than that. Only those code sections where VLE is enabled ought to have the flag, allowing an object file to contain both VLE and non-VLE code. Also, ELF header p_flags PF_PPC_VLE wasn't being set, and segments were being split unnecessarily. bfd/ * elf32-ppc.c (ppc_elf_section_processing): Delete. (elf_backend_section_processing): Don't define. (ppc_elf_modify_segment_map): Set p_flags and mark valid. Don't split on non-exec sections differing in SHF_PPC_VLE. When splitting segments, mark size invalid. gas/ * config/tc-ppc.c (md_assemble): Set sh_flags for VLE. Test ppc_cpu rather than calling ppc_mach to determine VLE mode. (ppc_frag_check, ppc_handle_align): Likewise use ppc_cpu.
This commit is contained in:
Alan Modra
parent
afe002dd66
commit
f7d69005fb
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@ -1,3 +1,11 @@
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2016-08-31 Alan Modra <amodra@gmail.com>
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* elf32-ppc.c (ppc_elf_section_processing): Delete.
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(elf_backend_section_processing): Don't define.
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(ppc_elf_modify_segment_map): Set p_flags and mark valid. Don't
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split on non-exec sections differing in SHF_PPC_VLE. When
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splitting segments, mark size invalid.
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2016-08-30 Alan Modra <amodra@gmail.com>
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PR 20531
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@ -2444,18 +2444,6 @@ ppc_elf_lookup_section_flags (char *flag_name)
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return 0;
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}
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/* Add the VLE flag if required. */
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bfd_boolean
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ppc_elf_section_processing (bfd *abfd, Elf_Internal_Shdr *shdr)
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{
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if (bfd_get_mach (abfd) == bfd_mach_ppc_vle
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&& (shdr->sh_flags & SHF_EXECINSTR) != 0)
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shdr->sh_flags |= SHF_PPC_VLE;
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return TRUE;
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}
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/* Return address for Ith PLT stub in section PLT, for relocation REL
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or (bfd_vma) -1 if it should not be included. */
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@ -2535,10 +2523,7 @@ bfd_boolean
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ppc_elf_modify_segment_map (bfd *abfd,
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struct bfd_link_info *info ATTRIBUTE_UNUSED)
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{
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struct elf_segment_map *m, *n;
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bfd_size_type amt;
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unsigned int j, k;
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bfd_boolean sect0_vle, sectj_vle;
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struct elf_segment_map *m;
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/* At this point in the link, output sections have already been sorted by
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LMA and assigned to segments. All that is left to do is to ensure
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@ -2548,25 +2533,59 @@ ppc_elf_modify_segment_map (bfd *abfd,
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for (m = elf_seg_map (abfd); m != NULL; m = m->next)
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{
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if (m->count == 0)
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struct elf_segment_map *n;
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bfd_size_type amt;
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unsigned int j, k;
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unsigned int p_flags;
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if (m->p_type != PT_LOAD || m->count == 0)
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continue;
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sect0_vle = (elf_section_flags (m->sections[0]) & SHF_PPC_VLE) != 0;
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for (j = 1; j < m->count; ++j)
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for (p_flags = PF_R, j = 0; j != m->count; ++j)
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{
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sectj_vle = (elf_section_flags (m->sections[j]) & SHF_PPC_VLE) != 0;
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if ((m->sections[j]->flags & SEC_READONLY) == 0)
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p_flags |= PF_W;
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if ((m->sections[j]->flags & SEC_CODE) != 0)
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{
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p_flags |= PF_X;
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if ((elf_section_flags (m->sections[j]) & SHF_PPC_VLE) != 0)
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p_flags |= PF_PPC_VLE;
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break;
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}
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}
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if (j != m->count)
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while (++j != m->count)
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{
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unsigned int p_flags1 = PF_R;
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if (sectj_vle != sect0_vle)
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break;
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}
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if (j >= m->count)
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if ((m->sections[j]->flags & SEC_READONLY) == 0)
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p_flags1 |= PF_W;
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if ((m->sections[j]->flags & SEC_CODE) != 0)
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{
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p_flags1 |= PF_X;
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if ((elf_section_flags (m->sections[j]) & SHF_PPC_VLE) != 0)
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p_flags1 |= PF_PPC_VLE;
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if (((p_flags1 ^ p_flags) & PF_PPC_VLE) != 0)
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break;
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}
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p_flags |= p_flags1;
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}
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/* If we're splitting a segment which originally contained rw
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sections then those sections might now only be in one of the
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two parts. So always set p_flags if splitting, even if we
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are being called for objcopy with p_flags_valid set. */
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if (j != m->count || !m->p_flags_valid)
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{
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m->p_flags_valid = 1;
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m->p_flags = p_flags;
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}
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if (j == m->count)
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continue;
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/* sections 0..j-1 stay in this (current) segment,
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/* Sections 0..j-1 stay in this (current) segment,
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the remainder are put in a new segment.
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The scan resumes with the new segment. */
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/* Fix the new segment. */
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amt = sizeof (struct elf_segment_map);
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amt += (m->count - j - 1) * sizeof (asection *);
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n = (struct elf_segment_map *) bfd_zalloc (abfd, amt);
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@ -2574,20 +2593,13 @@ ppc_elf_modify_segment_map (bfd *abfd,
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return FALSE;
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n->p_type = PT_LOAD;
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n->p_flags = PF_X | PF_R;
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if (sectj_vle)
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n->p_flags |= PF_PPC_VLE;
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n->count = m->count - j;
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for (k = 0; k < n->count; ++k)
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{
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n->sections[k] = m->sections[j+k];
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m->sections[j+k] = NULL;
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}
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n->sections[k] = m->sections[j + k];
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m->count = j;
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m->p_size_valid = 0;
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n->next = m->next;
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m->next = n;
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/* Fix the current segment */
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m->count = j;
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}
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return TRUE;
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@ -10860,7 +10872,6 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd,
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#define elf_backend_action_discarded ppc_elf_action_discarded
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#define elf_backend_init_index_section _bfd_elf_init_1_index_section
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#define elf_backend_lookup_section_flags_hook ppc_elf_lookup_section_flags
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#define elf_backend_section_processing ppc_elf_section_processing
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#include "elf32-target.h"
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@ -1,3 +1,9 @@
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2016-08-31 Alan Modra <amodra@gmail.com>
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* config/tc-ppc.c (md_assemble): Set sh_flags for VLE. Test
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ppc_cpu rather than calling ppc_mach to determine VLE mode.
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(ppc_frag_check, ppc_handle_align): Likewise use ppc_cpu.
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2016-08-26 Jose E. Marchesi <jose.marchesi@oracle.com>
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* testsuite/gas/sparc/crypto.d: Rename invalid opcode camellia_fi
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@ -3377,13 +3377,17 @@ md_assemble (char *str)
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however it'll remain clear for dual-mode instructions on
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dual-mode and, more importantly, standard-mode processors. */
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if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
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ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
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{
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ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
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if (elf_section_data (now_seg) != NULL)
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elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE;
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}
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}
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#endif
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/* Write out the instruction. */
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/* Differentiate between two and four byte insns. */
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if (ppc_mach () == bfd_mach_ppc_vle)
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if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
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{
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if (PPC_OP_SE_VLE (insn))
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insn_length = 2;
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@ -3400,7 +3404,7 @@ md_assemble (char *str)
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f = frag_more (insn_length);
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if (frag_now->has_code && frag_now->insn_addr != addr_mod)
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{
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if (ppc_mach() == bfd_mach_ppc_vle)
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if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
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as_bad (_("instruction address is not a multiple of 2"));
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else
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as_bad (_("instruction address is not a multiple of 4"));
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@ -6346,7 +6350,7 @@ ppc_frag_check (struct frag *fragP)
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if (!fragP->has_code)
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return;
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if (ppc_mach() == bfd_mach_ppc_vle)
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if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
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{
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if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
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as_bad (_("instruction address is not a multiple of 2"));
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@ -6367,7 +6371,7 @@ ppc_handle_align (struct frag *fragP)
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valueT count = (fragP->fr_next->fr_address
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- (fragP->fr_address + fragP->fr_fix));
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if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
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if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && count != 0 && (count & 1) == 0)
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{
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char *dest = fragP->fr_literal + fragP->fr_fix;
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