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binutils-gdb
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Last of the instruction tests.

This commit is contained in:
Nick Clifton 1998-02-20 19:01:58 +00:00
parent 47558b4c64
commit f83a90c419
2 changed files with 37 additions and 0 deletions
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10
sim/testsuite/ChangeLog
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Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com>
* sim/m32r/addv.cgs: Test ADDV instruction.
* sim/m32r/addv3.cgs: Test ADDV3 instruction.
* sim/m32r/addx.cgs: Test ADDX instruction.
* sim/m32r/lock.cgs: Test LOCK instruction.
* sim/m32r/neg.cgs: Test NEG instruction.
* sim/m32r/not.cgs: Test NOT instruction.
* sim/m32r/unlock.cgs: Test UNLOCK instruction.
Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
* sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an

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sim/testsuite/sim/m32r/unlock.cgs Normal file
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# m32r testcase for unlock $src1,@$src2
# mach(): m32r m32rx
.include "testutils.inc"
start
.global unlock
unlock:
mvaddr_h_gr r4, data_loc
mvi_h_gr r5, 1
lock r5, @r4
mvi_h_gr r5, 0
unlock r5, @r4
test_h_gr r5, 1
mvi_h_gr r5, 0
unlock r5, @r4 ; This should be a nop since the processor should be unlocked.
test_h_gr r5, 0
pass
data_loc:
.word 0