Add support for the WebAssembly file format and the wasm32 ELF conversion to gas and the binutils.

binutils * readelf.c: Add support for wasm32 ELF format WebAssembly files.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_none_reloc_): Likewise.
	* NEWS: Mention the new support.
	* testsuite/lib/binutils-common.exp (is_elf_format): Mark wasm32
	as ELF target.
	(supports_gnu_unique): Mark wasm32 as supporting STB_GNU_UNIQUE.
	* testsuite/binutils-all/nm.exp: Mark wasm32 as requiring .size annotations.
	* testsuite/binutils-all/wasm32: New directory.
	* testsuite/binutils-all/wasm32/create-wasm.d: New file.
	* testsuite/binutils-all/wasm32/create-wasm.s: Likewise.
	* testsuite/binutils-all/wasm32/custom-section.d: Likewise.
	* testsuite/binutils-all/wasm32/custom-section.s: Likewise.
	* testsuite/binutils-all/wasm32/invalid-wasm-1.d: Likewise.
	* testsuite/binutils-all/wasm32/invalid-wasm-1.s: Likewise.
	* testsuite/binutils-all/wasm32/long-sections.d: Likewise.
	* testsuite/binutils-all/wasm32/long-sections.s: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm.d: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm.s: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm-2.d: Likewise.
	* testsuite/binutils-all/wasm32/parse-wasm-2.s: Likewise.
	* testsuite/binutils-all/wasm32/prepared-section.d: Likewise.
	* testsuite/binutils-all/wasm32/prepared-section.s: Likewise.
	* testsuite/binutils-all/wasm32/wasm32.exp: New file, run tests.

gas	* config/tc-wasm32.h: New file: Add WebAssembly assembler target.
	* config/tc-wasm32.c: New file: Add WebAssembly assembler target.
	* Makefile.am: Add WebAssembly assembler target.
	* configure.tgt: Add WebAssembly assembler target.
	* doc/c-wasm32.texi: New file: Start documenting WebAssembly
	assembler.
	* doc/all.texi: Define WASM32.
	* doc/as.texinfo: Add WebAssembly entries.
	* NEWS: Mention the new support.
	* Makefile.in: Regenerate.
	* po/gas.pot: Regenerate.
	* po/POTFILES.in: Regenerate.
	* testsuite/gas/wasm32: New directory.
	* testsuite/gas/wasm32/allinsn.d: New file.
	* testsuite/gas/wasm32/allinsn.s: New file.
	* testsuite/gas/wasm32/illegal.l: New file.
	* testsuite/gas/wasm32/illegal.s: New file.
	* testsuite/gas/wasm32/illegal-2.l: New file.
	* testsuite/gas/wasm32/illegal-2.s: New file.
	* testsuite/gas/wasm32/illegal-3.l: New file.
	* testsuite/gas/wasm32/illegal-3.s: New file.
	* testsuite/gas/wasm32/illegal-4.l: New file.
	* testsuite/gas/wasm32/illegal-4.s: New file.
	* testsuite/gas/wasm32/illegal-5.l: New file.
	* testsuite/gas/wasm32/illegal-5.s: New file.
	* testsuite/gas/wasm32/illegal-6.l: New file.
	* testsuite/gas/wasm32/illegal-6.s: New file.
	* testsuite/gas/wasm32/illegal-7.l: New file.
	* testsuite/gas/wasm32/illegal-7.s: New file.
	* testsuite/gas/wasm32/illegal-8.l: New file.
	* testsuite/gas/wasm32/illegal-8.s: New file.
	* testsuite/gas/wasm32/illegal-9.l: New file.
	* testsuite/gas/wasm32/illegal-9.s: New file.
	* testsuite/gas/wasm32/illegal-10.l: New file.
	* testsuite/gas/wasm32/illegal-10.s: New file.
	* testsuite/gas/wasm32/illegal-11.l: New file.
	* testsuite/gas/wasm32/illegal-11.s: New file.
	* testsuite/gas/wasm32/illegal-12.l: New file.
	* testsuite/gas/wasm32/illegal-12.s: New file.
	* testsuite/gas/wasm32/illegal-13.l: New file.
	* testsuite/gas/wasm32/illegal-13.s: New file.
	* testsuite/gas/wasm32/illegal-14.l: New file.
	* testsuite/gas/wasm32/illegal-14.s: New file.
	* testsuite/gas/wasm32/illegal-15.l: New file.
	* testsuite/gas/wasm32/illegal-15.s: New file.
	* testsuite/gas/wasm32/illegal-16.l: New file.
	* testsuite/gas/wasm32/illegal-16.s: New file.
	* testsuite/gas/wasm32/illegal-17.l: New file.
	* testsuite/gas/wasm32/illegal-17.s: New file.
	* testsuite/gas/wasm32/illegal-18.l: New file.
	* testsuite/gas/wasm32/illegal-18.s: New file.
	* testsuite/gas/wasm32/illegal-19.l: New file.
	* testsuite/gas/wasm32/illegal-19.s: New file.
	* testsuite/gas/wasm32/illegal-20.l: New file.
	* testsuite/gas/wasm32/illegal-20.s: New file.
	* testsuite/gas/wasm32/illegal-21.l: New file.
	* testsuite/gas/wasm32/illegal-21.s: New file.
	* testsuite/gas/wasm32/illegal-22.l: New file.
	* testsuite/gas/wasm32/illegal-22.s: New file.
	* testsuite/gas/wasm32/illegal-24.l: New file.
	* testsuite/gas/wasm32/illegal-24.s: New file.
	* testsuite/gas/wasm32/illegal-25.l: New file.
	* testsuite/gas/wasm32/illegal-25.s: New file.
	* testsuite/gas/wasm32/reloc.d: New file.
	* testsuite/gas/wasm32/reloc.s: New file.
	* testsuite/gas/wasm32/wasm32.exp: New tests for WebAssembly
	architecture.

opcodes * configure.ac: Add (empty) bfd_wasm32_arch target.
	* configure: Regenerate
	* po/opcodes.pot: Regenerate.

include	* opcode/wasm.h: New file to support wasm32 architecture.
	* elf/wasm32.h: Add R_WASM32_32 relocation.

bfd	* elf32-wasm32.c: Add relocation code, two relocs.
	* reloc.c: Add wasm32 relocations.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
	* bfd/po/bfd.pot: Regenerate.
This commit is contained in:
Pip Cet 2017-03-30 10:57:21 +01:00 committed by Nick Clifton
parent 662659a1a5
commit f96bd6c2d7
99 changed files with 4363 additions and 1859 deletions

View File

@ -1,3 +1,11 @@
2017-03-30 Pip Cet <pipcet@gmail.com>
* elf32-wasm32.c: Add relocation code, two relocs.
* reloc.c: Add wasm32 relocations.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* bfd/po/bfd.pot: Regenerate.
2017-03-29 Nick Clifton <nickc@redhat.com>
PR binutils/18025

View File

@ -6464,6 +6464,18 @@ assembler and not (currently) written to any object files. */
BFD_RELOC_VISIUM_HI16_PCREL,
BFD_RELOC_VISIUM_LO16_PCREL,
BFD_RELOC_VISIUM_IM16_PCREL,
/* WebAssembly relocations. */
BFD_RELOC_WASM32_LEB128,
BFD_RELOC_WASM32_LEB128_GOT,
BFD_RELOC_WASM32_LEB128_GOT_CODE,
BFD_RELOC_WASM32_LEB128_PLT,
BFD_RELOC_WASM32_PLT_INDEX,
BFD_RELOC_WASM32_ABS32_CODE,
BFD_RELOC_WASM32_COPY,
BFD_RELOC_WASM32_CODE_POINTER,
BFD_RELOC_WASM32_INDEX,
BFD_RELOC_WASM32_PLT_SIG,
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;

View File

@ -23,8 +23,108 @@
#include "libbfd.h"
#include "elf-bfd.h"
#include "bfd_stdint.h"
#include "libiberty.h"
#include "elf/wasm32.h"
static reloc_howto_type elf32_wasm32_howto_table[] =
{
HOWTO (R_WASM32_NONE, /* type */
0, /* rightshift */
3, /* size (0 = byte, 1 = short, 2 = long) */
0, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_WASM32_NONE", /* name */
FALSE, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
FALSE), /* pcrel_offset */
/* 32 bit absolute */
HOWTO (R_WASM32_32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_WASM32_32", /* name */
FALSE, /* partial_inplace */
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
};
/* Look up the relocation CODE. */
static reloc_howto_type *
elf32_wasm32_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
bfd_reloc_code_real_type code)
{
switch (code)
{
case BFD_RELOC_NONE:
return &elf32_wasm32_howto_table[R_WASM32_NONE];
case BFD_RELOC_32:
return &elf32_wasm32_howto_table[R_WASM32_32];
default:
break;
}
return NULL;
}
/* Look up the relocation R_NAME. */
static reloc_howto_type *
elf32_wasm32_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
const char *r_name)
{
unsigned int i;
for (i = 0; i < ARRAY_SIZE (elf32_wasm32_howto_table); i++)
if (elf32_wasm32_howto_table[i].name != NULL
&& strcasecmp (elf32_wasm32_howto_table[i].name, r_name) == 0)
return &elf32_wasm32_howto_table[i];
return NULL;
}
/* Look up the relocation R_TYPE. */
static reloc_howto_type *
elf32_wasm32_rtype_to_howto (bfd *abfd, unsigned r_type)
{
unsigned int i = r_type;
if (i >= ARRAY_SIZE (elf32_wasm32_howto_table))
{
/* xgettext:c-format */
_bfd_error_handler (_("%B: invalid relocation type %d"),
abfd, (int) r_type);
i = R_WASM32_NONE;
}
if (elf32_wasm32_howto_table[i].type != r_type)
return NULL;
return &elf32_wasm32_howto_table[i];
}
/* Translate the ELF-internal relocation RELA into CACHE_PTR. */
static void
elf32_wasm32_info_to_howto_rela (bfd *abfd ATTRIBUTE_UNUSED,
arelent *cache_ptr,
Elf_Internal_Rela *dst)
{
unsigned int r_type = ELF32_R_TYPE (dst->r_info);
cache_ptr->howto = elf32_wasm32_rtype_to_howto (abfd, r_type);
}
#define ELF_ARCH bfd_arch_wasm32
#define ELF_TARGET_ID EM_WEBASSEMBLY
#define ELF_MACHINE_CODE EM_WEBASSEMBLY
@ -40,8 +140,11 @@
/* For testing. */
#define elf_backend_want_dynrelro 1
#define bfd_elf32_bfd_reloc_type_lookup _bfd_norelocs_bfd_reloc_type_lookup
#define bfd_elf32_bfd_reloc_name_lookup _bfd_norelocs_bfd_reloc_name_lookup
#define elf_info_to_howto elf32_wasm32_info_to_howto_rela
#define elf_info_to_howto_rel NULL
#define bfd_elf32_bfd_reloc_type_lookup elf32_wasm32_reloc_type_lookup
#define bfd_elf32_bfd_reloc_name_lookup elf32_wasm32_reloc_name_lookup
#define ELF_DYNAMIC_INTERPRETER "/sbin/elf-dynamic-interpreter.so"

View File

@ -3166,6 +3166,16 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_VISIUM_HI16_PCREL",
"BFD_RELOC_VISIUM_LO16_PCREL",
"BFD_RELOC_VISIUM_IM16_PCREL",
"BFD_RELOC_WASM32_LEB128",
"BFD_RELOC_WASM32_LEB128_GOT",
"BFD_RELOC_WASM32_LEB128_GOT_CODE",
"BFD_RELOC_WASM32_LEB128_PLT",
"BFD_RELOC_WASM32_PLT_INDEX",
"BFD_RELOC_WASM32_ABS32_CODE",
"BFD_RELOC_WASM32_COPY",
"BFD_RELOC_WASM32_CODE_POINTER",
"BFD_RELOC_WASM32_INDEX",
"BFD_RELOC_WASM32_PLT_SIG",
"@@overflow: BFD_RELOC_UNUSED@@",
};
#endif

View File

@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: bug-binutils@gnu.org\n"
"POT-Creation-Date: 2017-03-27 11:46+0100\n"
"POT-Creation-Date: 2017-03-29 17:07+0100\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"
@ -206,7 +206,7 @@ msgid "Warning: Writing section `%s' at huge (ie negative) file offset 0x%lx."
msgstr ""
#: bout.c:1142 elf-m10300.c:2651 elf32-avr.c:2452 elf32-frv.c:5633
#: elf64-ia64-vms.c:353 elfxx-sparc.c:2876 reloc.c:7981 reloc16.c:156
#: elf64-ia64-vms.c:353 elfxx-sparc.c:2876 reloc.c:8004 reloc16.c:156
#: elf32-ia64.c:351 elf64-ia64.c:351
msgid "%P%F: --relax and -r may not be used together\n"
msgstr ""
@ -617,16 +617,16 @@ msgstr ""
msgid "<corrupt info> %s"
msgstr ""
#: coffgen.c:2638 elflink.c:13940 linker.c:2931
#: coffgen.c:2666 elflink.c:13940 linker.c:2931
msgid "%F%P: already_linked_table: %E\n"
msgstr ""
#: coffgen.c:2965 elflink.c:12981
#: coffgen.c:2993 elflink.c:12981
#, c-format
msgid "Removing unused section '%s' in file '%B'"
msgstr ""
#: coffgen.c:3041 elflink.c:13219
#: coffgen.c:3069 elflink.c:13219
msgid "Warning: gc-sections option ignored"
msgstr ""
@ -736,26 +736,26 @@ msgstr ""
msgid "Dwarf Error: Unable to read alt ref %u."
msgstr ""
#: dwarf2.c:2600 dwarf2.c:2745 dwarf2.c:3063
#: dwarf2.c:2600 dwarf2.c:2750 dwarf2.c:3071
#, c-format
msgid "Dwarf Error: Could not find abbrev number %u."
msgstr ""
#: dwarf2.c:3015
#: dwarf2.c:3023
#, c-format
msgid ""
"Dwarf Error: found dwarf version '%u', this reader only handles version 2, 3 "
"and 4 information."
msgstr ""
#: dwarf2.c:3026
#: dwarf2.c:3034
#, c-format
msgid ""
"Dwarf Error: found address size '%u', this reader can not handle sizes "
"greater than '%u'."
msgstr ""
#: dwarf2.c:3129
#: dwarf2.c:3137
msgid ""
"Dwarf Error: DW_AT_comp_dir attribute encountered with a non-string form."
msgstr ""
@ -1680,7 +1680,7 @@ msgstr ""
#. Ignore init flag - it may not be set, despite the flags field containing valid data.
#. Ignore init flag - it may not be set, despite the flags field
#. containing valid data.
#: elf32-arm.c:14101 elf32-bfin.c:4919 elf32-cris.c:4084 elf32-m68hc1x.c:1413
#: elf32-arm.c:14101 elf32-bfin.c:4919 elf32-cris.c:4089 elf32-m68hc1x.c:1413
#: elf32-m68k.c:1200 elf32-score.c:4009 elf32-score7.c:3818 elf32-vax.c:536
#: elf32-xgate.c:669 elfxx-mips.c:15782
#: /work/sources/binutils/current/bfd/elfnn-aarch64.c:6695
@ -2072,14 +2072,14 @@ msgid ""
"-mno-small-tls)"
msgstr ""
#: elf32-cris.c:3231
#: elf32-cris.c:3233
#, c-format
msgid ""
"%B, section %A:\n"
" v10/v32 compatible object %s must not contain a PIC relocation"
msgstr ""
#: elf32-cris.c:3285
#: elf32-cris.c:3287
#, c-format
msgid ""
"%B, section %A:\n"
@ -2087,52 +2087,52 @@ msgid ""
"recompile with -fPIC"
msgstr ""
#: elf32-cris.c:3500
#: elf32-cris.c:3505
#, c-format
msgid ""
"%B, section %A:\n"
" relocation %s should not be used in a shared object; recompile with -fPIC"
msgstr ""
#: elf32-cris.c:3924
#: elf32-cris.c:3929
#, c-format
msgid ""
"%B, section `%A', to symbol `%s':\n"
" relocation %s should not be used in a shared object; recompile with -fPIC"
msgstr ""
#: elf32-cris.c:4036
#: elf32-cris.c:4041
msgid "Unexpected machine number"
msgstr ""
#: elf32-cris.c:4087
#: elf32-cris.c:4092
#, c-format
msgid " [symbols have a _ prefix]"
msgstr ""
#: elf32-cris.c:4090
#: elf32-cris.c:4095
#, c-format
msgid " [v10 and v32]"
msgstr ""
#: elf32-cris.c:4093
#: elf32-cris.c:4098
#, c-format
msgid " [v32]"
msgstr ""
#: elf32-cris.c:4137
#: elf32-cris.c:4142
msgid "%B: uses _-prefixed symbols, but writing file with non-prefixed symbols"
msgstr ""
#: elf32-cris.c:4138
#: elf32-cris.c:4143
msgid "%B: uses non-prefixed symbols, but writing file with _-prefixed symbols"
msgstr ""
#: elf32-cris.c:4157
#: elf32-cris.c:4162
msgid "%B contains CRIS v32 code, incompatible with previous objects"
msgstr ""
#: elf32-cris.c:4159
#: elf32-cris.c:4164
msgid "%B contains non-CRIS-v32 code, incompatible with previous objects"
msgstr ""
@ -2356,7 +2356,8 @@ msgstr ""
#. Unknown relocation.
#: elf32-i386.c:387 elf32-m68k.c:352 elf32-ppc.c:2074 elf32-s390.c:346
#: elf32-tic6x.c:2674 elf64-ppc.c:2515 elf64-s390.c:372 elf64-x86-64.c:289
#: elf32-tic6x.c:2674 elf32-wasm32.c:106 elf64-ppc.c:2515 elf64-s390.c:372
#: elf64-x86-64.c:289
#, c-format
msgid "%B: invalid relocation type %d"
msgstr ""
@ -2947,7 +2948,7 @@ msgstr ""
msgid "%B: Unmatched OMIT_FP in %A."
msgstr ""
#: elf32-nds32.c:13026 reloc.c:8192
#: elf32-nds32.c:13026 reloc.c:8215
#, c-format
msgid "%X%P: %B(%A): relocation \"%R\" goes out of range\n"
msgstr ""
@ -5841,21 +5842,21 @@ msgstr ""
msgid "Partition[%d] length = 0x%.8lx (%ld)\n"
msgstr ""
#: reloc.c:8028
#: reloc.c:8051
msgid "INPUT_SECTION_FLAGS are not supported.\n"
msgstr ""
#: reloc.c:8126
#: reloc.c:8149
#, c-format
msgid "%X%P: %B(%A): error: relocation for offset %V has no value\n"
msgstr ""
#: reloc.c:8202
#: reloc.c:8225
#, c-format
msgid "%X%P: %B(%A): relocation \"%R\" is not supported\n"
msgstr ""
#: reloc.c:8211
#: reloc.c:8234
#, c-format
msgid "%X%P: %B(%A): relocation \"%R\" returns an unrecognized value %x\n"
msgstr ""

View File

@ -7853,6 +7853,29 @@ ENUMX
ENUMDOC
Visium Relocations.
ENUM
BFD_RELOC_WASM32_LEB128
ENUMX
BFD_RELOC_WASM32_LEB128_GOT
ENUMX
BFD_RELOC_WASM32_LEB128_GOT_CODE
ENUMX
BFD_RELOC_WASM32_LEB128_PLT
ENUMX
BFD_RELOC_WASM32_PLT_INDEX
ENUMX
BFD_RELOC_WASM32_ABS32_CODE
ENUMX
BFD_RELOC_WASM32_COPY
ENUMX
BFD_RELOC_WASM32_CODE_POINTER
ENUMX
BFD_RELOC_WASM32_INDEX
ENUMX
BFD_RELOC_WASM32_PLT_SIG
ENUMDOC
WebAssembly relocations.
ENDSENUM
BFD_RELOC_UNUSED
CODE_FRAGMENT

View File

@ -1,3 +1,32 @@
2017-03-30 Pip Cet <pipcet@gmail.com>
* readelf.c: Add support for wasm32 ELF format WebAssembly files.
(guess_is_rela): Likewise.
(dump_relocations): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_none_reloc_): Likewise.
* NEWS: Mention the new support.
* testsuite/lib/binutils-common.exp (is_elf_format): Mark wasm32
as ELF target.
(supports_gnu_unique): Mark wasm32 as supporting STB_GNU_UNIQUE.
* testsuite/binutils-all/nm.exp: Mark wasm32 as requiring .size annotations.
* testsuite/binutils-all/wasm32: New directory.
* testsuite/binutils-all/wasm32/create-wasm.d: New file.
* testsuite/binutils-all/wasm32/create-wasm.s: Likewise.
* testsuite/binutils-all/wasm32/custom-section.d: Likewise.
* testsuite/binutils-all/wasm32/custom-section.s: Likewise.
* testsuite/binutils-all/wasm32/invalid-wasm-1.d: Likewise.
* testsuite/binutils-all/wasm32/invalid-wasm-1.s: Likewise.
* testsuite/binutils-all/wasm32/long-sections.d: Likewise.
* testsuite/binutils-all/wasm32/long-sections.s: Likewise.
* testsuite/binutils-all/wasm32/parse-wasm.d: Likewise.
* testsuite/binutils-all/wasm32/parse-wasm.s: Likewise.
* testsuite/binutils-all/wasm32/parse-wasm-2.d: Likewise.
* testsuite/binutils-all/wasm32/parse-wasm-2.s: Likewise.
* testsuite/binutils-all/wasm32/prepared-section.d: Likewise.
* testsuite/binutils-all/wasm32/prepared-section.s: Likewise.
* testsuite/binutils-all/wasm32/wasm32.exp: New file, run tests.
2017-03-29 Alan Modra <amodra@gmail.com>
* doc/binutils.texi (objdump): Document PowerPC -M options.

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@ -1,5 +1,7 @@
-*- text -*-
* Add support for the wasm32 ELF conversion of the Web Assembly file format.
* Add --inlines option to objdump, which extends the --line-numbers option
so that inlined functions will display their nesting information.

View File

@ -151,6 +151,7 @@
#include "elf/v850.h"
#include "elf/vax.h"
#include "elf/visium.h"
#include "elf/wasm32.h"
#include "elf/x86-64.h"
#include "elf/xc16x.h"
#include "elf/xgate.h"
@ -809,6 +810,7 @@ guess_is_rela (unsigned int e_machine)
case EM_XTENSA_OLD:
case EM_MICROBLAZE:
case EM_MICROBLAZE_OLD:
case EM_WEBASSEMBLY:
return TRUE;
case EM_68HC05:
@ -1498,6 +1500,10 @@ dump_relocations (FILE * file,
rtype = elf_tilepro_reloc_type (type);
break;
case EM_WEBASSEMBLY:
rtype = elf_wasm32_reloc_type (type);
break;
case EM_XGATE:
rtype = elf_xgate_reloc_type (type);
break;
@ -12091,6 +12097,8 @@ is_32bit_abs_reloc (unsigned int reloc_type)
return reloc_type == 1; /* R_VAX_32. */
case EM_VISIUM:
return reloc_type == 3; /* R_VISIUM_32. */
case EM_WEBASSEMBLY:
return reloc_type == 1; /* R_WASM32_32. */
case EM_X86_64:
case EM_L1OM:
case EM_K1OM:
@ -12396,6 +12404,7 @@ is_none_reloc (unsigned int reloc_type)
case EM_TI_C6000:/* R_C6000_NONE. */
case EM_X86_64: /* R_X86_64_NONE. */
case EM_XC16X:
case EM_WEBASSEMBLY: /* R_WASM32_NONE. */
return reloc_type == 0;
case EM_AARCH64:

View File

@ -175,7 +175,8 @@ if { [is_elf_format]
|| [istarget *-*-tpf*]
|| [istarget *-*-uclinux*]
|| [istarget ia64-*-*vms*]
|| [istarget *-*-vxworks*] } {
|| [istarget *-*-vxworks*]
|| [istarget wasm32-*-*] } {
set nm_1_src "nm-elf-1.s"
} else {
set nm_1_src "nm-1.s"

View File

@ -0,0 +1,10 @@
#PROG: objcopy
#source: create-wasm.s
#as:
#objcopy: -Ielf32-wasm32 -Owasm
#objdump: -bbinary -s
.*:.*file format binary
Contents of section .data:
0000 0061736d 01000000 01030100 00030100 .asm............

View File

@ -0,0 +1,6 @@
.section .wasm.function
.byte 0
.section .wasm.type
.byte 1
.byte 0
.byte 0

View File

@ -0,0 +1,11 @@
#PROG: objcopy
#source: custom-section.s
#as:
#objcopy: -Ielf32-wasm32 -Owasm
#objdump: -bbinary -s
.*:.*file format binary
Contents of section .data:
0000 0061736d 01000000 0008046e 616d6502 .asm.......name.
0010 0100 .. *$

View File

@ -0,0 +1,4 @@
.section .wasm.name
.byte 2
.byte 1
.byte 0

View File

@ -0,0 +1,6 @@
#PROG: objcopy
#source: invalid-wasm-1.s
#as:
#objcopy: -Ielf32-wasm32 -Obinary
#objdump: -bwasm -sD
#error: : File format not recognized

View File

@ -0,0 +1,7 @@
.data
.byte 0
.ascii "ASM"
.byte 1
.byte 0
.byte 0
.byte 0

View File

@ -0,0 +1,6 @@
#PROG: objcopy
#source: invalid-wasm-2.s
#as:
#objcopy: -Ielf32-wasm32 -Obinary
#objdump: -bwasm -sD
#exit: 1

View File

@ -0,0 +1,7 @@
.data
.byte 0
.ascii "asm"
.byte 2
.byte 0
.byte 0
.byte 0

View File

@ -0,0 +1,13 @@
#PROG: objcopy
#source: long-sections.s
#as:
#objcopy: -Ielf32-wasm32 -Owasm
#objdump: -bbinary -s
.*:.*file format binary
Contents of section .data:
00000 0061736d 01000000 01800200 00000000 .asm............
#...
00100 00000000 00000000 0000000a 80800400 ................
#pass

View File

@ -0,0 +1,9 @@
.section .wasm.type
.rept 256
.byte 0
.endr
.section .wasm.code
.rept 65536
.byte 0
.endr

View File

@ -0,0 +1,15 @@
#PROG: objcopy
#source: parse-wasm-2.s
#as:
#objcopy: -Ielf32-wasm32 -Obinary
#objdump: -bwasm -s
.*:.*file format wasm
Contents of section .wasm.type:
80000000 01600001 7f .`...
Contents of section .wasm.function:
80000005 0100 ..
Contents of section .wasm.code:
80000007 01858080 80000041 2a0f0b .......A\*..
#pass

View File

@ -0,0 +1,43 @@
.data
.byte 0
.ascii "asm"
.byte 1
.byte 0
.byte 0
.byte 0
.byte 1
.byte 0x85
.byte 0x80
.byte 0x80
.byte 0x80
.byte 0
.byte 1
.byte 0x60
.byte 0
.byte 1
.byte 0x7f
.byte 3
.byte 0x82
.byte 0x80
.byte 0x80
.byte 0x80
.byte 0
.byte 1
.byte 0
.byte 0x0a
.byte 0x8b
.byte 0x80
.byte 0x80
.byte 0x80
.byte 0
.byte 1
.byte 0x85
.byte 0x80
.byte 0x80
.byte 0x80
.byte 0
.byte 0
.byte 0x41
.byte 0x2a
.byte 0x0f
.byte 0x0b

View File

@ -0,0 +1,8 @@
#PROG: objcopy
#source: parse-wasm.s
#as:
#objcopy: -Ielf32-wasm32 -Obinary
#objdump: -bwasm -s
.*:.*file format wasm

View File

@ -0,0 +1,7 @@
.data
.byte 0
.ascii "asm"
.byte 1
.byte 0
.byte 0
.byte 0

View File

@ -0,0 +1,10 @@
#PROG: objcopy
#source: prepared-section.s
#as:
#objcopy: -Ielf32-wasm32 -Owasm
#objdump: -bbinary -s
.*:.*file format binary
Contents of section .data:
0000 0061736d 01000000 0006046e 616d6500 .asm.......name.

View File

@ -0,0 +1,6 @@
.section .prepared
.byte 0
.byte 0x6
.byte 4
.ascii "name"
.byte 0

View File

@ -0,0 +1,30 @@
# Copyright (C) 2010-2017 Free Software Foundation, Inc.
# Copyright (C) 2017 Pip Cet <pipcet@gmail.com>
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
if { ![istarget "wasm32-*-*"] } then {
return
}
run_dump_test "create-wasm"
run_dump_test "custom-section"
run_dump_test "long-sections"
run_dump_test "parse-wasm"
run_dump_test "parse-wasm-2"
run_dump_test "prepared-section"
#run_dump_test "invalid-wasm-1"
#run_dump_test "invalid-wasm-2"

View File

@ -41,6 +41,7 @@ proc is_elf_format {} {
&& ![istarget *-*-solaris2*]
&& ![istarget *-*-sysv4*]
&& ![istarget *-*-unixware*]
&& ![istarget *-*-wasm32*]
&& ![istarget avr-*-*]
&& ![istarget bfin-*-uclinux]
&& ![istarget frv-*-uclinux*]
@ -183,6 +184,9 @@ proc supports_gnu_unique {} {
if { [istarget "arm*-*-*eabi*"] } {
return 1
}
if { [istarget "wasm32*-*-*"] } {
return 1
}
if { ![istarget "*-*-elf*"] } {
return 0
}

View File

@ -1,3 +1,73 @@
2017-03-30 Pip Cet <pipcet@gmail.com>
* config/tc-wasm32.h: New file: Add WebAssembly assembler target.
* config/tc-wasm32.c: New file: Add WebAssembly assembler target.
* Makefile.am: Add WebAssembly assembler target.
* configure.tgt: Add WebAssembly assembler target.
* doc/c-wasm32.texi: New file: Start documenting WebAssembly
assembler.
* doc/all.texi: Define WASM32.
* doc/as.texinfo: Add WebAssembly entries.
* NEWS: Mention the new support.
* Makefile.in: Regenerate.
* po/gas.pot: Regenerate.
* po/POTFILES.in: Regenerate.
* testsuite/gas/wasm32: New directory.
* testsuite/gas/wasm32/allinsn.d: New file.
* testsuite/gas/wasm32/allinsn.s: New file.
* testsuite/gas/wasm32/illegal.l: New file.
* testsuite/gas/wasm32/illegal.s: New file.
* testsuite/gas/wasm32/illegal-2.l: New file.
* testsuite/gas/wasm32/illegal-2.s: New file.
* testsuite/gas/wasm32/illegal-3.l: New file.
* testsuite/gas/wasm32/illegal-3.s: New file.
* testsuite/gas/wasm32/illegal-4.l: New file.
* testsuite/gas/wasm32/illegal-4.s: New file.
* testsuite/gas/wasm32/illegal-5.l: New file.
* testsuite/gas/wasm32/illegal-5.s: New file.
* testsuite/gas/wasm32/illegal-6.l: New file.
* testsuite/gas/wasm32/illegal-6.s: New file.
* testsuite/gas/wasm32/illegal-7.l: New file.
* testsuite/gas/wasm32/illegal-7.s: New file.
* testsuite/gas/wasm32/illegal-8.l: New file.
* testsuite/gas/wasm32/illegal-8.s: New file.
* testsuite/gas/wasm32/illegal-9.l: New file.
* testsuite/gas/wasm32/illegal-9.s: New file.
* testsuite/gas/wasm32/illegal-10.l: New file.
* testsuite/gas/wasm32/illegal-10.s: New file.
* testsuite/gas/wasm32/illegal-11.l: New file.
* testsuite/gas/wasm32/illegal-11.s: New file.
* testsuite/gas/wasm32/illegal-12.l: New file.
* testsuite/gas/wasm32/illegal-12.s: New file.
* testsuite/gas/wasm32/illegal-13.l: New file.
* testsuite/gas/wasm32/illegal-13.s: New file.
* testsuite/gas/wasm32/illegal-14.l: New file.
* testsuite/gas/wasm32/illegal-14.s: New file.
* testsuite/gas/wasm32/illegal-15.l: New file.
* testsuite/gas/wasm32/illegal-15.s: New file.
* testsuite/gas/wasm32/illegal-16.l: New file.
* testsuite/gas/wasm32/illegal-16.s: New file.
* testsuite/gas/wasm32/illegal-17.l: New file.
* testsuite/gas/wasm32/illegal-17.s: New file.
* testsuite/gas/wasm32/illegal-18.l: New file.
* testsuite/gas/wasm32/illegal-18.s: New file.
* testsuite/gas/wasm32/illegal-19.l: New file.
* testsuite/gas/wasm32/illegal-19.s: New file.
* testsuite/gas/wasm32/illegal-20.l: New file.
* testsuite/gas/wasm32/illegal-20.s: New file.
* testsuite/gas/wasm32/illegal-21.l: New file.
* testsuite/gas/wasm32/illegal-21.s: New file.
* testsuite/gas/wasm32/illegal-22.l: New file.
* testsuite/gas/wasm32/illegal-22.s: New file.
* testsuite/gas/wasm32/illegal-24.l: New file.
* testsuite/gas/wasm32/illegal-24.s: New file.
* testsuite/gas/wasm32/illegal-25.l: New file.
* testsuite/gas/wasm32/illegal-25.s: New file.
* testsuite/gas/wasm32/reloc.d: New file.
* testsuite/gas/wasm32/reloc.s: New file.
* testsuite/gas/wasm32/wasm32.exp: New tests for WebAssembly
architecture.
2017-03-29 Alan Modra <amodra@gmail.com>
* config/tc-ppc.c (md_parse_option): Reject -mraw.

View File

@ -196,6 +196,7 @@ TARGET_CPU_CFILES = \
config/tc-v850.c \
config/tc-vax.c \
config/tc-visium.c \
config/tc-wasm32.c \
config/tc-xstormy16.c \
config/tc-xc16x.c \
config/tc-xgate.c \
@ -271,6 +272,7 @@ TARGET_CPU_HFILES = \
config/tc-v850.h \
config/tc-vax.h \
config/tc-visium.h \
config/tc-wasm32.h \
config/tc-xstormy16.h \
config/tc-xc16x.h \
config/tc-xgate.h \

View File

@ -492,6 +492,7 @@ TARGET_CPU_CFILES = \
config/tc-v850.c \
config/tc-vax.c \
config/tc-visium.c \
config/tc-wasm32.c \
config/tc-xstormy16.c \
config/tc-xc16x.c \
config/tc-xgate.c \
@ -567,6 +568,7 @@ TARGET_CPU_HFILES = \
config/tc-v850.h \
config/tc-vax.h \
config/tc-visium.h \
config/tc-wasm32.h \
config/tc-xstormy16.h \
config/tc-xc16x.h \
config/tc-xgate.h \
@ -927,6 +929,7 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-v850.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-vax.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-visium.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-wasm32.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-xc16x.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-xgate.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/tc-xstormy16.Po@am__quote@
@ -1896,6 +1899,20 @@ tc-visium.obj: config/tc-visium.c
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-visium.obj `if test -f 'config/tc-visium.c'; then $(CYGPATH_W) 'config/tc-visium.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-visium.c'; fi`
tc-wasm32.o: config/tc-wasm32.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-wasm32.o -MD -MP -MF $(DEPDIR)/tc-wasm32.Tpo -c -o tc-wasm32.o `test -f 'config/tc-wasm32.c' || echo '$(srcdir)/'`config/tc-wasm32.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-wasm32.Tpo $(DEPDIR)/tc-wasm32.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-wasm32.c' object='tc-wasm32.o' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-wasm32.o `test -f 'config/tc-wasm32.c' || echo '$(srcdir)/'`config/tc-wasm32.c
tc-wasm32.obj: config/tc-wasm32.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-wasm32.obj -MD -MP -MF $(DEPDIR)/tc-wasm32.Tpo -c -o tc-wasm32.obj `if test -f 'config/tc-wasm32.c'; then $(CYGPATH_W) 'config/tc-wasm32.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-wasm32.c'; fi`
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-wasm32.Tpo $(DEPDIR)/tc-wasm32.Po
@AMDEP_TRUE@@am__fastdepCC_FALSE@ source='config/tc-wasm32.c' object='tc-wasm32.obj' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCC_FALSE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o tc-wasm32.obj `if test -f 'config/tc-wasm32.c'; then $(CYGPATH_W) 'config/tc-wasm32.c'; else $(CYGPATH_W) '$(srcdir)/config/tc-wasm32.c'; fi`
tc-xstormy16.o: config/tc-xstormy16.c
@am__fastdepCC_TRUE@ $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -MT tc-xstormy16.o -MD -MP -MF $(DEPDIR)/tc-xstormy16.Tpo -c -o tc-xstormy16.o `test -f 'config/tc-xstormy16.c' || echo '$(srcdir)/'`config/tc-xstormy16.c
@am__fastdepCC_TRUE@ $(am__mv) $(DEPDIR)/tc-xstormy16.Tpo $(DEPDIR)/tc-xstormy16.Po

View File

@ -1,5 +1,7 @@
-*- text -*-
* Add support for the WebAssembly file format and wasm32 ELF conversion.
* PowerPC gas now checks that the correct register class is used in
instructions. For instance, "addi %f4,%cr3,%r31" warns three times
that the registers are invalid.

821
gas/config/tc-wasm32.c Normal file
View File

@ -0,0 +1,821 @@
/* tc-wasm32.c -- Assembler code for the wasm32 target.
Copyright (C) 2017 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
#include "as.h"
#include "safe-ctype.h"
#include "subsegs.h"
#include "dwarf2dbg.h"
#include "dw2gencfi.h"
#include "elf/wasm32.h"
#include <float.h>
enum wasm_class
{
wasm_typed, /* a typed opcode: block, loop, or if */
wasm_special, /* a special opcode: unreachable, nop, else,
or end */
wasm_break, /* "br" */
wasm_break_if, /* "br_if" opcode */
wasm_break_table, /* "br_table" opcode */
wasm_return, /* "return" opcode */
wasm_call, /* "call" opcode */
wasm_call_indirect, /* "call_indirect" opcode */
wasm_get_local, /* "get_local" and "get_global" */
wasm_set_local, /* "set_local" and "set_global" */
wasm_tee_local, /* "tee_local" */
wasm_drop, /* "drop" */
wasm_constant_i32, /* "i32.const" */
wasm_constant_i64, /* "i64.const" */
wasm_constant_f32, /* "f32.const" */
wasm_constant_f64, /* "f64.const" */
wasm_unary, /* unary operators */
wasm_binary, /* binary operators */
wasm_conv, /* conversion operators */
wasm_load, /* load operators */
wasm_store, /* store operators */
wasm_select, /* "select" */
wasm_relational, /* comparison operators, except for "eqz" */
wasm_eqz, /* "eqz" */
wasm_current_memory, /* "current_memory" */
wasm_grow_memory, /* "grow_memory" */
wasm_signature /* "signature", which isn't an opcode */
};
#define WASM_OPCODE(opcode, name, intype, outtype, class, signedness) \
{ name, wasm_ ## class, opcode },
struct wasm32_opcode_s
{
const char *name;
enum wasm_class clas;
unsigned char opcode;
} wasm32_opcodes[] =
{
#include "opcode/wasm.h"
{
NULL, 0, 0}
};
const char comment_chars[] = ";#";
const char line_comment_chars[] = ";#";
const char line_separator_chars[] = "";
const char *md_shortopts = "m:";
const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";
/* The target specific pseudo-ops which we support. */
const pseudo_typeS md_pseudo_table[] =
{
{NULL, NULL, 0}
};
/* Opcode hash table. */
static struct hash_control *wasm32_hash;
struct option md_longopts[] =
{
{NULL, no_argument, NULL, 0}
};
size_t md_longopts_size = sizeof (md_longopts);
/* No relaxation/no machine-dependent frags. */
int
md_estimate_size_before_relax (fragS * fragp ATTRIBUTE_UNUSED,
asection * seg ATTRIBUTE_UNUSED)
{
abort ();
return 0;
}
void
md_show_usage (FILE * stream)
{
fprintf (stream, _("wasm32 assembler options:\n"));
}
/* No machine-dependent options. */
int
md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED)
{
return 0;
}
/* No machine-dependent symbols. */
symbolS *
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
{
return NULL;
}
/* IEEE little-endian floats. */
const char *
md_atof (int type, char *litP, int *sizeP)
{
return ieee_md_atof (type, litP, sizeP, FALSE);
}
/* No machine-dependent frags. */
void
md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
asection * sec ATTRIBUTE_UNUSED,
fragS * fragP ATTRIBUTE_UNUSED)
{
abort ();
}
/* Build opcode hash table, set some flags. */
void
md_begin (void)
{
struct wasm32_opcode_s *opcode;
wasm32_hash = hash_new ();
/* Insert unique names into hash table. This hash table then
provides a quick index to the first opcode with a particular name
in the opcode table. */
for (opcode = wasm32_opcodes; opcode->name; opcode++)
hash_insert (wasm32_hash, opcode->name, (char *) opcode);
linkrelax = 0;
flag_sectname_subst = 1;
flag_no_comments = 0;
flag_keep_locals = 1;
}
/* Do the normal thing for md_section_align. */
valueT
md_section_align (asection * seg, valueT addr)
{
int align = bfd_get_section_alignment (stdoutput, seg);
return ((addr + (1 << align) - 1) & -(1 << align));
}
/* Apply a fixup, return TRUE if done (and no relocation is
needed). */
static bfd_boolean
apply_full_field_fix (fixS * fixP, char *buf, bfd_vma val, int size)
{
if (fixP->fx_addsy != NULL || fixP->fx_pcrel)
{
fixP->fx_addnumber = val;
return FALSE;
}
number_to_chars_littleendian (buf, val, size);
return TRUE;
}
/* Apply a fixup (potentially PC-relative), set the fx_done flag if
done. */
void
md_apply_fix (fixS * fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
{
char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
long val = (long) *valP;
if (fixP->fx_pcrel)
{
switch (fixP->fx_r_type)
{
default:
bfd_set_error (bfd_error_bad_value);
return;
case BFD_RELOC_32:
fixP->fx_r_type = BFD_RELOC_32_PCREL;
return;
}
}
if (apply_full_field_fix (fixP, buf, val, fixP->fx_size))
fixP->fx_done = 1;
}
/* Skip whitespace. */
static inline char *
skip_space (char *s)
{
while (*s == ' ' || *s == '\t')
++s;
return s;
}
/* Allow '/' in opcodes. */
static inline bfd_boolean
is_part_of_opcode (char c)
{
return is_part_of_name (c) || (c == '/');
}
/* Extract an opcode. */
static char *
extract_opcode (char *from, char *to, int limit)
{
char *op_end;
int size = 0;
/* Drop leading whitespace. */
from = skip_space (from);
*to = 0;
/* Find the op code end. */
for (op_end = from; *op_end != 0 && is_part_of_opcode (*op_end);)
{
to[size++] = *op_end++;
if (size + 1 >= limit)
break;
}
to[size] = 0;
return op_end;
}
/* Produce an unsigned LEB128 integer padded to the right number of
bytes to store BITS bits, of value VALUE. Uses FRAG_APPEND_1_CHAR
to write. */
static void
wasm32_put_long_uleb128 (int bits, unsigned long value)
{
unsigned char c;
int i = 0;
do
{
c = value & 0x7f;
value >>= 7;
if (i < (bits - 1) / 7)
c |= 0x80;
FRAG_APPEND_1_CHAR (c);
}
while (++i < (bits + 6) / 7);
}
/* Produce a signed LEB128 integer, using FRAG_APPEND_1_CHAR to
write. */
static void
wasm32_put_sleb128 (long value)
{
unsigned char c;
int more;
do
{
c = (value & 0x7f);
value >>= 7;
more = !((((value == 0) && ((c & 0x40) == 0))
|| ((value == -1) && ((c & 0x40) != 0))));
if (more)
c |= 0x80;
FRAG_APPEND_1_CHAR (c);
}
while (more);
}
/* Produce an unsigned LEB128 integer, using FRAG_APPEND_1_CHAR to
write. */
static void
wasm32_put_uleb128 (unsigned long value)
{
unsigned char c;
do
{
c = value & 0x7f;
value >>= 7;
if (value)
c |= 0x80;
FRAG_APPEND_1_CHAR (c);
}
while (value);
}
/* Read an integer expression. Produce an LEB128-encoded integer if
it's a constant, a padded LEB128 plus a relocation if it's a
symbol, or a special relocation for <expr>@got, <expr>@gotcode, and
<expr>@plt{__sigchar_<signature>}. */
static bfd_boolean
wasm32_leb128 (char **line, int bits, int sign)
{
char *t = input_line_pointer;
char *str = *line;
char *str0 = str;
struct reloc_list *reloc;
expressionS ex;
int gotrel = 0;
int pltrel = 0;
int code = 0;
const char *relname;
input_line_pointer = str;
expression (&ex);
if (ex.X_op == O_constant && *input_line_pointer != '@')
{
long value = ex.X_add_number;
str = input_line_pointer;
str = skip_space (str);
*line = str;
if (sign)
wasm32_put_sleb128 (value);
else
{
if (value < 0)
as_bad (_("unexpected negative constant"));
wasm32_put_uleb128 (value);
}
input_line_pointer = t;
return str != str0;
}
reloc = XNEW (struct reloc_list);
reloc->u.a.offset_sym = expr_build_dot ();
if (ex.X_op == O_symbol)
{
reloc->u.a.sym = ex.X_add_symbol;
reloc->u.a.addend = ex.X_add_number;
}
else
{
reloc->u.a.sym = make_expr_symbol (&ex);
reloc->u.a.addend = 0;
}
/* i32.const fpointer@gotcode */
if (strncmp (input_line_pointer, "@gotcode", 8) == 0)
{
gotrel = 1;
code = 1;
input_line_pointer += 8;
}
/* i32.const data@got */
else if (strncmp (input_line_pointer, "@got", 4) == 0)
{
gotrel = 1;
input_line_pointer += 4;
}
/* call f@plt{__sigchar_FiiiiE} */
else if (strncmp (input_line_pointer, "@plt", 4) == 0)
{
char *end_of_sig;
pltrel = 1;
code = 1;
input_line_pointer += 4;
if (strncmp (input_line_pointer, "{", 1) == 0
&& (end_of_sig = strchr (input_line_pointer, '}')))
{
char *signature;
struct reloc_list *reloc2;
size_t siglength = end_of_sig - (input_line_pointer + 1);
signature = strndup (input_line_pointer + 1, siglength);
reloc2 = XNEW (struct reloc_list);
reloc2->u.a.offset_sym = expr_build_dot ();
reloc2->u.a.sym = symbol_find_or_make (signature);
reloc2->u.a.addend = 0;
reloc2->u.a.howto = bfd_reloc_name_lookup
(stdoutput, "R_WASM32_PLT_SIG");
reloc2->next = reloc_list;
reloc_list = reloc2;
input_line_pointer = end_of_sig + 1;
}
else
{
as_bad (_("no function type on PLT reloc"));
}
}
if (gotrel && code)
relname = "R_WASM32_LEB128_GOT_CODE";
else if (gotrel)
relname = "R_WASM32_LEB128_GOT";
else if (pltrel)
relname = "R_WASM32_LEB128_PLT";
else
relname = "R_WASM32_LEB128";
reloc->u.a.howto = bfd_reloc_name_lookup (stdoutput, relname);
if (!reloc->u.a.howto)
as_bad (_("couldn't find relocation to use"));
reloc->file = as_where (&reloc->line);
reloc->next = reloc_list;
reloc_list = reloc;
str = input_line_pointer;
str = skip_space (str);
*line = str;
wasm32_put_long_uleb128 (bits, 0);
input_line_pointer = t;
return str != str0;
}
/* Read an integer expression and produce an unsigned LEB128 integer,
or a relocation for it. */
static bfd_boolean
wasm32_uleb128 (char **line, int bits)
{
return wasm32_leb128 (line, bits, 0);
}
/* Read an integer expression and produce a signed LEB128 integer, or
a relocation for it. */
static bfd_boolean
wasm32_sleb128 (char **line, int bits)
{
return wasm32_leb128 (line, bits, 1);
}
/* Read an f32. (Like float_cons ('f')). */
static void
wasm32_f32 (char **line)
{
char *t = input_line_pointer;
input_line_pointer = *line;
float_cons ('f');
*line = input_line_pointer;
input_line_pointer = t;
}
/* Read an f64. (Like float_cons ('d')). */
static void
wasm32_f64 (char **line)
{
char *t = input_line_pointer;
input_line_pointer = *line;
float_cons ('d');
*line = input_line_pointer;
input_line_pointer = t;
}
/* Assemble a signature from LINE, replacing it with the new input
pointer. Signatures are simple expressions matching the regexp
F[ilfd]*v?E, and interpreted as though they were C++-mangled
function types on a 64-bit machine. */
static void
wasm32_signature (char **line)
{
unsigned long count = 0;
char *str = *line;
char *ostr;
char *result;
if (*str++ != 'F')
as_bad (_("Not a function type"));
result = str;
ostr = str + 1;
str++;
while (*str != 'E')
{
switch (*str++)
{
case 'i':
case 'l':
case 'f':
case 'd':
count++;
break;
default:
as_bad (_("Unknown type %c\n"), str[-1]);
}
}
wasm32_put_uleb128 (count);
str = ostr;
while (*str != 'E')
{
switch (*str++)
{
case 'i':
FRAG_APPEND_1_CHAR (BLOCK_TYPE_I32);
break;
case 'l':
FRAG_APPEND_1_CHAR (BLOCK_TYPE_I64);
break;
case 'f':
FRAG_APPEND_1_CHAR (BLOCK_TYPE_F32);
break;
case 'd':
FRAG_APPEND_1_CHAR (BLOCK_TYPE_F64);
break;
default:
as_bad (_("Unknown type"));
}
}
str++;
switch (*result)
{
case 'v':
FRAG_APPEND_1_CHAR (0x00); /* no return value */
break;
case 'i':
FRAG_APPEND_1_CHAR (0x01); /* one return value */
FRAG_APPEND_1_CHAR (BLOCK_TYPE_I32);
break;
case 'l':
FRAG_APPEND_1_CHAR (0x01); /* one return value */
FRAG_APPEND_1_CHAR (BLOCK_TYPE_I64);
break;
case 'f':
FRAG_APPEND_1_CHAR (0x01); /* one return value */
FRAG_APPEND_1_CHAR (BLOCK_TYPE_F32);
break;
case 'd':
FRAG_APPEND_1_CHAR (0x01); /* one return value */
FRAG_APPEND_1_CHAR (BLOCK_TYPE_F64);
break;
default:
as_bad (_("Unknown type"));
}
*line = str;
}
/* Main operands function. Read the operands for OPCODE from LINE,
replacing it with the new input pointer. */
static void
wasm32_operands (struct wasm32_opcode_s *opcode, char **line)
{
char *str = *line;
unsigned long block_type = 0;
FRAG_APPEND_1_CHAR (opcode->opcode);
str = skip_space (str);
if (str[0] == '[')
{
if (opcode->clas == wasm_typed)
{
str++;
block_type = BLOCK_TYPE_NONE;
if (str[0] != ']')
{
str = skip_space (str);
switch (str[0])
{
case 'i':
block_type = BLOCK_TYPE_I32;
str++;
break;
case 'l':
block_type = BLOCK_TYPE_I64;
str++;
break;
case 'f':
block_type = BLOCK_TYPE_F32;
str++;
break;
case 'd':
block_type = BLOCK_TYPE_F64;
str++;
break;
}
str = skip_space (str);
if (str[0] == ']')
str++;
else
as_bad (_("only single block types allowed"));
str = skip_space (str);
}
else
{
str++;
str = skip_space (str);
}
}
else
as_bad (_("instruction does not take a block type"));
}
switch (opcode->clas)
{
case wasm_drop:
case wasm_special:
case wasm_binary:
case wasm_unary:
case wasm_relational:
case wasm_select:
case wasm_eqz:
case wasm_conv:
case wasm_return:
break;
case wasm_typed:
if (block_type == 0)
as_bad (_("missing block type"));
FRAG_APPEND_1_CHAR (block_type);
break;
case wasm_store:
case wasm_load:
if (str[0] == 'a' && str[1] == '=')
{
str += 2;
if (!wasm32_uleb128 (&str, 32))
as_bad (_("missing alignment hint"));
}
else
{
as_bad (_("missing alignment hint"));
}
str = skip_space (str);
if (!wasm32_uleb128 (&str, 32))
as_bad (_("missing offset"));
break;
case wasm_set_local:
case wasm_get_local:
case wasm_tee_local:
if (!wasm32_uleb128 (&str, 32))
as_bad (_("missing local index"));
break;
case wasm_break:
case wasm_break_if:
if (!wasm32_uleb128 (&str, 32))
as_bad (_("missing break count"));
break;
case wasm_current_memory:
case wasm_grow_memory:
if (!wasm32_uleb128 (&str, 32))
as_bad (_("missing reserved current_memory/grow_memory argument"));
break;
case wasm_call:
if (!wasm32_uleb128 (&str, 32))
as_bad (_("missing call argument"));
break;
case wasm_call_indirect:
if (!wasm32_uleb128 (&str, 32))
as_bad (_("missing call signature"));
if (!wasm32_uleb128 (&str, 32))
as_bad (_("missing table index"));
break;
case wasm_constant_i32:
wasm32_sleb128 (&str, 32);
break;
case wasm_constant_i64:
wasm32_sleb128 (&str, 64);
break;
case wasm_constant_f32:
wasm32_f32 (&str);
return;
case wasm_constant_f64:
wasm32_f64 (&str);
return;
case wasm_break_table:
{
do
{
wasm32_uleb128 (&str, 32);
str = skip_space (str);
}
while (str[0]);
break;
}
case wasm_signature:
wasm32_signature (&str);
}
str = skip_space (str);
if (*str)
as_bad (_("junk at end of line, first unrecognized character is `%c'"),
*str);
*line = str;
return;
}
/* Main assembly function. Find the opcode and call
wasm32_operands(). */
void
md_assemble (char *str)
{
char op[32];
char *t;
struct wasm32_opcode_s *opcode;
str = skip_space (extract_opcode (str, op, sizeof (op)));
if (!op[0])
as_bad (_("can't find opcode "));
opcode = (struct wasm32_opcode_s *) hash_find (wasm32_hash, op);
if (opcode == NULL)
{
as_bad (_("unknown opcode `%s'"), op);
return;
}
dwarf2_emit_insn (0);
t = input_line_pointer;
wasm32_operands (opcode, &str);
input_line_pointer = t;
}
/* Don't replace PLT/GOT relocations with section symbols, so they
don't get an addend. */
int
wasm32_force_relocation (fixS * f)
{
if (f->fx_r_type == BFD_RELOC_WASM32_LEB128_PLT
|| f->fx_r_type == BFD_RELOC_WASM32_LEB128_GOT)
return 1;
return 0;
}
/* Don't replace PLT/GOT relocations with section symbols, so they
don't get an addend. */
bfd_boolean
wasm32_fix_adjustable (fixS * fixP)
{
if (fixP->fx_addsy == NULL)
return TRUE;
if (fixP->fx_r_type == BFD_RELOC_WASM32_LEB128_PLT
|| fixP->fx_r_type == BFD_RELOC_WASM32_LEB128_GOT)
return FALSE;
return TRUE;
}
/* Generate a reloc for FIXP. */
arelent *
tc_gen_reloc (asection * sec ATTRIBUTE_UNUSED, fixS * fixp)
{
arelent *reloc;
reloc = (arelent *) xmalloc (sizeof (*reloc));
reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
/* Make sure none of our internal relocations make it this far.
They'd better have been fully resolved by this point. */
gas_assert ((int) fixp->fx_r_type > 0);
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
if (reloc->howto == NULL)
{
as_bad_where (fixp->fx_file, fixp->fx_line,
_("cannot represent `%s' relocation in object file"),
bfd_get_reloc_code_name (fixp->fx_r_type));
return NULL;
}
reloc->addend = fixp->fx_offset;
return reloc;
}

89
gas/config/tc-wasm32.h Normal file
View File

@ -0,0 +1,89 @@
/* This file is tc-wasm32.h.
Copyright (C) 2017 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
#define TC_WASM32
#define TARGET_FORMAT "elf32-wasm32"
#define TARGET_ARCH bfd_arch_wasm32
#define TARGET_MACH 1
/* WebAssembly is strictly little-endian. */
#define TARGET_BYTES_BIG_ENDIAN 0
#define md_number_to_chars number_to_chars_littleendian
#define DIFF_EXPR_OK
/* No machine-dependent operand expressions. */
#define md_operand(x)
/* No broken word processing. */
#define WORKING_DOT_WORD
/* Force some relocations. */
#define EXTERN_FORCE_RELOC 1
extern int wasm32_force_relocation (struct fix *);
#define TC_FORCE_RELOCATION(fix) wasm32_force_relocation (fix)
#define TC_FORCE_RELOCATION_LOCAL(fix) 1
#define TC_FORCE_RELOCATION_SUB_SAME(fix,seg) wasm32_force_relocation (fix)
#define TC_FORCE_RELOCATION_SUB_ABS(fix,seg) wasm32_force_relocation (fix)
#define TC_FORCE_RELOCATION_SUB_LOCAL(fix,seg) wasm32_force_relocation (fix)
#define TC_VALIDATE_FIX_SUB(fix,seg) wasm32_force_relocation (fix)
/* This is ELF, values passed to md_apply_fix don't include the symbol
value. */
#define MD_APPLY_SYM_VALUE(FIX) 0
/* PC-relative relocations are relative to the relocation offset. */
#define MD_PCREL_FROM_SECTION(FIX, SEC) 0
#define DWARF2_LINE_MIN_INSN_LENGTH 1
/* WebAssembly uses 32-bit addresses. */
#define TC_ADDRESS_BYTES() 4
#define DWARF2_ADDR_SIZE(bfd) 4
/* Enable cfi directives. */
#define TARGET_USE_CFIPOP 1
/* The stack grows down, and there is no harm in claiming it is only
byte aligned. */
#define DWARF2_CIE_DATA_ALIGNMENT -1
/* Define the column that represents the PC. FIXME: this depends on
the ABI. */
#define DWARF2_DEFAULT_RETURN_COLUMN 36
/* Define a hook to setup initial CFI state. */
#define tc_cfi_frame_initial_instructions() do { } while (0)
#define elf_tc_final_processing()
#define md_post_relax_hook
#define md_start_line_hook()
#define HANDLE_ALIGN(fragP)
extern bfd_boolean wasm32_fix_adjustable (struct fix *);
#define tc_fix_adjustable(FIX) wasm32_fix_adjustable (FIX)
/* Type names for blocks and signatures. */
#define BLOCK_TYPE_NONE 0x40
#define BLOCK_TYPE_I32 0x7f
#define BLOCK_TYPE_I64 0x7e
#define BLOCK_TYPE_F32 0x7d
#define BLOCK_TYPE_F64 0x7c

View File

@ -111,6 +111,7 @@ case ${cpu} in
tilegx*) cpu_type=tilegx endian=little ;;
v850*) cpu_type=v850 ;;
visium) cpu_type=visium endian=big ;;
wasm32) cpu_type=wasm32 endian=little ;;
x86_64*) cpu_type=i386 arch=x86_64;;
xgate) cpu_type=xgate ;;
xtensa*) cpu_type=xtensa arch=xtensa ;;
@ -462,6 +463,8 @@ case ${generic_target} in
visium-*-elf) fmt=elf ;;
wasm32-*-*) fmt=elf ;;
xstormy16-*-*) fmt=elf ;;
xgate-*-*) fmt=elf ;;

View File

@ -77,6 +77,7 @@
@set V850
@set VAX
@set VISIUM
@set WASM32
@set XGATE
@set XSTORMY16
@set XTENSA

View File

@ -7728,8 +7728,11 @@ subject, see the hardware manufacturer's manual.
@ifset VISIUM
* Visium-Dependent:: Visium Dependent Features
@end ifset
@ifset WASM32
* WebAssembly-Dependent:: WebAssembly Dependent Features
@end ifset
@ifset XGATE
* XGATE-Dependent:: XGATE Features
* XGATE-Dependent:: XGATE Dependent Features
@end ifset
@ifset XSTORMY16
* XSTORMY16-Dependent:: XStormy16 Dependent Features
@ -7975,6 +7978,10 @@ family.
@include c-visium.texi
@end ifset
@ifset WASM32
@include c-wasm32.texi
@end ifset
@ifset XGATE
@include c-xgate.texi
@end ifset

119
gas/doc/c-wasm32.texi Normal file
View File

@ -0,0 +1,119 @@
@c Copyright (C) 2017 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@c man end
@ifset GENERIC
@page
@node WebAssembly-Dependent
@chapter WebAssembly Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter WebAssembly Dependent Features
@end ifclear
@cindex WebAssembly support
@menu
* WebAssembly-Notes:: Notes
* WebAssembly-Syntax:: Syntax
* WebAssembly-Floating-Point:: Floating Point
* WebAssembly-Opcodes:: Opcodes
* WebAssembly-module-layout:: Module Layout
@end menu
@node WebAssembly-Notes
@section Notes
@cindex WebAssembly notes
@cindex notes for WebAssembly
While WebAssembly provides its own module format for executables, this
documentation describes how to use @code{@value{AS}} to produce
intermediate ELF object format files.
@node WebAssembly-Syntax
@section Syntax
@cindex WebAssembly Syntax
The assembler syntax directly encodes sequences of opcodes as defined
in the WebAssembly binary encoding specification at
https://github.com/webassembly/spec/BinaryEncoding.md. Structured
sexp-style expressions are not supported as input.
@menu
* WebAssembly-Chars:: Special Characters
* WebAssembly-Relocs:: Relocations
* WebAssembly-Signatures:: Signatures
@end menu
@node WebAssembly-Chars
@subsection Special Characters
@cindex line comment character, WebAssembly
@cindex WebAssembly line comment character
@samp{#} and @samp{;} are the line comment characters. Note that if
@samp{#} is the first character on a line then it can also be a
logical line number directive (@pxref{Comments}) or a preprocessor
control command (@pxref{Preprocessing}).
@node WebAssembly-Relocs
@subsection Relocations
@cindex WebAssembly relocations
@cindex relocations, WebAssembly
Special relocations are available by using the @samp{@@@var{plt}},
@samp{@@@var{got}}, or @samp{@@@var{got}} suffixes after a constant
expression, which correspond to the R_ASMJS_LEB128_PLT,
R_ASMJS_LEB128_GOT, and R_ASMJS_LEB128_GOT_CODE relocations,
respectively.
The @samp{@@@var{plt}} suffix is followed by a symbol name in braces;
the symbol value is used to determine the function signature for which
a PLT stub is generated. Currently, the symbol @emph{name} is parsed
from its last @samp{F} character to determine the argument count of
the function, which is also necessary for generating a PLT stub.
@node WebAssembly-Signatures
@subsection Signatures
@cindex WebAssembly signatures
@cindex signatures, WebAssembly
Function signatures are specified with the @code{signature}
pseudo-opcode, followed by a simple function signature imitating a
C++-mangled function type: @code{F} followed by an optional @code{v},
then a sequence of @code{i}, @code{l}, @code{f}, and @code{d}
characters to mark i32, i64, f32, and f64 parameters, respectively;
followed by a final @code{E} to mark the end of the function
signature.
@node WebAssembly-Floating-Point
@section Floating Point
@cindex floating point, WebAssembly (@sc{ieee})
@cindex WebAssembly floating point (@sc{ieee})
WebAssembly uses little-endian @sc{ieee} floating-point numbers.
@node WebAssembly-Opcodes
@section Regular Opcodes
@cindex opcodes, WebAssembly
@cindex WebAssembly opcodes
Ordinary instructions are encoded with the WebAssembly mnemonics as
listed at:
@url{https://github.com/WebAssembly/design/blob/master/BinaryEncoding.md}.
Opcodes are written directly in the order in which they are encoded,
without going through an intermediate sexp-style expression as in the
@code{was} format.
For ``typed'' opcodes (block, if, etc.), the type of the block is
specified in square brackets following the opcode: @code{if[i]},
@code{if[]}.
@node WebAssembly-module-layout
@section WebAssembly Module Layout
@cindex module layout, WebAssembly
@cindex WebAssembly module layout
@code{@value{AS}} will only produce ELF output, not a valid
WebAssembly module. It is possible to make @code{@value{AS}} produce
output in a single ELF section which becomes a valid WebAssembly
module, but a linker script to do so may be preferrable, as it doesn't
require running the entire module through the assembler at once.

View File

@ -169,6 +169,8 @@ config/tc-vax.c
config/tc-vax.h
config/tc-visium.c
config/tc-visium.h
config/tc-wasm32.c
config/tc-wasm32.h
config/tc-xc16x.c
config/tc-xc16x.h
config/tc-xgate.c

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,198 @@
#as:
#objdump: -d
#name: allinsn
.*: +file format .*
Disassembly of section .text:
00000000 <.text>:
0: 02 40 block\[\]
2: 0c 00 br 0
4: 0d 00 br_if 0
6: 0e 01 01 01 br_table 1 1
a: 10 00 call 0x0
c: 11 00 00 call_indirect 0 0
f: 1a drop
10: 05 else
11: 0b end
12: 8b f32.abs
13: 92 f32.add
14: 8d f32.ceil
15: 43 d0 0f 49 f32.const 3.141590118408203125
19: 40
1a: b2 f32.convert_s_i32
1b: b4 f32.convert_s_i64
1c: b3 f32.convert_u_i32
1d: b5 f32.convert_u_i64
1e: 98 f32.copysign
1f: b6 f32.demote_f64
20: 95 f32.div
21: 5b f32.eq
22: 8e f32.floor
23: 60 f32.ge
24: 5e f32.gt
25: 5f f32.le
26: 2a 00 00 f32.load a=0 0
29: 5d f32.lt
2a: 97 f32.max
2b: 96 f32.min
2c: 94 f32.mul
2d: 5c f32.ne
2e: 90 f32.nearest
2f: 8c f32.neg
30: be f32.reinterpret_i32
31: 91 f32.sqrt
32: 38 00 00 f32.store a=0 0
35: 93 f32.sub
36: 8f f32.trunc
37: 99 f64.abs
38: a0 f64.add
39: 9b f64.ceil
3a: 44 97 5f 4f f64.const 3.14158999999999976088e\+200
3e: fd bc 6a 90
42: 69
43: b7 f64.convert_s_i32
44: b9 f64.convert_s_i64
45: b8 f64.convert_u_i32
46: ba f64.convert_u_i64
47: a6 f64.copysign
48: a3 f64.div
49: 61 f64.eq
4a: 9c f64.floor
4b: 66 f64.ge
4c: 64 f64.gt
4d: 65 f64.le
4e: 2b 00 00 f64.load a=0 0
51: 63 f64.lt
52: a5 f64.max
53: a4 f64.min
54: a2 f64.mul
55: 62 f64.ne
56: 9e f64.nearest
57: 9a f64.neg
58: bb f64.promote_f32
59: bf f64.reinterpret_i64
5a: 9f f64.sqrt
5b: 39 00 00 f64.store a=0 0
5e: a1 f64.sub
5f: 9d f64.trunc
60: 23 00 get_global 0 <\$got>
62: 20 00 get_local 0 <\$dpc>
64: 6a i32.add
65: 71 i32.and
66: 67 i32.clz
67: 41 ef fd b6 i32.const 3735928559
6b: f5 0d
6d: 68 i32.ctz
6e: 6d i32.div_s
6f: 6e i32.div_u
70: 46 i32.eq
71: 45 i32.eqz
72: 4e i32.ge_s
73: 4f i32.ge_u
74: 4a i32.gt_s
75: 4b i32.gt_u
76: 4c i32.le_s
77: 4d i32.le_u
78: 28 00 00 i32.load a=0 0
7b: 2e 00 00 i32.load16_s a=0 0
7e: 2f 00 00 i32.load16_u a=0 0
81: 2c 00 00 i32.load8_s a=0 0
84: 2d 00 00 i32.load8_u a=0 0
87: 48 i32.lt_s
88: 49 i32.lt_u
89: 6c i32.mul
8a: 47 i32.ne
8b: 72 i32.or
8c: 69 i32.popcnt
8d: bc i32.reinterpret_f32
8e: 6f i32.rem_s
8f: 70 i32.rem_u
90: 77 i32.rotl
91: 78 i32.rotr
92: 74 i32.shl
93: 75 i32.shr_s
94: 76 i32.shr_u
95: 36 00 00 i32.store a=0 0
98: 3b 00 00 i32.store16 a=0 0
9b: 3a 00 00 i32.store8 a=0 0
9e: 6b i32.sub
9f: a8 i32.trunc_s_f32
a0: aa i32.trunc_s_f64
a1: a9 i32.trunc_u_f32
a2: ab i32.trunc_u_f64
a3: a7 i32.wrap_i64
a4: 73 i32.xor
a5: 7c i64.add
a6: 83 i64.and
a7: 79 i64.clz
a8: 42 ef fd b6 i64.const -2401053088876216593
ac: f5 fd dd ef
b0: d6 5e
b2: 7a i64.ctz
b3: 7f i64.div_s
b4: 80 i64.div_u
b5: 51 i64.eq
b6: 50 i64.eqz
b7: ac i64.extend_s_i32
b8: ad i64.extend_u_i32
b9: 59 i64.ge_s
ba: 5a i64.ge_u
bb: 55 i64.gt_s
bc: 56 i64.gt_u
bd: 57 i64.le_s
be: 58 i64.le_u
bf: 29 00 00 i64.load a=0 0
c2: 32 00 00 i64.load16_s a=0 0
c5: 33 00 00 i64.load16_u a=0 0
c8: 34 00 00 i64.load32_s a=0 0
cb: 35 00 00 i64.load32_u a=0 0
ce: 30 00 00 i64.load8_s a=0 0
d1: 31 00 00 i64.load8_u a=0 0
d4: 53 i64.lt_s
d5: 54 i64.lt_u
d6: 7e i64.mul
d7: 52 i64.ne
d8: 84 i64.or
d9: 7b i64.popcnt
da: bd i64.reinterpret_f64
db: 81 i64.rem_s
dc: 82 i64.rem_u
dd: 89 i64.rotl
de: 8a i64.rotr
df: 86 i64.shl
e0: 87 i64.shr_s
e1: 88 i64.shr_u
e2: 37 00 00 i64.store a=0 0
e5: 3d 00 00 i64.store16 a=0 0
e8: 3e 00 00 i64.store32 a=0 0
eb: 3c 00 00 i64.store8 a=0 0
ee: 7d i64.sub
ef: ae i64.trunc_s_f32
f0: b0 i64.trunc_s_f64
f1: af i64.trunc_u_f32
f2: b1 i64.trunc_u_f64
f3: 85 i64.xor
f4: 04 7f if\[i\]
f6: 03 7e loop\[l\]
f8: 01 nop
f9: 0f return
fa: 1b select
fb: 24 00 set_global 0 <\$got>
fd: 21 00 set_local 0 <\$dpc>
ff: 60 f32.ge
100: 08 .byte 08
101: 7f i64.div_s
102: 7e i64.mul
103: 7c i64.add
104: 7d i64.sub
105: 7d i64.sub
106: 7c i64.add
107: 7e i64.mul
108: 7f i64.div_s
109: 00 unreachable
10a: 22 00 tee_local 0 <\$dpc>
...

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@ -0,0 +1,171 @@
block[]
br 0
br_if 0
br_table 1 1 1
call 0
call_indirect 0 0
drop
else
end
f32.abs
f32.add
f32.ceil
f32.const 3.14159
f32.convert_s/i32
f32.convert_s/i64
f32.convert_u/i32
f32.convert_u/i64
f32.copysign
f32.demote/f64
f32.div
f32.eq
f32.floor
f32.ge
f32.gt
f32.le
f32.load a=0 0
f32.lt
f32.max
f32.min
f32.mul
f32.ne
f32.nearest
f32.neg
f32.reinterpret/i32
f32.sqrt
f32.store a=0 0
f32.sub
f32.trunc
f64.abs
f64.add
f64.ceil
f64.const 3.14159e200
f64.convert_s/i32
f64.convert_s/i64
f64.convert_u/i32
f64.convert_u/i64
f64.copysign
f64.div
f64.eq
f64.floor
f64.ge
f64.gt
f64.le
f64.load a=0 0
f64.lt
f64.max
f64.min
f64.mul
f64.ne
f64.nearest
f64.neg
f64.promote/f32
f64.reinterpret/i64
f64.sqrt
f64.store a=0 0
f64.sub
f64.trunc
get_global 0
get_local 0
i32.add
i32.and
i32.clz
i32.const 0xdeadbeef
i32.ctz
i32.div_s
i32.div_u
i32.eq
i32.eqz
i32.ge_s
i32.ge_u
i32.gt_s
i32.gt_u
i32.le_s
i32.le_u
i32.load a=0 0
i32.load16_s a=0 0
i32.load16_u a=0 0
i32.load8_s a=0 0
i32.load8_u a=0 0
i32.lt_s
i32.lt_u
i32.mul
i32.ne
i32.or
i32.popcnt
i32.reinterpret/f32
i32.rem_s
i32.rem_u
i32.rotl
i32.rotr
i32.shl
i32.shr_s
i32.shr_u
i32.store a=0 0
i32.store16 a=0 0
i32.store8 a=0 0
i32.sub
i32.trunc_s/f32
i32.trunc_s/f64
i32.trunc_u/f32
i32.trunc_u/f64
i32.wrap/i64
i32.xor
i64.add
i64.and
i64.clz
i64.const 0xdeadbeefdeadbeef
i64.ctz
i64.div_s
i64.div_u
i64.eq
i64.eqz
i64.extend_s/i32
i64.extend_u/i32
i64.ge_s
i64.ge_u
i64.gt_s
i64.gt_u
i64.le_s
i64.le_u
i64.load a=0 0
i64.load16_s a=0 0
i64.load16_u a=0 0
i64.load32_s a=0 0
i64.load32_u a=0 0
i64.load8_s a=0 0
i64.load8_u a=0 0
i64.lt_s
i64.lt_u
i64.mul
i64.ne
i64.or
i64.popcnt
i64.reinterpret/f64
i64.rem_s
i64.rem_u
i64.rotl
i64.rotr
i64.shl
i64.shr_s
i64.shr_u
i64.store a=0 0
i64.store16 a=0 0
i64.store32 a=0 0
i64.store8 a=0 0
i64.sub
i64.trunc_s/f32
i64.trunc_s/f64
i64.trunc_u/f32
i64.trunc_u/f64
i64.xor
if[i]
loop[l]
nop
return
select
set_global 0
set_local 0
signature FvildffdliE
tee_local 0
unreachable

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
br_if -2

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
br_table 0 0 0

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
br_table 0 1 2

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
br_table 2 0

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
br_table

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
br_table[i]

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
call 0 1

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
call[i] 0

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
drop 3

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
else[i]

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
block[ii]

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
end[i]

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
f32.abs 0

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
f32.demote_f32

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
f32.load 0 a=0

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
block[li]

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
block[q]

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
block 3

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
block[i] 3

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
br

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
br 0 1

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
br -1

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@ -0,0 +1,3 @@
#...
.*Error.*
#pass

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@ -0,0 +1 @@
block[ii]

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@ -0,0 +1,18 @@
#as:
#objdump: -dr
#name: reloc
.*: +file format .*
Disassembly of section .text:
00000000 <.text>:
0: 41 80 80 80 i32.const 0
4: 80 00
1: R_ASMJS_LEB128_PLT f
6: 41 80 80 80 i32.const 0
a: 80 00
7: R_ASMJS_LEB128_GOT x
c: 41 80 80 80 i32.const 0
10: 80 00
d: R_ASMJS_LEB128_GOT_CODE f

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@ -0,0 +1,3 @@
i32.const f@plt
i32.const x@got
i32.const f@gotcode

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@ -0,0 +1,58 @@
# Expect script for wasm32 tests.
# Copyright (C) 2017 Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
# wasm32 assembler testsuite.
if [istarget wasm32-*-*] {
# no disassembler support yet
setup_xfail "wasm32-*-*"
run_dump_test "allinsn"
# no GOT/PLT relocs yet.
setup_xfail "wasm32-*-*"
run_dump_test "reloc"
run_list_test "illegal"
run_list_test "illegal-2"
run_list_test "illegal-3"
run_list_test "illegal-4"
run_list_test "illegal-5"
run_list_test "illegal-6"
run_list_test "illegal-7"
run_list_test "illegal-8"
run_list_test "illegal-9"
run_list_test "illegal-10"
setup_xfail "wasm32-*-*"
run_list_test "illegal-11"
setup_xfail "wasm32-*-*"
run_list_test "illegal-12"
setup_xfail "wasm32-*-*"
run_list_test "illegal-13"
run_list_test "illegal-14"
run_list_test "illegal-15"
run_list_test "illegal-16"
run_list_test "illegal-17"
run_list_test "illegal-18"
run_list_test "illegal-19"
run_list_test "illegal-20"
run_list_test "illegal-21"
run_list_test "illegal-22"
# illegal-23 has become legal
run_list_test "illegal-24"
run_list_test "illegal-25"
}

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@ -1,3 +1,8 @@
2017-03-30 Pip Cet <pipcet@gmail.com>
* opcode/wasm.h: New file to support wasm32 architecture.
* elf/wasm32.h: Add R_WASM32_32 relocation.
2017-03-29 Alan Modra <amodra@gmail.com>
* opcode/ppc.h (PPC_OPCODE_RAW): Define.

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@ -23,6 +23,8 @@
/* Relocation types. */
START_RELOC_NUMBERS (elf_wasm32_reloc_type)
RELOC_NUMBER (R_WASM32_NONE, 0)
RELOC_NUMBER (R_WASM32_32, 1)
END_RELOC_NUMBERS (R_WASM32_max = 1)
#endif /* _ELF_WASM32_H */

226
include/opcode/wasm.h Normal file
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@ -0,0 +1,226 @@
/* WebAssembly assembler/disassembler support.
Copyright (C) 2017 Free Software Foundation, Inc.
This file is part of GAS, the GNU assembler.
GAS is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING3. If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
/* WebAssembly opcodes. Each opcode invokes the WASM_OPCODE macro
with the following arguments:
1. Code byte.
2. Mnemonic.
3. Input type.
4. Output type.
5. Opcode class.
6. Signedness information.
*/
WASM_OPCODE (0x00, "unreachable", void, void, special, agnostic)
WASM_OPCODE (0x01, "nop", void, void, special, agnostic)
WASM_OPCODE (0x02, "block", void, void, typed, agnostic)
WASM_OPCODE (0x03, "loop", void, void, typed, agnostic)
WASM_OPCODE (0x04, "if", void, void, typed, agnostic)
WASM_OPCODE (0x05, "else", void, void, special, agnostic)
WASM_OPCODE (0x0b, "end", void, void, special, agnostic)
WASM_OPCODE (0x0c, "br", void, void, break, agnostic)
WASM_OPCODE (0x0d, "br_if", void, void, break_if, agnostic)
WASM_OPCODE (0x0e, "br_table", void, void, break_table, agnostic)
WASM_OPCODE (0x0f, "return", void, void, return, agnostic)
WASM_OPCODE (0x10, "call", any, any, call, agnostic)
WASM_OPCODE (0x11, "call_indirect", any, any, call_indirect, agnostic)
WASM_OPCODE (0x1a, "drop", any, any, drop, agnostic)
WASM_OPCODE (0x1b, "select", any, any, select, agnostic)
WASM_OPCODE (0x20, "get_local", any, any, get_local, agnostic)
WASM_OPCODE (0x21, "set_local", any, any, set_local, agnostic)
WASM_OPCODE (0x22, "tee_local", any, any, tee_local, agnostic)
WASM_OPCODE (0x23, "get_global", any, any, get_local, agnostic)
WASM_OPCODE (0x24, "set_global", any, any, set_local, agnostic)
WASM_OPCODE (0x28, "i32.load", i32, i32, load, agnostic)
WASM_OPCODE (0x29, "i64.load", i32, i64, load, agnostic)
WASM_OPCODE (0x2a, "f32.load", i32, f32, load, agnostic)
WASM_OPCODE (0x2b, "f64.load", i32, f64, load, agnostic)
WASM_OPCODE (0x2c, "i32.load8_s", i32, i32, load, signed)
WASM_OPCODE (0x2d, "i32.load8_u", i32, i32, load, unsigned)
WASM_OPCODE (0x2e, "i32.load16_s", i32, i32, load, signed)
WASM_OPCODE (0x2f, "i32.load16_u", i32, i32, load, unsigned)
WASM_OPCODE (0x30, "i64.load8_s", i32, i64, load, signed)
WASM_OPCODE (0x31, "i64.load8_u", i32, i64, load, unsigned)
WASM_OPCODE (0x32, "i64.load16_s", i32, i64, load, signed)
WASM_OPCODE (0x33, "i64.load16_u", i32, i64, load, unsigned)
WASM_OPCODE (0x34, "i64.load32_s", i32, i64, load, signed)
WASM_OPCODE (0x35, "i64.load32_u", i32, i64, load, unsigned)
WASM_OPCODE (0x36, "i32.store", i32, void, store, agnostic)
WASM_OPCODE (0x37, "i64.store", i64, void, store, agnostic)
WASM_OPCODE (0x38, "f32.store", f32, void, store, agnostic)
WASM_OPCODE (0x39, "f64.store", f64, void, store, agnostic)
WASM_OPCODE (0x3a, "i32.store8", i32, void, store, agnostic)
WASM_OPCODE (0x3b, "i32.store16", i32, void, store, agnostic)
WASM_OPCODE (0x3c, "i64.store8", i64, void, store, agnostic)
WASM_OPCODE (0x3d, "i64.store16", i64, void, store, agnostic)
WASM_OPCODE (0x3e, "i64.store32", i64, void, store, agnostic)
WASM_OPCODE (0x3f, "current_memory", void, i32, current_memory, agnostic)
WASM_OPCODE (0x40, "grow_memory", void, i32, grow_memory, agnostic)
WASM_OPCODE (0x41, "i32.const", i32, i32, constant_i32, agnostic)
WASM_OPCODE (0x42, "i64.const", i64, i64, constant_i64, agnostic)
WASM_OPCODE (0x43, "f32.const", f32, f32, constant_f32, agnostic)
WASM_OPCODE (0x44, "f64.const", f64, f64, constant_f64, agnostic)
WASM_OPCODE (0x45, "i32.eqz", i32, i32, eqz, agnostic)
WASM_OPCODE (0x46, "i32.eq", i32, i32, relational, agnostic)
WASM_OPCODE (0x47, "i32.ne", i32, i32, relational, agnostic)
WASM_OPCODE (0x48, "i32.lt_s", i32, i32, relational, signed)
WASM_OPCODE (0x49, "i32.lt_u", i32, i32, relational, unsigned)
WASM_OPCODE (0x4a, "i32.gt_s", i32, i32, relational, signed)
WASM_OPCODE (0x4b, "i32.gt_u", i32, i32, relational, unsigned)
WASM_OPCODE (0x4c, "i32.le_s", i32, i32, relational, signed)
WASM_OPCODE (0x4d, "i32.le_u", i32, i32, relational, unsigned)
WASM_OPCODE (0x4e, "i32.ge_s", i32, i32, relational, signed)
WASM_OPCODE (0x4f, "i32.ge_u", i32, i32, relational, unsigned)
WASM_OPCODE (0x50, "i64.eqz", i64, i32, eqz, agnostic)
WASM_OPCODE (0x51, "i64.eq", i64, i32, relational, agnostic)
WASM_OPCODE (0x52, "i64.ne", i64, i32, relational, agnostic)
WASM_OPCODE (0x53, "i64.lt_s", i64, i32, relational, signed)
WASM_OPCODE (0x54, "i64.lt_u", i64, i32, relational, unsigned)
WASM_OPCODE (0x55, "i64.gt_s", i64, i32, relational, signed)
WASM_OPCODE (0x56, "i64.gt_u", i64, i32, relational, unsigned)
WASM_OPCODE (0x57, "i64.le_s", i64, i32, relational, signed)
WASM_OPCODE (0x58, "i64.le_u", i64, i32, relational, unsigned)
WASM_OPCODE (0x59, "i64.ge_s", i64, i32, relational, signed)
WASM_OPCODE (0x5a, "i64.ge_u", i64, i32, relational, unsigned)
WASM_OPCODE (0x5b, "f32.eq", f32, i32, relational, floating)
WASM_OPCODE (0x5c, "f32.ne", f32, i32, relational, floating)
WASM_OPCODE (0x5d, "f32.lt", f32, i32, relational, floating)
WASM_OPCODE (0x5e, "f32.gt", f32, i32, relational, floating)
WASM_OPCODE (0x5f, "f32.le", f32, i32, relational, floating)
WASM_OPCODE (0x60, "f32.ge", f32, i32, relational, floating)
WASM_OPCODE (0x61, "f64.eq", f64, i32, relational, floating)
WASM_OPCODE (0x62, "f64.ne", f64, i32, relational, floating)
WASM_OPCODE (0x63, "f64.lt", f64, i32, relational, floating)
WASM_OPCODE (0x64, "f64.gt", f64, i32, relational, floating)
WASM_OPCODE (0x65, "f64.le", f64, i32, relational, floating)
WASM_OPCODE (0x66, "f64.ge", f64, i32, relational, floating)
WASM_OPCODE (0x67, "i32.clz", i32, i32, unary, agnostic)
WASM_OPCODE (0x68, "i32.ctz", i32, i32, unary, agnostic)
WASM_OPCODE (0x69, "i32.popcnt", i32, i32, unary, agnostic)
WASM_OPCODE (0x6a, "i32.add", i32, i32, binary, agnostic)
WASM_OPCODE (0x6b, "i32.sub", i32, i32, binary, agnostic)
WASM_OPCODE (0x6c, "i32.mul", i32, i32, binary, agnostic)
WASM_OPCODE (0x6d, "i32.div_s", i32, i32, binary, signed)
WASM_OPCODE (0x6e, "i32.div_u", i32, i32, binary, unsigned)
WASM_OPCODE (0x6f, "i32.rem_s", i32, i32, binary, signed)
WASM_OPCODE (0x70, "i32.rem_u", i32, i32, binary, unsigned)
WASM_OPCODE (0x71, "i32.and", i32, i32, binary, agnostic)
WASM_OPCODE (0x72, "i32.or", i32, i32, binary, agnostic)
WASM_OPCODE (0x73, "i32.xor", i32, i32, binary, agnostic)
WASM_OPCODE (0x74, "i32.shl", i32, i32, binary, agnostic)
WASM_OPCODE (0x75, "i32.shr_s", i32, i32, binary, signed)
WASM_OPCODE (0x76, "i32.shr_u", i32, i32, binary, unsigned)
WASM_OPCODE (0x77, "i32.rotl", i32, i32, binary, agnostic)
WASM_OPCODE (0x78, "i32.rotr", i32, i32, binary, agnostic)
WASM_OPCODE (0x79, "i64.clz", i64, i64, unary, agnostic)
WASM_OPCODE (0x7a, "i64.ctz", i64, i64, unary, agnostic)
WASM_OPCODE (0x7b, "i64.popcnt", i64, i64, unary, agnostic)
WASM_OPCODE (0x7c, "i64.add", i64, i64, binary, agnostic)
WASM_OPCODE (0x7d, "i64.sub", i64, i64, binary, agnostic)
WASM_OPCODE (0x7e, "i64.mul", i64, i64, binary, agnostic)
WASM_OPCODE (0x7f, "i64.div_s", i64, i64, binary, signed)
WASM_OPCODE (0x80, "i64.div_u", i64, i64, binary, unsigned)
WASM_OPCODE (0x81, "i64.rem_s", i64, i64, binary, signed)
WASM_OPCODE (0x82, "i64.rem_u", i64, i64, binary, unsigned)
WASM_OPCODE (0x83, "i64.and", i64, i64, binary, agnostic)
WASM_OPCODE (0x84, "i64.or", i64, i64, binary, agnostic)
WASM_OPCODE (0x85, "i64.xor", i64, i64, binary, agnostic)
WASM_OPCODE (0x86, "i64.shl", i64, i64, binary, agnostic)
WASM_OPCODE (0x87, "i64.shr_s", i64, i64, binary, signed)
WASM_OPCODE (0x88, "i64.shr_u", i64, i64, binary, unsigned)
WASM_OPCODE (0x89, "i64.rotl", i64, i64, binary, agnostic)
WASM_OPCODE (0x8a, "i64.rotr", i64, i64, binary, agnostic)
WASM_OPCODE (0x8b, "f32.abs", f32, f32, unary, floating)
WASM_OPCODE (0x8c, "f32.neg", f32, f32, unary, floating)
WASM_OPCODE (0x8d, "f32.ceil", f32, f32, unary, floating)
WASM_OPCODE (0x8e, "f32.floor", f32, f32, unary, floating)
WASM_OPCODE (0x8f, "f32.trunc", f32, f32, unary, floating)
WASM_OPCODE (0x90, "f32.nearest", f32, f32, unary, floating)
WASM_OPCODE (0x91, "f32.sqrt", f32, f32, unary, floating)
WASM_OPCODE (0x92, "f32.add", f32, f32, binary, floating)
WASM_OPCODE (0x93, "f32.sub", f32, f32, binary, floating)
WASM_OPCODE (0x94, "f32.mul", f32, f32, binary, floating)
WASM_OPCODE (0x95, "f32.div", f32, f32, binary, floating)
WASM_OPCODE (0x96, "f32.min", f32, f32, binary, floating)
WASM_OPCODE (0x97, "f32.max", f32, f32, binary, floating)
WASM_OPCODE (0x98, "f32.copysign", f32, f32, binary, floating)
WASM_OPCODE (0x99, "f64.abs", f64, f64, unary, floating)
WASM_OPCODE (0x9a, "f64.neg", f64, f64, unary, floating)
WASM_OPCODE (0x9b, "f64.ceil", f64, f64, unary, floating)
WASM_OPCODE (0x9c, "f64.floor", f64, f64, unary, floating)
WASM_OPCODE (0x9d, "f64.trunc", f64, f64, unary, floating)
WASM_OPCODE (0x9e, "f64.nearest", f64, f64, unary, floating)
WASM_OPCODE (0x9f, "f64.sqrt", f64, f64, unary, floating)
WASM_OPCODE (0xa0, "f64.add", f64, f64, binary, floating)
WASM_OPCODE (0xa1, "f64.sub", f64, f64, binary, floating)
WASM_OPCODE (0xa2, "f64.mul", f64, f64, binary, floating)
WASM_OPCODE (0xa3, "f64.div", f64, f64, binary, floating)
WASM_OPCODE (0xa4, "f64.min", f64, f64, binary, floating)
WASM_OPCODE (0xa5, "f64.max", f64, f64, binary, floating)
WASM_OPCODE (0xa6, "f64.copysign", f64, f64, binary, floating)
WASM_OPCODE (0xa7, "i32.wrap/i64", i64, i32, conv, agnostic)
WASM_OPCODE (0xa8, "i32.trunc_s/f32", f32, i32, conv, signed)
WASM_OPCODE (0xa9, "i32.trunc_u/f32", f32, i32, conv, unsigned)
WASM_OPCODE (0xaa, "i32.trunc_s/f64", f64, i32, conv, signed)
WASM_OPCODE (0xab, "i32.trunc_u/f64", f64, i32, conv, unsigned)
WASM_OPCODE (0xac, "i64.extend_s/i32", i32, i64, conv, signed)
WASM_OPCODE (0xad, "i64.extend_u/i32", i32, i64, conv, unsigned)
WASM_OPCODE (0xae, "i64.trunc_s/f32", f32, i64, conv, signed)
WASM_OPCODE (0xaf, "i64.trunc_u/f32", f32, i64, conv, unsigned)
WASM_OPCODE (0xb0, "i64.trunc_s/f64", f64, i64, conv, signed)
WASM_OPCODE (0xb1, "i64.trunc_u/f64", f64, i64, conv, unsigned)
WASM_OPCODE (0xb2, "f32.convert_s/i32", i32, f32, conv, signed)
WASM_OPCODE (0xb3, "f32.convert_u/i32", i32, f32, conv, unsigned)
WASM_OPCODE (0xb4, "f32.convert_s/i64", i64, f32, conv, signed)
WASM_OPCODE (0xb5, "f32.convert_u/i64", i64, f32, conv, unsigned)
WASM_OPCODE (0xb6, "f32.demote/f64", f64, f32, conv, floating)
WASM_OPCODE (0xb7, "f64.convert_s/i32", i32, f64, conv, signed)
WASM_OPCODE (0xb8, "f64.convert_u/i32", i32, f64, conv, unsigned)
WASM_OPCODE (0xb9, "f64.convert_s/i64", i64, f64, conv, signed)
WASM_OPCODE (0xba, "f64.convert_u/i64", i64, f64, conv, unsigned)
WASM_OPCODE (0xbb, "f64.promote/f32", f32, f64, conv, floating)
WASM_OPCODE (0xbc, "i32.reinterpret/f32", f32, i32, conv, agnostic)
WASM_OPCODE (0xbd, "i64.reinterpret/f64", f64, i64, conv, agnostic)
WASM_OPCODE (0xbe, "f32.reinterpret/i32", i32, f32, conv, agnostic)
WASM_OPCODE (0xbf, "f64.reinterpret/i64", i64, f64, conv, agnostic)
/* This isn't, strictly speaking, an opcode, but is treated as such by
the assembler. */
WASM_OPCODE (0x60, "signature", void, void, signature, agnostic)

View File

@ -1,3 +1,9 @@
2017-03-30 Pip Cet <pipcet@gmail.com>
* configure.ac: Add (empty) bfd_wasm32_arch target.
* configure: Regenerate
* po/opcodes.pot: Regenerate.
2017-03-29 Sheldon Lobo <sheldon.lobo@oracle.com>
Add support for missing SPARC ASIs from UA2005, UA2007, OSA2011, &

1
opcodes/configure vendored
View File

@ -12724,6 +12724,7 @@ if test x${all_targets} = xfalse ; then
bfd_vax_arch) ta="$ta vax-dis.lo" ;;
bfd_visium_arch) ta="$ta visium-dis.lo visium-opc.lo" ;;
bfd_w65_arch) ta="$ta w65-dis.lo" ;;
bfd_wasm32_arch) ;;
bfd_we32k_arch) ;;
bfd_xc16x_arch) ta="$ta xc16x-asm.lo xc16x-desc.lo xc16x-dis.lo xc16x-ibld.lo xc16x-opc.lo" using_cgen=yes ;;
bfd_xgate_arch) ta="$ta xgate-dis.lo xgate-opc.lo" ;;

View File

@ -348,6 +348,7 @@ if test x${all_targets} = xfalse ; then
bfd_vax_arch) ta="$ta vax-dis.lo" ;;
bfd_visium_arch) ta="$ta visium-dis.lo visium-opc.lo" ;;
bfd_w65_arch) ta="$ta w65-dis.lo" ;;
bfd_wasm32_arch) ;;
bfd_we32k_arch) ;;
bfd_xc16x_arch) ta="$ta xc16x-asm.lo xc16x-desc.lo xc16x-dis.lo xc16x-ibld.lo xc16x-opc.lo" using_cgen=yes ;;
bfd_xgate_arch) ta="$ta xgate-dis.lo xgate-opc.lo" ;;

View File

@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: bug-binutils@gnu.org\n"
"POT-Creation-Date: 2017-02-08 13:38-0600\n"
"POT-Creation-Date: 2017-03-29 17:08+0100\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"
@ -18,12 +18,12 @@ msgstr ""
"Content-Transfer-Encoding: 8bit\n"
#. Invalid option.
#: aarch64-dis.c:81 arc-dis.c:769 arm-dis.c:6158
#: aarch64-dis.c:81 arc-dis.c:769 arm-dis.c:6128
#, c-format
msgid "Unrecognised disassembler option: %s\n"
msgstr ""
#: aarch64-dis.c:3200
#: aarch64-dis.c:3217
#, c-format
msgid ""
"\n"
@ -31,225 +31,233 @@ msgid ""
"with the -M switch (multiple options should be separated by commas):\n"
msgstr ""
#: aarch64-dis.c:3204
#: aarch64-dis.c:3221
#, c-format
msgid ""
"\n"
" no-aliases Don't print instruction aliases.\n"
msgstr ""
#: aarch64-dis.c:3207
#: aarch64-dis.c:3224
#, c-format
msgid ""
"\n"
" aliases Do print instruction aliases.\n"
msgstr ""
#: aarch64-dis.c:3211
#: aarch64-dis.c:3228
#, c-format
msgid ""
"\n"
" debug_dump Temp switch for debug trace.\n"
msgstr ""
#: aarch64-dis.c:3215 mips-dis.c:2477 mips-dis.c:2485 mips-dis.c:2487
#: aarch64-dis.c:3232 mips-dis.c:2477 mips-dis.c:2485 mips-dis.c:2487
#: riscv-dis.c:506
#, c-format
msgid "\n"
msgstr ""
#: aarch64-opc.c:1303
#: aarch64-opc.c:1306
msgid "immediate value"
msgstr ""
#: aarch64-opc.c:1313
#: aarch64-opc.c:1316
msgid "immediate offset"
msgstr ""
#: aarch64-opc.c:1323
#: aarch64-opc.c:1326
msgid "register number"
msgstr ""
#: aarch64-opc.c:1333
#: aarch64-opc.c:1336
msgid "register element index"
msgstr ""
#: aarch64-opc.c:1343
#: aarch64-opc.c:1346
msgid "shift amount"
msgstr ""
#: aarch64-opc.c:1355
#: aarch64-opc.c:1358
msgid "multiplier"
msgstr ""
#: aarch64-opc.c:1428
#: aarch64-opc.c:1431
msgid "reg pair must start from even reg"
msgstr ""
#: aarch64-opc.c:1434
#: aarch64-opc.c:1437
msgid "reg pair must be contiguous"
msgstr ""
#: aarch64-opc.c:1448
#: aarch64-opc.c:1451
msgid "extraneous register"
msgstr ""
#: aarch64-opc.c:1454
#: aarch64-opc.c:1457
msgid "missing register"
msgstr ""
#: aarch64-opc.c:1465
#: aarch64-opc.c:1468
msgid "stack pointer register expected"
msgstr ""
#: aarch64-opc.c:1491
msgid "z0-z15 expected"
msgstr ""
#: aarch64-opc.c:1492
msgid "z0-z7 expected"
msgstr ""
#: aarch64-opc.c:1518
msgid "invalid register list"
msgstr ""
#: aarch64-opc.c:1506
#: aarch64-opc.c:1532
msgid "p0-p7 expected"
msgstr ""
#: aarch64-opc.c:1532 aarch64-opc.c:1540
#: aarch64-opc.c:1558 aarch64-opc.c:1566
msgid "unexpected address writeback"
msgstr ""
#: aarch64-opc.c:1551
#: aarch64-opc.c:1577
msgid "address writeback expected"
msgstr ""
#: aarch64-opc.c:1597
#: aarch64-opc.c:1623
msgid "negative or unaligned offset expected"
msgstr ""
#: aarch64-opc.c:1624
#: aarch64-opc.c:1650
msgid "invalid register offset"
msgstr ""
#: aarch64-opc.c:1646
#: aarch64-opc.c:1672
msgid "invalid post-increment amount"
msgstr ""
#: aarch64-opc.c:1662 aarch64-opc.c:2132
#: aarch64-opc.c:1688 aarch64-opc.c:2165
msgid "invalid shift amount"
msgstr ""
#: aarch64-opc.c:1675
#: aarch64-opc.c:1701
msgid "invalid extend/shift operator"
msgstr ""
#: aarch64-opc.c:1721 aarch64-opc.c:1955 aarch64-opc.c:1990 aarch64-opc.c:2009
#: aarch64-opc.c:2017 aarch64-opc.c:2088 aarch64-opc.c:2262 aarch64-opc.c:2362
#: aarch64-opc.c:2375
#: aarch64-opc.c:1747 aarch64-opc.c:1986 aarch64-opc.c:2021 aarch64-opc.c:2040
#: aarch64-opc.c:2048 aarch64-opc.c:2119 aarch64-opc.c:2295 aarch64-opc.c:2395
#: aarch64-opc.c:2408
msgid "immediate out of range"
msgstr ""
#: aarch64-opc.c:1743 aarch64-opc.c:1785 aarch64-opc.c:1829 aarch64-opc.c:1863
#: aarch64-opc.c:1769 aarch64-opc.c:1811 aarch64-opc.c:1860 aarch64-opc.c:1894
msgid "invalid addressing mode"
msgstr ""
#: aarch64-opc.c:1821
#: aarch64-opc.c:1852
msgid "index register xzr is not allowed"
msgstr ""
#: aarch64-opc.c:1943 aarch64-opc.c:1965 aarch64-opc.c:2165 aarch64-opc.c:2173
#: aarch64-opc.c:2239 aarch64-opc.c:2268
#: aarch64-opc.c:1974 aarch64-opc.c:1996 aarch64-opc.c:2198 aarch64-opc.c:2206
#: aarch64-opc.c:2272 aarch64-opc.c:2301
msgid "invalid shift operator"
msgstr ""
#: aarch64-opc.c:1949
#: aarch64-opc.c:1980
msgid "shift amount must be 0 or 12"
msgstr ""
#: aarch64-opc.c:1972
#: aarch64-opc.c:2003
msgid "shift amount must be a multiple of 16"
msgstr ""
#: aarch64-opc.c:1984
#: aarch64-opc.c:2015
msgid "negative immediate value not allowed"
msgstr ""
#: aarch64-opc.c:2099
#: aarch64-opc.c:2130
msgid "immediate zero expected"
msgstr ""
#: aarch64-opc.c:2112
#: aarch64-opc.c:2144
msgid "rotate expected to be 0, 90, 180 or 270"
msgstr ""
#: aarch64-opc.c:2121
#: aarch64-opc.c:2154
msgid "rotate expected to be 90 or 270"
msgstr ""
#: aarch64-opc.c:2181
#: aarch64-opc.c:2214
msgid "shift is not permitted"
msgstr ""
#: aarch64-opc.c:2206
#: aarch64-opc.c:2239
msgid "invalid value for immediate"
msgstr ""
#: aarch64-opc.c:2231
#: aarch64-opc.c:2264
msgid "shift amount must be 0 or 16"
msgstr ""
#: aarch64-opc.c:2252
#: aarch64-opc.c:2285
msgid "floating-point immediate expected"
msgstr ""
#: aarch64-opc.c:2286
#: aarch64-opc.c:2319
msgid "no shift amount allowed for 8-bit constants"
msgstr ""
#: aarch64-opc.c:2296
#: aarch64-opc.c:2329
msgid "shift amount must be 0 or 8"
msgstr ""
#: aarch64-opc.c:2309
#: aarch64-opc.c:2342
msgid "immediate too big for element size"
msgstr ""
#: aarch64-opc.c:2316
#: aarch64-opc.c:2349
msgid "invalid arithmetic immediate"
msgstr ""
#: aarch64-opc.c:2330
#: aarch64-opc.c:2363
msgid "floating-point value must be 0.5 or 1.0"
msgstr ""
#: aarch64-opc.c:2340
#: aarch64-opc.c:2373
msgid "floating-point value must be 0.5 or 2.0"
msgstr ""
#: aarch64-opc.c:2350
#: aarch64-opc.c:2383
msgid "floating-point value must be 0.0 or 1.0"
msgstr ""
#: aarch64-opc.c:2381
#: aarch64-opc.c:2414
msgid "invalid replicated MOV immediate"
msgstr ""
#: aarch64-opc.c:2495
#: aarch64-opc.c:2528
msgid "extend operator expected"
msgstr ""
#: aarch64-opc.c:2508
#: aarch64-opc.c:2541
msgid "missing extend operator"
msgstr ""
#: aarch64-opc.c:2514
#: aarch64-opc.c:2547
msgid "'LSL' operator not allowed"
msgstr ""
#: aarch64-opc.c:2535
#: aarch64-opc.c:2568
msgid "W register expected"
msgstr ""
#: aarch64-opc.c:2546
#: aarch64-opc.c:2579
msgid "shift operator expected"
msgstr ""
#: aarch64-opc.c:2553
#: aarch64-opc.c:2586
msgid "'ROR' operator not allowed"
msgstr ""
@ -312,190 +320,205 @@ msgstr ""
msgid " fpud Recognize double precision FPU instructions.\n"
msgstr ""
#: arc-opc.c:40 arc-opc.c:60 arc-opc.c:86
#: arc-opc.c:41 arc-opc.c:64 arc-opc.c:90
msgid "LP_COUNT register cannot be used as destination register"
msgstr ""
#: arc-opc.c:84
#: arc-opc.c:88
msgid "cannot use odd number destination register"
msgstr ""
#: arc-opc.c:97
#: arc-opc.c:101
msgid "cannot use odd number source register"
msgstr ""
#: arc-opc.c:110
#: arc-opc.c:114
msgid "operand is not zero"
msgstr ""
#: arc-opc.c:170
#: arc-opc.c:173
msgid "Register R30 is a limm indicator"
msgstr ""
#: arc-opc.c:189
#: arc-opc.c:192
msgid "Register must be R0"
msgstr ""
#: arc-opc.c:207
#: arc-opc.c:210
msgid "Register must be R1"
msgstr ""
#: arc-opc.c:224
#: arc-opc.c:227
msgid "Register must be R2"
msgstr ""
#: arc-opc.c:241
#: arc-opc.c:244
msgid "Register must be R3"
msgstr ""
#: arc-opc.c:258
#: arc-opc.c:261
msgid "Register must be SP"
msgstr ""
#: arc-opc.c:275
#: arc-opc.c:278
msgid "Register must be GP"
msgstr ""
#: arc-opc.c:292
#: arc-opc.c:295
msgid "Register must be PCL"
msgstr ""
#: arc-opc.c:309
#: arc-opc.c:312
msgid "Register must be BLINK"
msgstr ""
#: arc-opc.c:326
#: arc-opc.c:329
msgid "Register must be ILINK1"
msgstr ""
#: arc-opc.c:343
#: arc-opc.c:346
msgid "Register must be ILINK2"
msgstr ""
#. ARC NPS400 Support: See comment near head of file.
#: arc-opc.c:374 arc-opc.c:411 arc-opc.c:448 arc-opc.c:692
#: arc-opc.c:377 arc-opc.c:415 arc-opc.c:453 arc-opc.c:703
msgid "Register must be either r0-r3 or r12-r15"
msgstr ""
#: arc-opc.c:498
#: arc-opc.c:504
msgid "Accepted values are from -1 to 6"
msgstr ""
#: arc-opc.c:526
#: arc-opc.c:533
msgid "First register of the range should be r13"
msgstr ""
#: arc-opc.c:531
#: arc-opc.c:535
msgid "Last register of the range doesn't fit"
msgstr ""
#: arc-opc.c:552
#: arc-opc.c:555
msgid "Invalid register number, should be fp"
msgstr ""
#: arc-opc.c:574
#: arc-opc.c:577
msgid "Invalid register number, should be blink"
msgstr ""
#: arc-opc.c:596
#: arc-opc.c:599
msgid "Invalid register number, should be pcl"
msgstr ""
#: arc-opc.c:740
#: arc-opc.c:751
msgid "Invalid size, should be 1, 2, 4, or 8"
msgstr ""
#: arc-opc.c:785
#: arc-opc.c:796
msgid "invalid immediate, must be 1, 2, or 4"
msgstr ""
#: arc-opc.c:823
#: arc-opc.c:835
msgid "invalid value for CMEM ld/st immediate"
msgstr ""
#: arc-opc.c:850
msgid "Invalid position, should be 0, 8, 16, or 24"
#: arc-opc.c:862
msgid "Invalid position, should be 0, 16, 32, 48 or 64."
msgstr ""
#: arc-opc.c:875
msgid "Invalid size, value must be "
#: arc-opc.c:896
msgid "Invalid position, should be 16, 32, 64 or 128."
msgstr ""
#: arc-opc.c:918
msgid "Invalid size value must be on range 1-64."
msgstr ""
#: arc-opc.c:949
msgid "Invalid position, should be 0, 8, 16, or 24"
msgstr ""
#: arc-opc.c:974
msgid "Invalid size, value must be "
msgstr ""
#: arc-opc.c:1048
msgid "value out of range 1 - 256"
msgstr ""
#: arc-opc.c:958
#: arc-opc.c:1057
msgid "value must be power of 2"
msgstr ""
#: arc-opc.c:1011
#: arc-opc.c:1110
msgid "Value must be in the range 0 to 28"
msgstr ""
#: arc-opc.c:1032
#: arc-opc.c:1132
msgid "Value must be in the range 1 to "
msgstr ""
#: arc-opc.c:1062
#: arc-opc.c:1162
msgid "Value must be in the range 0 to 240"
msgstr ""
#: arc-opc.c:1064
#: arc-opc.c:1164
msgid "Value must be a multiple of 16"
msgstr ""
#: arc-opc.c:1084
#: arc-opc.c:1184
msgid "Invalid address type for operand"
msgstr ""
#: arc-opc.c:1118
#: arc-opc.c:1218
msgid "Value must be in the range 0 to 31"
msgstr ""
#: arm-dis.c:3202
#: arc-opc.c:1243
msgid "Invalid position, should be 0,4, 8,...124."
msgstr ""
#: arm-dis.c:3198
msgid "Select raw register names"
msgstr ""
#: arm-dis.c:3204
#: arm-dis.c:3200
msgid "Select register names used by GCC"
msgstr ""
#: arm-dis.c:3206
#: arm-dis.c:3202
msgid "Select register names used in ARM's ISA documentation"
msgstr ""
#: arm-dis.c:3208
msgid "Select register names used in the APCS"
msgstr ""
#: arm-dis.c:3210
msgid "Select register names used in the ATPCS"
msgstr ""
#: arm-dis.c:3212
msgid "Select special register names used in the ATPCS"
msgstr ""
#. All non "reg-names-* options must be listed last.
#: arm-dis.c:3216
#: arm-dis.c:3204
msgid "Assume all insns are Thumb insns"
msgstr ""
#: arm-dis.c:3217
#: arm-dis.c:3205
msgid "Examine preceding label to determine an insn's type"
msgstr ""
#: arm-dis.c:3638
#: arm-dis.c:3206
msgid "Select register names used in the APCS"
msgstr ""
#: arm-dis.c:3208
msgid "Select register names used in the ATPCS"
msgstr ""
#: arm-dis.c:3210
msgid "Select special register names used in the ATPCS"
msgstr ""
#: arm-dis.c:3608
msgid "<illegal precision>"
msgstr ""
#: arm-dis.c:6151
#: arm-dis.c:6121
#, c-format
msgid "Unrecognised register name set: %s\n"
msgstr ""
#: arm-dis.c:6855
#: arm-dis.c:6825
#, c-format
msgid ""
"\n"
@ -790,11 +813,11 @@ msgstr ""
msgid "%02x\t\t*unknown*"
msgstr ""
#: i386-dis.c:12200
#: i386-dis.c:12276
msgid "<internal disassembler error>"
msgstr ""
#: i386-dis.c:12492
#: i386-dis.c:12568
#, c-format
msgid ""
"\n"
@ -803,145 +826,145 @@ msgid ""
"with the -M switch (multiple options should be separated by commas):\n"
msgstr ""
#: i386-dis.c:12496
#: i386-dis.c:12572
#, c-format
msgid " x86-64 Disassemble in 64bit mode\n"
msgstr ""
#: i386-dis.c:12497
#: i386-dis.c:12573
#, c-format
msgid " i386 Disassemble in 32bit mode\n"
msgstr ""
#: i386-dis.c:12498
#: i386-dis.c:12574
#, c-format
msgid " i8086 Disassemble in 16bit mode\n"
msgstr ""
#: i386-dis.c:12499
#: i386-dis.c:12575
#, c-format
msgid " att Display instruction in AT&T syntax\n"
msgstr ""
#: i386-dis.c:12500
#: i386-dis.c:12576
#, c-format
msgid " intel Display instruction in Intel syntax\n"
msgstr ""
#: i386-dis.c:12501
#: i386-dis.c:12577
#, c-format
msgid ""
" att-mnemonic\n"
" Display instruction in AT&T mnemonic\n"
msgstr ""
#: i386-dis.c:12503
#: i386-dis.c:12579
#, c-format
msgid ""
" intel-mnemonic\n"
" Display instruction in Intel mnemonic\n"
msgstr ""
#: i386-dis.c:12505
#: i386-dis.c:12581
#, c-format
msgid " addr64 Assume 64bit address size\n"
msgstr ""
#: i386-dis.c:12506
#: i386-dis.c:12582
#, c-format
msgid " addr32 Assume 32bit address size\n"
msgstr ""
#: i386-dis.c:12507
#: i386-dis.c:12583
#, c-format
msgid " addr16 Assume 16bit address size\n"
msgstr ""
#: i386-dis.c:12508
#: i386-dis.c:12584
#, c-format
msgid " data32 Assume 32bit data size\n"
msgstr ""
#: i386-dis.c:12509
#: i386-dis.c:12585
#, c-format
msgid " data16 Assume 16bit data size\n"
msgstr ""
#: i386-dis.c:12510
#: i386-dis.c:12586
#, c-format
msgid " suffix Always display instruction suffix in AT&T syntax\n"
msgstr ""
#: i386-dis.c:12511
#: i386-dis.c:12587
#, c-format
msgid " amd64 Display instruction in AMD64 ISA\n"
msgstr ""
#: i386-dis.c:12512
#: i386-dis.c:12588
#, c-format
msgid " intel64 Display instruction in Intel64 ISA\n"
msgstr ""
#: i386-dis.c:13063
#: i386-dis.c:13139
msgid "64-bit address is disabled"
msgstr ""
#: i386-gen.c:679 ia64-gen.c:306
#: i386-gen.c:682 ia64-gen.c:306
#, c-format
msgid "%s: Error: "
msgstr ""
#: i386-gen.c:843
#: i386-gen.c:846
#, c-format
msgid "%s: %d: Unknown bitfield: %s\n"
msgstr ""
#: i386-gen.c:845
#: i386-gen.c:848
#, c-format
msgid "Unknown bitfield: %s\n"
msgstr ""
#: i386-gen.c:904
#: i386-gen.c:907
#, c-format
msgid "%s: %d: Missing `)' in bitfield: %s\n"
msgstr ""
#: i386-gen.c:1175
#: i386-gen.c:1178
#, c-format
msgid "can't find i386-opc.tbl for reading, errno = %s\n"
msgstr ""
#: i386-gen.c:1306
#: i386-gen.c:1309
#, c-format
msgid "can't find i386-reg.tbl for reading, errno = %s\n"
msgstr ""
#: i386-gen.c:1383
#: i386-gen.c:1386
#, c-format
msgid "can't create i386-init.h, errno = %s\n"
msgstr ""
#: i386-gen.c:1473 ia64-gen.c:2829
#: i386-gen.c:1476 ia64-gen.c:2829
#, c-format
msgid "unable to change directory to \"%s\", errno = %s\n"
msgstr ""
#: i386-gen.c:1485 i386-gen.c:1488
#: i386-gen.c:1488 i386-gen.c:1491
#, c-format
msgid "CpuMax != %d!\n"
msgstr ""
#: i386-gen.c:1492
#: i386-gen.c:1495
#, c-format
msgid "%d unused bits in i386_cpu_flags.\n"
msgstr ""
#: i386-gen.c:1499
#: i386-gen.c:1502
#, c-format
msgid "%d unused bits in i386_operand_type.\n"
msgstr ""
#: i386-gen.c:1513
#: i386-gen.c:1516
#, c-format
msgid "can't create i386-tbl.h, errno = %s\n"
msgstr ""
@ -1433,12 +1456,12 @@ msgstr ""
msgid "$<undefined>"
msgstr ""
#: ppc-dis.c:347
#: ppc-dis.c:359
#, c-format
msgid "warning: ignoring unknown -M%s option\n"
msgstr ""
#: ppc-dis.c:793
#: ppc-dis.c:810
#, c-format
msgid ""
"\n"
@ -1446,71 +1469,71 @@ msgid ""
"the -M switch:\n"
msgstr ""
#: ppc-opc.c:982 ppc-opc.c:1005 ppc-opc.c:1030 ppc-opc.c:1059
#: ppc-opc.c:990 ppc-opc.c:1013 ppc-opc.c:1038 ppc-opc.c:1067
msgid "invalid register"
msgstr ""
#: ppc-opc.c:1307 ppc-opc.c:1337
#: ppc-opc.c:1315 ppc-opc.c:1345
msgid "invalid conditional option"
msgstr ""
#: ppc-opc.c:1309 ppc-opc.c:1339
#: ppc-opc.c:1317 ppc-opc.c:1347
msgid "invalid counter access"
msgstr ""
#: ppc-opc.c:1341
#: ppc-opc.c:1349
msgid "attempt to set y bit when using + or - modifier"
msgstr ""
#: ppc-opc.c:1431
#: ppc-opc.c:1439
msgid "invalid mask field"
msgstr ""
#: ppc-opc.c:1454
#: ppc-opc.c:1462
msgid "invalid mfcr mask"
msgstr ""
#: ppc-opc.c:1528 ppc-opc.c:1552
#: ppc-opc.c:1536 ppc-opc.c:1576
msgid "illegal L operand value"
msgstr ""
#: ppc-opc.c:1558
#: ppc-opc.c:1582
msgid "incompatible L operand value"
msgstr ""
#: ppc-opc.c:1581 ppc-opc.c:1616
#: ppc-opc.c:1626 ppc-opc.c:1661
msgid "illegal bitmask"
msgstr ""
#: ppc-opc.c:1703
#: ppc-opc.c:1748
msgid "address register in load range"
msgstr ""
#: ppc-opc.c:1756
#: ppc-opc.c:1814
msgid "index register in load range"
msgstr ""
#: ppc-opc.c:1772 ppc-opc.c:1828
#: ppc-opc.c:1843 ppc-opc.c:1924
msgid "source and target register operands must be different"
msgstr ""
#: ppc-opc.c:1787
#: ppc-opc.c:1871
msgid "invalid register operand when updating"
msgstr ""
#: ppc-opc.c:1878
#: ppc-opc.c:1987
msgid "illegal immediate value"
msgstr ""
#: ppc-opc.c:2025
#: ppc-opc.c:2134
msgid "invalid sprg number"
msgstr ""
#: ppc-opc.c:2062
#: ppc-opc.c:2171
msgid "invalid tbr number"
msgstr ""
#: ppc-opc.c:2206
#: ppc-opc.c:2315
msgid "invalid constant"
msgstr ""