* ld-powerpc/plt1.s: New.
* ld-powerpc/plt1.d: New. * ld-powerpc/relbrlt.s: New. * ld-powerpc/relbrlt.d: New. * ld-powerpc/powerpc.exp: Run them.
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#source: plt1.s
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#as: -a32
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#objdump: -dr
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#target: powerpc*-*-*
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.*: file format elf32-powerpc
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Disassembly of section .text:
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0+ <_start>:
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0: 42 9f 00 05 bcl- 20,4\*cr7\+so,4 .*
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4: 7f c8 02 a6 mflr r30
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8: 3f de 00 00 addis r30,r30,0
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a: R_PPC_REL16_HA _GLOBAL_OFFSET_TABLE_\+0x6
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c: 3b de 00 0a addi r30,r30,10
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e: R_PPC_REL16_LO _GLOBAL_OFFSET_TABLE_\+0xa
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10: 48 00 00 01 bl 10 .*
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10: R_PPC_PLTREL24 _exit
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14: 48 00 00 00 b 14 .*
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14: R_PPC_REL24 _start
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.text
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.global _start
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_start:
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bcl 20,31,1f
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1: mflr 30
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addis 30,30,(_GLOBAL_OFFSET_TABLE_-1b)@ha
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addi 30,30,(_GLOBAL_OFFSET_TABLE_-1b)@l
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bl _exit@plt
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b _start
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@ -1,5 +1,5 @@
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# Expect script for ld-powerpc tests
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# Expect script for ld-powerpc tests
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# Copyright 2002, 2003, 2005 Free Software Foundation
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# Copyright 2002, 2003, 2005, 2006 Free Software Foundation
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#
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#
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# This file is free software; you can redistribute it and/or modify
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# This file is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# it under the terms of the GNU General Public License as published by
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@ -143,4 +143,7 @@ run_ld_link_tests $ppcelftests
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if [ supports_ppc64 ] then {
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if [ supports_ppc64 ] then {
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run_ld_link_tests $ppc64elftests
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run_ld_link_tests $ppc64elftests
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run_dump_test "relbrlt"
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}
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}
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run_dump_test "plt1"
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#source: relbrlt.s
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#as: -a64
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#ld: -melf64ppc --emit-relocs
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#objdump: -dr
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.*: file format elf64-powerpc
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Disassembly of section \.text:
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0*100000a8 <_start>:
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100000a8: 49 bf 00 31 bl 11bf00d8 .*
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100000a8: R_PPC64_REL24 \.text\+0x37e0044
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100000ac: 60 00 00 00 nop
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100000b0: 49 bf 00 19 bl 11bf00c8 .*
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100000b0: R_PPC64_REL24 \.text\+0x3bf0020
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100000b4: 60 00 00 00 nop
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100000b8: 49 bf 00 25 bl 11bf00dc .*
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100000b8: R_PPC64_REL24 \.text\+0x57e0024
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100000bc: 60 00 00 00 nop
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100000c0: 00 00 00 00 \.long 0x0
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100000c4: 4b ff ff e4 b 100000a8 <_start>
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\.\.\.
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0*11bf00c8 <.*plt_branch.*>:
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11bf00c8: 3d 82 05 7e addis r12,r2,1406
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11bf00cc: e9 6c 80 58 ld r11,-32680\(r12\)
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11bf00d0: 7d 69 03 a6 mtctr r11
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11bf00d4: 4e 80 04 20 bctr
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0*11bf00d8 <.*long_branch.*>:
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11bf00d8: 49 bf 00 14 b 137e00ec <far>
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11bf00d8: R_PPC64_REL24 \*ABS\*\+0x137e00ec
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0*11bf00dc <.*plt_branch.*>:
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11bf00dc: 3d 82 05 7e addis r12,r2,1406
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11bf00e0: e9 6c 80 60 ld r11,-32672\(r12\)
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11bf00e4: 7d 69 03 a6 mtctr r11
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11bf00e8: 4e 80 04 20 bctr
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\.\.\.
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0*137e00ec <far>:
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137e00ec: 4e 80 00 20 blr
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\.\.\.
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0*13bf00c8 <far2far>:
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13bf00c8: 4e 80 00 20 blr
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\.\.\.
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0*157e00cc <huge>:
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157e00cc: 4e 80 00 20 blr
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@ -0,0 +1,34 @@
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.text
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.global _start
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_start:
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1:
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bl far
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nop
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bl far2far
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nop
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bl huge
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nop
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.long 0
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b 1b
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.space 0x1bf0000
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.section .text.pad1,"ax"
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.space 0x1bf0000
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.section .text.far,"ax"
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far:
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blr
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.section .text.pad2,"ax"
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.space 0x40ffd8
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.section .text.far2far,"ax"
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far2far:
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blr
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.section .text.pad3,"ax"
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.space 0x1bf0000
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.section .text.huge,"ax"
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huge:
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blr
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