Fix formatting.
This commit is contained in:
Nick Clifton
parent
a2429eb555
commit
fafb6d1700
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@ -5,6 +5,7 @@
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* config/tc-mn10300.c: Likewise.
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* config/tc-pj.c: Fix formatting.=0A=
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* config/tc-tic80.c: Fix formatting.=0A=
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* config/tc-m68hc11.c: Fix formatting.
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2000-07-17 Frank Ch. Eigler <fche@redhat.com>
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@ -58,15 +58,16 @@ const char FLT_CHARS[] = "dD";
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size expressions. This version only supports two kinds. */
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/* The fields are:
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How far Forward this mode will reach:
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How far Backward this mode will reach:
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How many bytes this mode will add to the size of the frag
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Which mode to go to if the offset won't fit in this one */
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How far Forward this mode will reach.
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How far Backward this mode will reach.
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How many bytes this mode will add to the size of the frag.
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Which mode to go to if the offset won't fit in this one. */
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relax_typeS md_relax_table[] = {
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{1, 1, 0, 0}, /* First entries aren't used */
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{1, 1, 0, 0}, /* For no good reason except */
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{1, 1, 0, 0}, /* that the VAX doesn't either */
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relax_typeS md_relax_table[] =
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{
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{1, 1, 0, 0}, /* First entries aren't used. */
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{1, 1, 0, 0}, /* For no good reason except. */
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{1, 1, 0, 0}, /* that the VAX doesn't either. */
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{1, 1, 0, 0},
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/* Relax for bcc <L>.
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@ -147,36 +148,30 @@ typedef struct alias
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}
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alias;
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static alias alias_opcodes[] = {
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static alias alias_opcodes[] =
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{
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{"cpd", "cmpd"},
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{"cpx", "cmpx"},
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{"cpy", "cmpy"},
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{0, 0}
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};
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/* local functions */
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static register_id reg_name_search PARAMS ((char *name));
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static register_id register_name PARAMS (());
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static int check_range PARAMS ((long num, int mode));
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/* Local functions. */
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static register_id reg_name_search PARAMS ((char *));
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static register_id register_name PARAMS ((void));
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static int check_range PARAMS ((long, int));
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static void print_opcode_list PARAMS ((void));
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static void get_default_target PARAMS ((void));
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static void print_insn_format PARAMS ((char *name));
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static int get_operand PARAMS ((operand * op, int first, long opmode));
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static void fixup8 PARAMS ((expressionS * oper, int mode, int opmode));
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static void fixup16 PARAMS ((expressionS * oper, int mode, int opmode));
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static void print_insn_format PARAMS ((char *));
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static int get_operand PARAMS ((operand *, int, long));
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static void fixup8 PARAMS ((expressionS *, int, int));
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static void fixup16 PARAMS ((expressionS *, int, int));
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static struct m68hc11_opcode *find_opcode
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PARAMS (
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(struct m68hc11_opcode_def * opc, operand operands[],
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int *nb_operands));
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PARAMS ((struct m68hc11_opcode_def *, operand *, int *));
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static void build_jump_insn
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PARAMS (
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(struct m68hc11_opcode * opcode, operand operands[], int nb_operands,
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int optimize));
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static void build_insn PARAMS ((struct m68hc11_opcode * opcode,
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operand operands[], int nb_operands));
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PARAMS ((struct m68hc11_opcode *, operand *, int, int));
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static void build_insn
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PARAMS ((struct m68hc11_opcode *, operand *, int));
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/* Controls whether relative branches can be turned into long branches.
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When the relative offset is too large, the insn are changed:
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@ -186,7 +181,7 @@ static void build_insn PARAMS ((struct m68hc11_opcode * opcode,
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jmp L
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dbcc -> db!cc +3
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jmp L
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Setting the flag forbidds this. */
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static short flag_fixed_branchs = 0;
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@ -234,7 +229,8 @@ static struct m68hc11_opcode *m68hc11_sorted_opcodes;
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pseudo-op name without dot
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function to call to execute this pseudo-op
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Integer arg to pass to the function. */
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const pseudo_typeS md_pseudo_table[] = {
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const pseudo_typeS md_pseudo_table[] =
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{
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/* The following pseudo-ops are supported for MRI compatibility. */
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{"fcb", cons, 1},
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{"fdb", cons, 2},
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@ -245,13 +241,13 @@ const pseudo_typeS md_pseudo_table[] = {
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{0, 0, 0}
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};
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/* Options and initialization. */
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CONST char *md_shortopts = "Sm:";
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struct option md_longopts[] = {
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struct option md_longopts[] =
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{
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#define OPTION_FORCE_LONG_BRANCH (OPTION_MD_BASE)
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{"force-long-branchs", no_argument, NULL, OPTION_FORCE_LONG_BRANCH},
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@ -303,7 +299,6 @@ m68hc11_mach ()
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return 0;
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}
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void
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md_show_usage (stream)
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FILE *stream;
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@ -436,14 +431,13 @@ md_undefined_symbol (name)
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return 0;
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}
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/* Equal to MAX_PRECISION in atof-ieee.c */
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/* Equal to MAX_PRECISION in atof-ieee.c. */
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#define MAX_LITTLENUMS 6
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/* Turn a string in input_line_pointer into a floating point constant
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of type TYPE, and store the appropriate bytes in *LITP. The number
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of LITTLENUMS emitted is stored in *SIZEP. An error message is
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returned, or NULL on OK. */
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char *
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md_atof (type, litP, sizeP)
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char type;
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@ -507,7 +501,6 @@ md_section_align (seg, addr)
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return ((addr + (1 << align) - 1) & (-1 << align));
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}
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static int
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cmp_opcode (op1, op2)
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struct m68hc11_opcode *op1;
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@ -620,7 +613,6 @@ void
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m68hc11_init_after_args ()
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{
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}
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/* Builtin help. */
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@ -747,10 +739,8 @@ print_opcode_list ()
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int example = flag_print_opcodes == 2;
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if (example)
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{
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printf (_("# Example of `%s' instructions\n\t.sect .text\n_start:\n"),
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default_cpu);
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}
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printf (_("# Example of `%s' instructions\n\t.sect .text\n_start:\n"),
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default_cpu);
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opcodes = m68hc11_sorted_opcodes;
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@ -783,7 +773,6 @@ print_opcode_list ()
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printf ("\n");
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}
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/* Print the instruction format. This operation is called when some
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instruction is not correct. Instruction format is printed as an
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error message. */
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@ -816,7 +805,6 @@ print_insn_format (name)
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}
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while (strcmp (opcode->name, name) == 0);
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}
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/* Analysis of 68HC11 and 68HC12 operands. */
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@ -856,7 +844,7 @@ skip_whites (p)
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return p;
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}
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/* register_name() checks the string at input_line_pointer
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/* Check the string at input_line_pointer
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to see if it is a valid register name. */
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static register_id
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register_name ()
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@ -874,7 +862,7 @@ register_name ()
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if (c)
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*p++ = 0;
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/* look to see if it's in the register table. */
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/* Look to see if it's in the register table. */
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reg_number = reg_name_search (input_line_pointer);
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if (reg_number != REG_NONE)
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{
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@ -890,8 +878,7 @@ register_name ()
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return reg_number;
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}
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/* get_operands parses a string of operands and returns
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an array of expressions.
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/* Parse a string of operands and return an array of expressions.
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Operand mode[0] mode[1] exp[0] exp[1]
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#n M6811_OP_IMM16 - O_*
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@ -905,10 +892,7 @@ register_name ()
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n,r+ M6812_POST_INC " "
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A,r B,r D,r M6811_OP_REG M6812_OP_REG O_register O_register
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[D,r] M6811_OP_IDX_2 M6812_OP_REG O_register O_register
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[n,r] M6811_OP_IDX_1 M6812_OP_REG O_constant O_register
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*/
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[n,r] M6811_OP_IDX_1 M6812_OP_REG O_constant O_register */
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static int
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get_operand (oper, which, opmode)
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operand *oper;
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@ -942,7 +926,7 @@ get_operand (oper, which, opmode)
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if (!(opmode & (M6811_OP_IMM8 | M6811_OP_IMM16 | M6811_OP_BITMASK)))
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{
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as_bad (_("Immediate operand is not allowed for operand %d."),
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which);
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which);
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return -1;
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}
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@ -1115,7 +1099,7 @@ get_operand (oper, which, opmode)
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input_line_pointer = p;
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reg = register_name ();
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/* Backtrack... */
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/* Backtrack. */
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if (which == 0 && opmode & M6812_OP_IDX_P2
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&& reg != REG_X && reg != REG_Y
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&& reg != REG_PC && reg != REG_SP)
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@ -1185,9 +1169,7 @@ get_operand (oper, which, opmode)
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/* If the mode is not known until now, this is either a label
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or an indirect address. */
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if (mode == M6811_OP_NONE)
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{
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mode = M6811_OP_IND16 | M6811_OP_JUMP_REL;
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}
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mode = M6811_OP_IND16 | M6811_OP_JUMP_REL;
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p = input_line_pointer;
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while (*p == ' ' || *p == '\t')
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@ -1209,15 +1191,11 @@ check_range (num, mode)
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{
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/* Auto increment and decrement are ok for [-8..8] without 0. */
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if (mode & M6812_AUTO_INC_DEC)
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{
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return (num != 0 && num <= 8 && num >= -8);
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}
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return (num != 0 && num <= 8 && num >= -8);
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/* The 68HC12 supports 5, 9 and 16-bits offsets. */
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if (mode & (M6812_INDEXED_IND | M6812_INDEXED | M6812_OP_IDX))
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{
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mode = M6811_OP_IND16;
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}
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mode = M6811_OP_IND16;
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if (mode & M6812_OP_JUMP_REL16)
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mode = M6811_OP_IND16;
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@ -1255,7 +1233,6 @@ check_range (num, mode)
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return 0;
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}
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}
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/* Gas fixup generation. */
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@ -1342,7 +1319,7 @@ fixup16 (oper, mode, opmode)
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if (!check_range (oper->X_add_number, mode))
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{
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as_bad (_("Operand out of 16-bit range: `%ld'."),
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oper->X_add_number);
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oper->X_add_number);
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}
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number_to_chars_bigendian (f, oper->X_add_number & 0x0FFFF, 2);
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}
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@ -1365,7 +1342,6 @@ fixup16 (oper, mode, opmode)
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as_fatal (_("Operand `%x' not recognized in fixup16."), oper->X_op);
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}
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}
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/* 68HC11 and 68HC12 code generation. */
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@ -1389,11 +1365,11 @@ convert_branch (code)
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/* Start a new insn that contains at least 'size' bytes. Record the
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line information of that insn in the dwarf2 debug sections. */
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static char*
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static char *
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m68hc11_new_insn (size)
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int size;
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{
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char* f;
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char *f;
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f = frag_more (size);
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@ -1401,7 +1377,7 @@ m68hc11_new_insn (size)
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if (debug_type == DEBUG_DWARF2)
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{
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bfd_vma addr;
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dwarf2_where (&debug_line);
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addr = frag_now->fr_address + frag_now_fix () - size;
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dwarf2_gen_line_info (addr, &debug_line);
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@ -1666,7 +1642,7 @@ build_indexed_byte (op, format, move_insn)
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if (!check_range (val, mode))
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{
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as_bad (_("Increment/decrement value is out of range: `%ld'."),
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val);
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val);
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}
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if (mode & (M6812_POST_INC | M6812_PRE_INC))
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byte |= (val - 1) & 0x07;
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@ -1772,9 +1748,10 @@ build_indexed_byte (op, format, move_insn)
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}
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f = frag_more (1);
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number_to_chars_bigendian (f, byte, 1);
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/*
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fix_new_exp (frag_now, f - frag_now->fr_literal, 2,
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&op->exp, false, BFD_RELOC_16); */
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#if 0
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fix_new_exp (frag_now, f - frag_now->fr_literal, 2,
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&op->exp, false, BFD_RELOC_16);
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#endif
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frag_var (rs_machine_dependent, 2, 2,
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ENCODE_RELAX (STATE_INDEXED_OFFSET, STATE_UNDF),
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op->exp.X_add_symbol, val, f);
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@ -1988,7 +1965,6 @@ build_insn (opcode, operands, nb_operands)
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fixup16 (&operands[1].exp, M6811_OP_IND16, operands[1].mode);
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}
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}
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/* Opcode identification and operand analysis. */
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@ -2144,7 +2120,6 @@ find (opc, operands, nb_operands)
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return opcode;
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}
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/* Find the real opcode and its associated operands. We use a progressive
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approach here. On entry, 'opc' points to the first opcode in the
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table that matches the opcode name in the source line. We try to
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@ -2175,9 +2150,7 @@ find_opcode (opc, operands, nb_operands)
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result = get_operand (&operands[i], i, opc->format);
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if (result <= 0)
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{
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return 0;
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}
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return 0;
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/* Special case where the bitmask of the bclr/brclr
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instructions is not introduced by #.
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@ -2194,21 +2167,19 @@ find_opcode (opc, operands, nb_operands)
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{
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opcode = find (opc, operands, i);
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if (opcode)
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{
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return opcode;
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}
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return opcode;
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}
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if (*input_line_pointer == ',')
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input_line_pointer++;
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}
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return 0;
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}
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#define M6812_XBCC_MARKER (M6812_OP_TBCC_MARKER \
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| M6812_OP_DBCC_MARKER \
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| M6812_OP_IBCC_MARKER)
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/* Gas line assembler entry point. */
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@ -2231,7 +2202,7 @@ md_assemble (str)
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int branch_optimize = 0;
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int alias_id = -1;
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/* Drop leading whitespace */
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/* Drop leading whitespace. */
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while (*str == ' ')
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str++;
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@ -2343,7 +2314,7 @@ md_assemble (str)
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if (alias_id >= 0)
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{
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char *f = m68hc11_new_insn (m68hc12_alias[alias_id].size);
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number_to_chars_bigendian (f, m68hc12_alias[alias_id].code1, 1);
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if (m68hc12_alias[alias_id].size > 1)
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number_to_chars_bigendian (f + 1, m68hc12_alias[alias_id].code2, 1);
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@ -2378,10 +2349,8 @@ md_assemble (str)
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else
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build_insn (opcode, operands, nb_operands);
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}
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/* Relocation, relaxation and frag conversions. */
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long
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md_pcrel_from_section (fixp, sec)
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fixS *fixp;
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@ -2390,7 +2359,7 @@ md_pcrel_from_section (fixp, sec)
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int adjust;
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if (fixp->fx_addsy != (symbolS *) NULL
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&& (!S_IS_DEFINED (fixp->fx_addsy)
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|| (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
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|| (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
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return 0;
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adjust = fixp->fx_pcrel_adjust;
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@ -2480,7 +2449,7 @@ md_convert_frag (abfd, sec, fragP)
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case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
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/* Invert branch. */
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fragP->fr_opcode[0] ^= 1;
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fragP->fr_opcode[1] = 3; /* Branch offset */
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fragP->fr_opcode[1] = 3; /* Branch offset. */
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buffer_address[0] = M6811_JMP;
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fix_new (fragP, fragP->fr_fix + 1, 2,
|
||||
fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_16);
|
||||
|
|
@ -2597,8 +2566,8 @@ md_estimate_size_before_relax (fragP, segment)
|
|||
}
|
||||
else
|
||||
{
|
||||
fragP->fr_opcode[0] ^= 1; /* Reverse sense of branch. */
|
||||
fragP->fr_opcode[1] = 3; /* Skip next jmp insn (3 bytes) */
|
||||
fragP->fr_opcode[0] ^= 1; /* Reverse sense of branch. */
|
||||
fragP->fr_opcode[1] = 3; /* Skip next jmp insn (3 bytes). */
|
||||
|
||||
/* Don't use fr_opcode[2] because this may be
|
||||
in a different frag. */
|
||||
|
|
@ -2643,7 +2612,7 @@ md_estimate_size_before_relax (fragP, segment)
|
|||
}
|
||||
else
|
||||
{
|
||||
fragP->fr_opcode[0] ^= 0x20; /* Reverse sense of branch. */
|
||||
fragP->fr_opcode[0] ^= 0x20; /* Reverse sense of branch. */
|
||||
fragP->fr_opcode[1] = 3; /* Skip next jmp insn (3 bytes). */
|
||||
|
||||
/* Don't use fr_opcode[2] because this may be
|
||||
|
|
@ -2751,16 +2720,20 @@ md_apply_fix (fixp, valuep)
|
|||
|
||||
case BFD_RELOC_M68HC11_HI8:
|
||||
value = value >> 8;
|
||||
/* Fall through */
|
||||
/* Fall through. */
|
||||
|
||||
case BFD_RELOC_M68HC11_LO8:
|
||||
case BFD_RELOC_8:
|
||||
/*bfd_putb8 ((bfd_vma) value, (unsigned char *) where); */
|
||||
#if 0
|
||||
bfd_putb8 ((bfd_vma) value, (unsigned char *) where);
|
||||
#endif
|
||||
((bfd_byte *) where)[0] = (bfd_byte) value;
|
||||
break;
|
||||
|
||||
case BFD_RELOC_8_PCREL:
|
||||
/*bfd_putb8 ((bfd_vma) value, (unsigned char *) where); */
|
||||
#if 0
|
||||
bfd_putb8 ((bfd_vma) value, (unsigned char *) where);
|
||||
#endif
|
||||
((bfd_byte *) where)[0] = (bfd_byte) value;
|
||||
|
||||
if (value < -128 || value > 127)
|
||||
|
|
@ -2786,6 +2759,7 @@ md_apply_fix (fixp, valuep)
|
|||
as_fatal (_("Line %d: unknown relocation type: 0x%x."),
|
||||
fixp->fx_line, fixp->fx_r_type);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -2801,12 +2775,12 @@ m68hc11_end_of_source ()
|
|||
segT saved_seg;
|
||||
subsegT saved_subseg;
|
||||
segT debug_info;
|
||||
char* p;
|
||||
char *p;
|
||||
long total_size = 0;
|
||||
|
||||
|
||||
if (debug_type != DEBUG_DWARF2)
|
||||
return;
|
||||
|
||||
|
||||
dwarf2_finish ();
|
||||
|
||||
saved_seg = now_seg;
|
||||
|
|
@ -2817,7 +2791,7 @@ m68hc11_end_of_source ()
|
|||
subseg_set (debug_info, 0);
|
||||
p = frag_more (10);
|
||||
total_size = 12;
|
||||
|
||||
|
||||
# define STUFF(val,size) md_number_to_chars (p, val, size); p += size;
|
||||
STUFF (total_size, 4); /* Length of compilation unit. */
|
||||
STUFF (2, 2); /* Dwarf version */
|
||||
|
|
|
|||
Loading…
Reference in New Issue