Andes Technology has good news for you, we plan to update the nds32 port of binutils on upstream!

We have not only removed all unsupported and obsolete code, but also supported lost of new features,
including better link-time relaxations and TLS implementations. Besides, the files generated by the
newly assembler and linker usually get higher performance and more optimized code size.

ld	* emultempl/nds32elf.em (hyper_relax): New variable.
	(nds32_elf_create_output_section_statements):
	the parameters of bfd_elf32_nds32_set_target_option
	(PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS,
	PARSE_AND_LIST_ARGS_CASES): Add new option --mhyper-relax.
	* emultempl/nds32elf.em (nds32_elf_after_open): Updated.
	* emultempl/nds32elf.em (tls_desc_trampoline): New variable.
	* (nds32_elf_create_output_section_statements): Updated.
	* (nds32_elf_after_parse): Disable relaxations when PIC is enable.
	* (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS,
	PARSE_AND_LIST_ARGS_CASES): Add new option --m[no-]tlsdesc-trampoline.

include	* elf/nds32.h: Remove the unused target features.
	* dis-asm.h (disassemble_init_nds32): Declared.
	* elf/nds32.h (E_NDS32_NULL): Removed.
	(E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
	* opcode/nds32.h: Ident.
	(N32_SUB6, INSN_LW): New macros.
	(enum n32_opcodes): Updated.
	* elf/nds32.h: Doc fixes.
	* elf/nds32.h: Add R_NDS32_LSI.
	* elf/nds32.h: Add new relocations for TLS.

gas 	* config/tc-nds32.c: Remove the unused target features.
	(nds32_relax_relocs, md_pseudo_table, nds32_elf_record_fixup_exp,
	nds32_set_elf_flags_by_insn, nds32_insert_relax_entry,
	nds32_apply_fix): Likewise.
	(nds32_no_ex9_begin): Removed.
	* config/tc-nds32.c (add_mapping_symbol_for_align,
	make_mapping_symbol, add_mapping_symbol): New functions.
	* config/tc-nds32.h (enum mstate): New.
	(nds32_segment_info_type): Likewise.
	* configure.ac (--enable-dsp-ext, --enable-zol-ext): New options.
	* config.in: Regenerated.
	* configure: Regenerated.
	* config/tc-nds32.c (nds32_dx_regs):
	Set the value according to the configuration.
	(nds32_perf_ext, nds32_perf_ext2, nds32_string_ext, nds32_audio_ext):
	Likewise.
	(nds32_dsp_ext): New variable. Set the value according to the
	configuration.
	(nds32_zol_ext): Likewise.
	(asm_desc, nds32_pseudo_opcode_table): Make them static.
	(nds32_set_elf_flags_by_insn): Updated.
	(nds32_check_insn_available): Updated.
	(nds32_str_tolower): New function.
	* config/tc-nds32.c (relax_table): Updated.
	(md_begin): Updated.
	(md_assemble): Use XNEW macro to allocate space for `insn.info',
	and then remember to free it.
	(md_section_align): Cast (-1) to ValueT.
	(nds32_get_align): Cast (~0U) to addressT.
	(nds32_relax_branch_instructions): Updated.
	(md_convert_frag): Add new local variable `final_r_type'.
	(invalid_prev_frag): Add new bfd_boolean parameter `relax'.
	All callers changed.
	* config/tc-nds32.c (struct nds32_relocs_pattern): Add `insn' field.
	(struct nds32_hint_map): Add `option_list' field.
	(struct suffix_name, suffix_table): Remove the unused `pic' field.
	(do_pseudo_b, do_pseudo_bal): Remove the suffix checking.
	(do_pseudo_la_internal, do_pseudo_pushpopm): Indent.
	(relax_hint_bias, relax_hint_id_current): New static variables.
	(reset_bias, relax_hint_begin): New variables.
	(nds_itoa): New function.
	(CLEAN_REG, GET_OPCODE): New macros.
	(struct relax_hint_id): New.
	(nds32_relax_hint): For .relax_hint directive, we can use `begin'
	and `end' to mark the relax pattern without giving exactly id number.
	(nds32_elf_append_relax_relocs): Handle the case that the .relax_hint
	directives are attached to pseudo instruction.
	(nds32_elf_save_pseudo_pattern): Change the second parameter from
	instruction's opcode to byte code.
	(nds32_elf_build_relax_relation): Add new bfd_boolean parameter
	`pseudo_hint'.
	(nds32_lookup_pseudo_opcode): Fix the overflow issue.
	(enum nds32_insn_type): Add N32_RELAX_ALU1 and N32_RELAX_16BIT.
	(nds32_elf_record_fixup_exp, relax_ls_table, hint_map,
	nds32_find_reloc_table, nds32_match_hint_insn, nds32_parse_name):
	Updated.
	* config/tc-nds32.h (MAX_RELAX_NUM): Extend it to 6.
	(enum nds32_relax_hint_type): Merge NDS32_RELAX_HINT_LA and
	NDS32_RELAX_HINT_LS into NDS32_RELAX_HINT_LALS. Add
	NDS32_RELAX_HINT_LA_PLT, NDS32_RELAX_HINT_LA_GOT and
	NDS32_RELAX_HINT_LA_GOTOFF.
	* config/tc-nds32.h (relax_ls_table): Add floating load/store
	to gp relax pattern.
	(hint_map, nds32_find_reloc_table): Likewise.
	* configure.ac: Define NDS32_LINUX_TOOLCHAIN.
	* configure: Regenerated.
	* config.in: Regenerated.
	* config/tc-nds32.h (enum nds32_ramp): Updated.
	(enum nds32_relax_hint_type): Likewise.
	* config/tc-nds32.c: Include "errno.h" and "limits.h".
	(relax_ls_table): Add TLS relax patterns.
	(nds32_elf_append_relax_relocs): Attach BFD_RELOC_NDS32_GROUP on
	each instructions of TLS patterns.
	(nds32_elf_record_fixup_exp): Updated.
	(nds32_apply_fix): Likewise.
	(suffix_table): Add TLSDESC suffix.

binutils* testsuite/binutils-all/objcopy.exp: Set the unsupported reloc number
	from 215 to 255 for NDS32.

bfd	* elf32-nds32.c (nds32_elf_relax_loadstore):
	Remove the unused target features.
	(bfd_elf32_nds32_set_target_option): Remove the unused parameters.
	(nds32_elf_relax_piclo12, nds32_elf_relax_letlslo12,
	nds32_elf_relax_letlsadd, nds32_elf_relax_letlsls,
	nds32_elf_relax_pltgot_suff, nds32_elf_relax_got_suff
	nds32_elf_relax_gotoff_suff, calculate_plt_memory_address,
	calculate_plt_offset, calculate_got_memory_address,
	nds32_elf_check_dup_relocs): Removed.
	All callers changed.
	* elf32-nds32.h: Remove the unused macros and defines.
	(elf_nds32_link_hash_table): Remove the unused variable.
	(bfd_elf32_nds32_set_target_option): Update prototype.
	(nds32_elf_ex9_init): Removed.
	* elf32-nds32.c (nds32_convert_32_to_16): Updated.
	* elf32-nds32.c (HOWTO2, HOWTO3): Define new HOWTO macros
	to initialize array nds32_elf_howto_table in any order
	without lots of EMPTY_HOWTO.
	(nds32_reloc_map): Updated.
	* reloc.c: Add BFD_RELOC_NDS32_LSI.
	* bfd-in2.h: Regenerated.
	* bfd/libbfd.h: Regenerated.
	* elf32-nds32.c (nds32_elf_relax_howto_table): Add R_NDS32_LSI.
	(nds32_reloc_map): Likewise.
	(nds32_elf_relax_flsi): New function.
	(nds32_elf_relax_section): Support floating load/store relaxation.
	* elf32-nds32.c (NDS32_GUARD_SEC_P, elf32_nds32_local_gp_offset):
	New macro.
	(struct elf_nds32_link_hash_entry): New `offset_to_gp' field.
	(struct elf_nds32_obj_tdata): New `offset_to_gp' and `hdr_size' fields.
	(elf32_nds32_allocate_local_sym_info, nds32_elf_relax_guard,
	nds32_elf_is_target_special_symbol, nds32_elf_maybe_function_sym):
	New functions.
	(nds32_info_to_howto_rel): Add BFD_ASSERT.
	(bfd_elf32_bfd_reloc_type_table_lookup, nds32_elf_link_hash_newfunc,
	nds32_elf_link_hash_table_create, nds32_elf_relocate_section,
	nds32_elf_relax_loadstore, nds32_elf_relax_lo12, nds32_relax_adjust_label,
	bfd_elf32_nds32_set_target_option, nds32_fag_mark_relax): Updated.
	(nds32_elf_final_sda_base): Improve it to find the better gp value.
	(insert_nds32_elf_blank): Must consider `len' when inserting blanks.
	* elf32-nds32.h (bfd_elf32_nds32_set_target_option): Update prototype.
	(struct elf_nds32_link_hash_table): Add new variable `hyper_relax'.
	* elf32-nds32.c (elf32_nds32_allocate_dynrelocs): New function.
	(create_got_section): Likewise.
	(allocate_dynrelocs, nds32_elf_size_dynamic_sections,
	nds32_elf_relocate_section, nds32_elf_finish_dynamic_symbol): Updated.
	(nds32_elf_check_relocs): Fix the issue that the shared library may
	has TEXTREL entry in the dynamic section.
	(nds32_elf_create_dynamic_sections): Enable to call readonly_dynrelocs
	since the TEXTREL issue is fixed in the nds32_elf_check_relocs.
	(nds32_elf_finish_dynamic_sections): Update and add DT_RELASZ
	dynamic entry.
	(calculate_offset): Remove the unused parameter `pic_ext_target' and
	related codes.
	All callers changed.
	(elf_backend_dtrel_excludes_plt): Disable it temporarily since it
	will cause some errors for our test cases.
	* elf32-nds32.c (nds32_elf_merge_private_bfd_data): Allow to link the
	generic object.
	* reloc.c: Add TLS relocations.
	* libbfd.h: Regenerated.
	* bfd-in2.h: Regenerated.
	* elf32-nds32.h (struct section_id_list_t): New.
	(elf32_nds32_lookup_section_id, elf32_nds32_check_relax_group,
	elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model):
	New prototypes.
	(elf32_nds32_compute_jump_table_size, elf32_nds32_local_tlsdesc_gotent):
	New macro.
	(nds32_insertion_sort, bfd_elf32_nds32_set_target_option,
	elf_nds32_link_hash_table): Updated.
	* elf32-nds32.c (enum elf_nds32_tls_type): New.
	(struct elf32_nds32_relax_group_t, struct relax_group_list_t): New.
	(elf32_nds32_add_dynreloc, patch_tls_desc_to_ie, get_tls_type,
	fls, ones32, list_insert, list_insert_sibling, dump_chain,
	elf32_nds32_check_relax_group, elf32_nds32_lookup_section_id,
	elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model): New functions.
	(elf_nds32_obj_tdata): Add new fields.
	(elf32_nds32_relax_group_ptr, nds32_elf_local_tlsdesc_gotent): New macros.
	(nds32_elf_howto_table): Add TLS relocations.
	(nds32_reloc_map): Likewise.
	(nds32_elf_copy_indirect_symbol, nds32_elf_size_dynamic_sections,
	nds32_elf_finish_dynamic_symbol, elf32_nds32_allocate_local_sym_info,
	nds32_elf_relocate_section, bfd_elf32_nds32_set_target_option,
	nds32_elf_check_relocs, allocate_dynrelocs): Updated.
	(nds32_elf_relax_section): Call nds32_elf_unify_tls_model.
	(dtpoff_base): Rename it to `gottpof' and then update it.

opcodes	* nds32-asm.c (operand_fields): Remove the unused fields.
	(nds32_opcodes): Remove the unused instructions.
	* nds32-dis.c (nds32_ex9_info): Removed.
	(nds32_parse_opcode): Updated.
	(print_insn_nds32): Likewise.
	* nds32-asm.c (config.h, stdlib.h, string.h): New includes.
	(LEX_SET_FIELD, LEX_GET_FIELD): Update defines.
	(nds32_asm_init, build_operand_hash_table, build_keyword_hash_table,
	build_opcode_hash_table): New functions.
	(nds32_keyword_table, nds32_keyword_count_table, nds32_field_table,
	nds32_opcode_table): New.
	(hw_ktabs): Declare it to a pointer rather than an array.
	(build_hash_table): Removed.
	* nds32-asm.h (enum): Add SYN_INPUT, SYN_OUTPUT, SYN_LOPT,
	SYN_ROPT and upadte HW_GPR and HW_INT.
	* nds32-dis.c (keywords): Remove const.
	(match_field): New function.
	(nds32_parse_opcode): Updated.
	* disassemble.c (disassemble_init_for_target):
	Add disassemble_init_nds32.
	* nds32-dis.c (eum map_type): New.
	(nds32_private_data): Likewise.
	(get_mapping_symbol_type, is_mapping_symbol, nds32_symbol_is_valid,
	nds32_add_opcode_hash_table, disassemble_init_nds32): New functions.
	(print_insn_nds32): Updated.
	* nds32-asm.c (parse_aext_reg): Add new parameter.
	(parse_re, parse_re2, parse_aext_reg): Only reduced registers
	are allowed to use.
	All callers changed.
	* nds32-asm.c (keyword_usr, keyword_sr): Updated.
	(operand_fields): Add new fields.
	(nds32_opcodes): Add new instructions.
	(keyword_aridxi_mx): New keyword.
	* nds32-asm.h (enum): Add NASM_ATTR_DSP_ISAEXT, HW_AEXT_ARIDXI_MX
	and NASM_ATTR_ZOL.
	(ALU2_1, ALU2_2, ALU2_3): New macros.
	* nds32-dis.c (nds32_filter_unknown_insn): Updated.
This commit is contained in:
Nick Clifton 2018-09-20 13:27:31 +01:00
parent cf93e9c2cf
commit fbaf61ad52
58 changed files with 9267 additions and 5587 deletions

View File

@ -1,3 +1,92 @@
2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
* elf32-nds32.c (nds32_elf_relax_loadstore):
Remove the unused target features.
(bfd_elf32_nds32_set_target_option): Remove the unused parameters.
(nds32_elf_relax_piclo12, nds32_elf_relax_letlslo12,
nds32_elf_relax_letlsadd, nds32_elf_relax_letlsls,
nds32_elf_relax_pltgot_suff, nds32_elf_relax_got_suff
nds32_elf_relax_gotoff_suff, calculate_plt_memory_address,
calculate_plt_offset, calculate_got_memory_address,
nds32_elf_check_dup_relocs): Removed.
All callers changed.
* elf32-nds32.h: Remove the unused macros and defines.
(elf_nds32_link_hash_table): Remove the unused variable.
(bfd_elf32_nds32_set_target_option): Update prototype.
(nds32_elf_ex9_init): Removed.
* elf32-nds32.c (nds32_convert_32_to_16): Updated.
* elf32-nds32.c (HOWTO2, HOWTO3): Define new HOWTO macros
to initialize array nds32_elf_howto_table in any order
without lots of EMPTY_HOWTO.
(nds32_reloc_map): Updated.
* reloc.c: Add BFD_RELOC_NDS32_LSI.
* bfd-in2.h: Regenerated.
* bfd/libbfd.h: Regenerated.
* elf32-nds32.c (nds32_elf_relax_howto_table): Add R_NDS32_LSI.
(nds32_reloc_map): Likewise.
(nds32_elf_relax_flsi): New function.
(nds32_elf_relax_section): Support floating load/store relaxation.
* elf32-nds32.c (NDS32_GUARD_SEC_P, elf32_nds32_local_gp_offset):
New macro.
(struct elf_nds32_link_hash_entry): New `offset_to_gp' field.
(struct elf_nds32_obj_tdata): New `offset_to_gp' and `hdr_size' fields.
(elf32_nds32_allocate_local_sym_info, nds32_elf_relax_guard,
nds32_elf_is_target_special_symbol, nds32_elf_maybe_function_sym):
New functions.
(nds32_info_to_howto_rel): Add BFD_ASSERT.
(bfd_elf32_bfd_reloc_type_table_lookup, nds32_elf_link_hash_newfunc,
nds32_elf_link_hash_table_create, nds32_elf_relocate_section,
nds32_elf_relax_loadstore, nds32_elf_relax_lo12, nds32_relax_adjust_label,
bfd_elf32_nds32_set_target_option, nds32_fag_mark_relax): Updated.
(nds32_elf_final_sda_base): Improve it to find the better gp value.
(insert_nds32_elf_blank): Must consider `len' when inserting blanks.
* elf32-nds32.h (bfd_elf32_nds32_set_target_option): Update prototype.
(struct elf_nds32_link_hash_table): Add new variable `hyper_relax'.
* elf32-nds32.c (elf32_nds32_allocate_dynrelocs): New function.
(create_got_section): Likewise.
(allocate_dynrelocs, nds32_elf_size_dynamic_sections,
nds32_elf_relocate_section, nds32_elf_finish_dynamic_symbol): Updated.
(nds32_elf_check_relocs): Fix the issue that the shared library may
has TEXTREL entry in the dynamic section.
(nds32_elf_create_dynamic_sections): Enable to call readonly_dynrelocs
since the TEXTREL issue is fixed in the nds32_elf_check_relocs.
(nds32_elf_finish_dynamic_sections): Update and add DT_RELASZ
dynamic entry.
(calculate_offset): Remove the unused parameter `pic_ext_target' and
related codes.
All callers changed.
(elf_backend_dtrel_excludes_plt): Disable it temporarily since it
will cause some errors for our test cases.
* elf32-nds32.c (nds32_elf_merge_private_bfd_data): Allow to link the
generic object.
* reloc.c: Add TLS relocations.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
* elf32-nds32.h (struct section_id_list_t): New.
(elf32_nds32_lookup_section_id, elf32_nds32_check_relax_group,
elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model):
New prototypes.
(elf32_nds32_compute_jump_table_size, elf32_nds32_local_tlsdesc_gotent):
New macro.
(nds32_insertion_sort, bfd_elf32_nds32_set_target_option,
elf_nds32_link_hash_table): Updated.
* elf32-nds32.c (enum elf_nds32_tls_type): New.
(struct elf32_nds32_relax_group_t, struct relax_group_list_t): New.
(elf32_nds32_add_dynreloc, patch_tls_desc_to_ie, get_tls_type,
fls, ones32, list_insert, list_insert_sibling, dump_chain,
elf32_nds32_check_relax_group, elf32_nds32_lookup_section_id,
elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model): New functions.
(elf_nds32_obj_tdata): Add new fields.
(elf32_nds32_relax_group_ptr, nds32_elf_local_tlsdesc_gotent): New macros.
(nds32_elf_howto_table): Add TLS relocations.
(nds32_reloc_map): Likewise.
(nds32_elf_copy_indirect_symbol, nds32_elf_size_dynamic_sections,
nds32_elf_finish_dynamic_symbol, elf32_nds32_allocate_local_sym_info,
nds32_elf_relocate_section, bfd_elf32_nds32_set_target_option,
nds32_elf_check_relocs, allocate_dynrelocs): Updated.
(nds32_elf_relax_section): Call nds32_elf_unify_tls_model.
(dtpoff_base): Rename it to `gottpof' and then update it.
2018-09-20 Alan Modra <amodra@gmail.com>
PR 23685

View File

@ -4275,18 +4275,36 @@ This is a 5 bit absolute address. */
/* For TLS. */
BFD_RELOC_NDS32_TPOFF,
BFD_RELOC_NDS32_GOTTPOFF,
BFD_RELOC_NDS32_TLS_LE_HI20,
BFD_RELOC_NDS32_TLS_LE_LO12,
BFD_RELOC_NDS32_TLS_LE_ADD,
BFD_RELOC_NDS32_TLS_LE_LS,
BFD_RELOC_NDS32_GOTTPOFF,
BFD_RELOC_NDS32_TLS_IE_HI20,
BFD_RELOC_NDS32_TLS_IE_LO12S2,
BFD_RELOC_NDS32_TLS_TPOFF,
BFD_RELOC_NDS32_TLS_LE_20,
BFD_RELOC_NDS32_TLS_LE_15S0,
BFD_RELOC_NDS32_TLS_LE_15S1,
BFD_RELOC_NDS32_TLS_LE_15S2,
BFD_RELOC_NDS32_TLS_LE_ADD,
BFD_RELOC_NDS32_TLS_LE_LS,
BFD_RELOC_NDS32_TLS_IE_HI20,
BFD_RELOC_NDS32_TLS_IE_LO12,
BFD_RELOC_NDS32_TLS_IE_LO12S2,
BFD_RELOC_NDS32_TLS_IEGP_HI20,
BFD_RELOC_NDS32_TLS_IEGP_LO12,
BFD_RELOC_NDS32_TLS_IEGP_LO12S2,
BFD_RELOC_NDS32_TLS_IEGP_LW,
BFD_RELOC_NDS32_TLS_DESC,
BFD_RELOC_NDS32_TLS_DESC_HI20,
BFD_RELOC_NDS32_TLS_DESC_LO12,
BFD_RELOC_NDS32_TLS_DESC_20,
BFD_RELOC_NDS32_TLS_DESC_SDA17S2,
BFD_RELOC_NDS32_TLS_DESC_ADD,
BFD_RELOC_NDS32_TLS_DESC_FUNC,
BFD_RELOC_NDS32_TLS_DESC_CALL,
BFD_RELOC_NDS32_TLS_DESC_MEM,
BFD_RELOC_NDS32_REMOVE,
BFD_RELOC_NDS32_GROUP,
/* For floating load store relaxation. */
BFD_RELOC_NDS32_LSI,
/* This is a 9-bit reloc */
BFD_RELOC_V850_9_PCREL,

File diff suppressed because it is too large Load Diff

View File

@ -40,12 +40,6 @@ extern "C" {
/* To distinguish the assembly code generated by compiler
or written manually. */
#define R_NDS32_RELAX_ENTRY_VERBATIM_FLAG (1 << 28)
/* EX9 and link-time IFC must be explicitly enabled, so we
won't mess up handcraft assembly code. */
/* Enable EX9 optimization for this section. */
#define R_NDS32_RELAX_ENTRY_EX9_FLAG (1 << 2)
/* Enable IFC optimization for this section. */
#define R_NDS32_RELAX_ENTRY_IFC_FLAG (1 << 3)
/* Two bits for ICT to comply with files without directive. */
/* ICT small model. */
#define R_NDS32_RELAX_ENTRY_ICT_SMALL (0x2 << 4)
@ -73,8 +67,6 @@ extern "C" {
/* NOT_OMIT_FP_FLAG is set if this region is not worth
for fp-as-gp. */
#define R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG (1 << 1)
/* Suppress EX9 optimization in the region. */
#define R_NDS32_RELAX_REGION_NO_EX9_FLAG (1 << 2)
/* A Innermost loop region. Some optimizations is suppressed
in this region due to performance drop. */
#define R_NDS32_RELAX_REGION_INNERMOST_LOOP_FLAG (1 << 4)
@ -91,43 +83,38 @@ enum
NDS32_LOADSTORE_IMM = 0x20
};
/* Relax tag for nds32_elf_relax_section, we have to specify which
optimization do in this round. */
enum
struct section_id_list_t
{
NDS32_RELAX_NONE_ROUND = 0,
NDS32_RELAX_NORMAL_ROUND,
NDS32_RELAX_JUMP_IFC_ROUND,
NDS32_RELAX_EX9_BUILD_ROUND,
NDS32_RELAX_EX9_REPLACE_ROUND,
NDS32_RELAX_EMPTY_ROUND
int id;
struct section_id_list_t *next;
};
/* Optimization status mask. */
#define NDS32_RELAX_JUMP_IFC_DONE (1 << 0)
#define NDS32_RELAX_EX9_DONE (1 << 1)
/* Optimization turn on mask. */
#define NDS32_RELAX_JUMP_IFC_ON (1 << 0)
#define NDS32_RELAX_EX9_ON (1 << 1)
extern struct section_id_list_t *elf32_nds32_lookup_section_id
(int, struct section_id_list_t **);
extern int elf32_nds32_check_relax_group (bfd *, asection *);
extern int elf32_nds32_unify_relax_group (bfd *, asection *);
extern int nds32_elf_unify_tls_model (bfd *, asection *, bfd_byte *,
struct bfd_link_info *);
extern void nds32_insertion_sort
(void *, size_t, size_t, int (*) (const void *, const void *));
(void *, size_t, size_t, int (*) (const void *, const void *));
extern int nds32_elf_ex9_init (void);
extern int nds32_convert_32_to_16 (bfd *, uint32_t, uint16_t *, int *);
extern int nds32_convert_16_to_32 (bfd *, uint16_t, uint32_t *);
extern void bfd_elf32_nds32_set_target_option (struct bfd_link_info *,
int, int, FILE *, int,
int, int, int, FILE *,
FILE *, int, int,
bfd_boolean, bfd_boolean);
int, int, FILE *,
int, int, int);
#define nds32_elf_hash_table(info) \
(elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
== NDS32_ELF_DATA ? \
((struct elf_nds32_link_hash_table *) ((info)->hash)) : NULL)
#define elf32_nds32_compute_jump_table_size(htab) \
((htab)->next_tls_desc_index * 4)
#define elf32_nds32_local_tlsdesc_gotent(bfd) \
(elf_nds32_tdata (bfd)->local_tlsdesc_gotent)
/* Hash table structure for target nds32. There are some members to
save target options passed from nds32elf.em to bfd. */
@ -143,24 +130,43 @@ struct elf_nds32_link_hash_table
struct sym_cache sym_cache;
/* Target dependent options. */
int relax_fp_as_gp; /* --mrelax-omit-fp */
int eliminate_gc_relocs; /* --meliminate-gc-relocs */
FILE *sym_ld_script; /* --mgen-symbol-ld-script=<file> */
int relax_fp_as_gp; /* --mrelax-omit-fp. */
int eliminate_gc_relocs; /* --meliminate-gc-relocs. */
FILE *sym_ld_script; /* --mgen-symbol-ld-script=<file>. */
bfd_boolean hyper_relax; /* Relax for symbol not in RW sections. */
int tls_desc_trampoline; /* --m[no-]tlsdesc-trampoline. */
/* Disable if linking a dynamically linked executable. */
int load_store_relax;
int target_optimize; /* Switch optimization. */
int relax_status; /* Finished optimization. */
int relax_round; /* Going optimization. */
FILE *ex9_export_file; /* --mexport-ex9=<file> */
FILE *ex9_import_file; /* --mimport-ex9=<file> */
int update_ex9_table; /* --mupdate-ex9. */
int ex9_limit;
bfd_boolean ex9_loop_aware; /* Ignore ex9 if inside a loop. */
bfd_boolean ifc_loop_aware; /* Ignore ifc if inside a loop. */
/* The offset into splt of the PLT entry for the TLS descriptor
resolver. Special values are 0, if not necessary (or not found
to be necessary yet), and -1 if needed but not determined
yet. */
bfd_vma dt_tlsdesc_plt;
/* The offset into sgot of the GOT entry used by the PLT entry
above. */
bfd_vma dt_tlsdesc_got;
/* Offset in .plt section of tls_nds32_trampoline. */
bfd_vma tls_trampoline;
/* The index of the next unused R_NDS32_TLS_DESC slot in .rel.plt. */
bfd_vma next_tls_desc_index;
/* How many R_NDS32_TLS_DESC relocations were generated so far. */
bfd_vma num_tls_desc;
/* The amount of space used by the reserved portion of the sgotplt
section, plus whatever space is used by the jump slots. */
bfd_vma sgotplt_jump_table_size;
/* True if the target uses REL relocations. */
int use_rel;
};
#ifdef __cplusplus
}
#endif
#endif
#endif /* ELF32_NDS32_H */

View File

@ -2002,18 +2002,34 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_NDS32_17IFC_PCREL",
"BFD_RELOC_NDS32_10IFCU_PCREL",
"BFD_RELOC_NDS32_TPOFF",
"BFD_RELOC_NDS32_GOTTPOFF",
"BFD_RELOC_NDS32_TLS_LE_HI20",
"BFD_RELOC_NDS32_TLS_LE_LO12",
"BFD_RELOC_NDS32_TLS_LE_ADD",
"BFD_RELOC_NDS32_TLS_LE_LS",
"BFD_RELOC_NDS32_GOTTPOFF",
"BFD_RELOC_NDS32_TLS_IE_HI20",
"BFD_RELOC_NDS32_TLS_IE_LO12S2",
"BFD_RELOC_NDS32_TLS_TPOFF",
"BFD_RELOC_NDS32_TLS_LE_20",
"BFD_RELOC_NDS32_TLS_LE_15S0",
"BFD_RELOC_NDS32_TLS_LE_15S1",
"BFD_RELOC_NDS32_TLS_LE_15S2",
"BFD_RELOC_NDS32_TLS_LE_ADD",
"BFD_RELOC_NDS32_TLS_LE_LS",
"BFD_RELOC_NDS32_TLS_IE_HI20",
"BFD_RELOC_NDS32_TLS_IE_LO12",
"BFD_RELOC_NDS32_TLS_IE_LO12S2",
"BFD_RELOC_NDS32_TLS_IEGP_HI20",
"BFD_RELOC_NDS32_TLS_IEGP_LO12",
"BFD_RELOC_NDS32_TLS_IEGP_LO12S2",
"BFD_RELOC_NDS32_TLS_IEGP_LW",
"BFD_RELOC_NDS32_TLS_DESC",
"BFD_RELOC_NDS32_TLS_DESC_HI20",
"BFD_RELOC_NDS32_TLS_DESC_LO12",
"BFD_RELOC_NDS32_TLS_DESC_20",
"BFD_RELOC_NDS32_TLS_DESC_SDA17S2",
"BFD_RELOC_NDS32_TLS_DESC_ADD",
"BFD_RELOC_NDS32_TLS_DESC_FUNC",
"BFD_RELOC_NDS32_TLS_DESC_CALL",
"BFD_RELOC_NDS32_TLS_DESC_MEM",
"BFD_RELOC_NDS32_REMOVE",
"BFD_RELOC_NDS32_GROUP",
"BFD_RELOC_NDS32_LSI",
"BFD_RELOC_V850_9_PCREL",
"BFD_RELOC_V850_22_PCREL",
"BFD_RELOC_V850_SDA_16_16_OFFSET",

View File

@ -4253,22 +4253,12 @@ ENUMDOC
For ex9 and ifc using.
ENUM
BFD_RELOC_NDS32_TPOFF
ENUMX
BFD_RELOC_NDS32_GOTTPOFF
ENUMX
BFD_RELOC_NDS32_TLS_LE_HI20
ENUMX
BFD_RELOC_NDS32_TLS_LE_LO12
ENUMX
BFD_RELOC_NDS32_TLS_LE_ADD
ENUMX
BFD_RELOC_NDS32_TLS_LE_LS
ENUMX
BFD_RELOC_NDS32_GOTTPOFF
ENUMX
BFD_RELOC_NDS32_TLS_IE_HI20
ENUMX
BFD_RELOC_NDS32_TLS_IE_LO12S2
ENUMX
BFD_RELOC_NDS32_TLS_TPOFF
ENUMX
BFD_RELOC_NDS32_TLS_LE_20
ENUMX
@ -4277,8 +4267,52 @@ ENUMX
BFD_RELOC_NDS32_TLS_LE_15S1
ENUMX
BFD_RELOC_NDS32_TLS_LE_15S2
ENUMX
BFD_RELOC_NDS32_TLS_LE_ADD
ENUMX
BFD_RELOC_NDS32_TLS_LE_LS
ENUMX
BFD_RELOC_NDS32_TLS_IE_HI20
ENUMX
BFD_RELOC_NDS32_TLS_IE_LO12
ENUMX
BFD_RELOC_NDS32_TLS_IE_LO12S2
ENUMX
BFD_RELOC_NDS32_TLS_IEGP_HI20
ENUMX
BFD_RELOC_NDS32_TLS_IEGP_LO12
ENUMX
BFD_RELOC_NDS32_TLS_IEGP_LO12S2
ENUMX
BFD_RELOC_NDS32_TLS_IEGP_LW
ENUMX
BFD_RELOC_NDS32_TLS_DESC
ENUMX
BFD_RELOC_NDS32_TLS_DESC_HI20
ENUMX
BFD_RELOC_NDS32_TLS_DESC_LO12
ENUMX
BFD_RELOC_NDS32_TLS_DESC_20
ENUMX
BFD_RELOC_NDS32_TLS_DESC_SDA17S2
ENUMX
BFD_RELOC_NDS32_TLS_DESC_ADD
ENUMX
BFD_RELOC_NDS32_TLS_DESC_FUNC
ENUMX
BFD_RELOC_NDS32_TLS_DESC_CALL
ENUMX
BFD_RELOC_NDS32_TLS_DESC_MEM
ENUMX
BFD_RELOC_NDS32_REMOVE
ENUMX
BFD_RELOC_NDS32_GROUP
ENUMDOC
For TLS.
ENUM
BFD_RELOC_NDS32_LSI
ENUMDOC
For floating load store relaxation.
ENUM

View File

@ -1,3 +1,8 @@
2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
* testsuite/binutils-all/objcopy.exp: Set the unsupported reloc number
from 215 to 255 for NDS32.
2018-09-17 H.J. Lu <hongjiu.lu@intel.com>
* objcopy.c (strip_specific_buffer): New.

View File

@ -12,8 +12,9 @@
#...
\[[ 0-9]+\] \.data.*[ \t]+PROGBITS[ \t0-9a-f]+WAG.*
#...
COMDAT group section \[[ 0-9]+\] `\.group' \[foo_group\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `\.group' \[foo_group\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.*
#...
\[[ 0-9]+\] .data.*
#pass

View File

@ -1098,7 +1098,11 @@ if [is_elf_format] {
set reloc_format mips64
}
# A relocation type not supported by any target
set reloc 215
if { [istarget "nds32*-*"] } {
set reloc 255
} else {
set reloc 215
}
run_dump_test "strip-13" [list \
[list source strip-13${reloc_format}.s] \
[list as "${elf64} --defsym RELOC=${reloc}"]]

View File

@ -11,8 +11,9 @@
#...
\[[ 0-9]+\] \.data.*[ \t]+PROGBITS[ \t0-9a-f]+WAG[ \t]+.*
#...
COMDAT group section \[[ 0-9]+\] `\.group' \[foo_group\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `\.group' \[foo_group\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.*
#...
\[[ 0-9]+\] .data.*
#pass

View File

@ -11,8 +11,9 @@
#...
\[[ 0-9]+\] \.data.*[ \t]+PROGBITS[ \t0-9a-f]+WAG[ \t]+.*
#...
COMDAT group section \[[ 0-9]+\] `.group' \[.text.foo\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[.text.foo\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.*
#...
\[[ 0-9]+\] .data.*
#pass

View File

@ -11,8 +11,9 @@
#...
\[[ 0-9]+\] \.data.*[ \t]+PROGBITS[ \t0-9a-f]+WAG[ \t]+.*
#...
COMDAT group section \[[ 0-9]+\] `.group' \[foo3\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[foo3\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.*
#...
\[[ 0-9]+\] .data.*
#pass

View File

@ -11,8 +11,9 @@
#...
\[[ 0-9]+\] \.data.*[ \t]+PROGBITS[ \t0-9a-f]+WAG[ \t]+.*
#...
COMDAT group section \[[ 0-9]+\] `.group' \[foo4\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[foo4\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.*
#...
\[[ 0-9]+\] .data.*
#pass

View File

@ -1,3 +1,82 @@
2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
* config/tc-nds32.c: Remove the unused target features.
(nds32_relax_relocs, md_pseudo_table, nds32_elf_record_fixup_exp,
nds32_set_elf_flags_by_insn, nds32_insert_relax_entry,
nds32_apply_fix): Likewise.
(nds32_no_ex9_begin): Removed.
* config/tc-nds32.c (add_mapping_symbol_for_align,
make_mapping_symbol, add_mapping_symbol): New functions.
* config/tc-nds32.h (enum mstate): New.
(nds32_segment_info_type): Likewise.
* configure.ac (--enable-dsp-ext, --enable-zol-ext): New options.
* config.in: Regenerated.
* configure: Regenerated.
* config/tc-nds32.c (nds32_dx_regs):
Set the value according to the configuration.
(nds32_perf_ext, nds32_perf_ext2, nds32_string_ext, nds32_audio_ext):
Likewise.
(nds32_dsp_ext): New variable. Set the value according to the
configuration.
(nds32_zol_ext): Likewise.
(asm_desc, nds32_pseudo_opcode_table): Make them static.
(nds32_set_elf_flags_by_insn): Updated.
(nds32_check_insn_available): Updated.
(nds32_str_tolower): New function.
* config/tc-nds32.c (relax_table): Updated.
(md_begin): Updated.
(md_assemble): Use XNEW macro to allocate space for `insn.info',
and then remember to free it.
(md_section_align): Cast (-1) to ValueT.
(nds32_get_align): Cast (~0U) to addressT.
(nds32_relax_branch_instructions): Updated.
(md_convert_frag): Add new local variable `final_r_type'.
(invalid_prev_frag): Add new bfd_boolean parameter `relax'.
All callers changed.
* config/tc-nds32.c (struct nds32_relocs_pattern): Add `insn' field.
(struct nds32_hint_map): Add `option_list' field.
(struct suffix_name, suffix_table): Remove the unused `pic' field.
(do_pseudo_b, do_pseudo_bal): Remove the suffix checking.
(do_pseudo_la_internal, do_pseudo_pushpopm): Indent.
(relax_hint_bias, relax_hint_id_current): New static variables.
(reset_bias, relax_hint_begin): New variables.
(nds_itoa): New function.
(CLEAN_REG, GET_OPCODE): New macros.
(struct relax_hint_id): New.
(nds32_relax_hint): For .relax_hint directive, we can use `begin'
and `end' to mark the relax pattern without giving exactly id number.
(nds32_elf_append_relax_relocs): Handle the case that the .relax_hint
directives are attached to pseudo instruction.
(nds32_elf_save_pseudo_pattern): Change the second parameter from
instruction's opcode to byte code.
(nds32_elf_build_relax_relation): Add new bfd_boolean parameter
`pseudo_hint'.
(nds32_lookup_pseudo_opcode): Fix the overflow issue.
(enum nds32_insn_type): Add N32_RELAX_ALU1 and N32_RELAX_16BIT.
(nds32_elf_record_fixup_exp, relax_ls_table, hint_map,
nds32_find_reloc_table, nds32_match_hint_insn, nds32_parse_name):
Updated.
* config/tc-nds32.h (MAX_RELAX_NUM): Extend it to 6.
(enum nds32_relax_hint_type): Merge NDS32_RELAX_HINT_LA and
NDS32_RELAX_HINT_LS into NDS32_RELAX_HINT_LALS. Add
NDS32_RELAX_HINT_LA_PLT, NDS32_RELAX_HINT_LA_GOT and
NDS32_RELAX_HINT_LA_GOTOFF.
* config/tc-nds32.h (relax_ls_table): Add floating load/store
to gp relax pattern.
(hint_map, nds32_find_reloc_table): Likewise.
* configure.ac: Define NDS32_LINUX_TOOLCHAIN.
* configure: Regenerated.
* config.in: Regenerated.
* config/tc-nds32.h (enum nds32_ramp): Updated.
(enum nds32_relax_hint_type): Likewise.
* config/tc-nds32.c: Include "errno.h" and "limits.h".
(relax_ls_table): Add TLS relax patterns.
(nds32_elf_append_relax_relocs): Attach BFD_RELOC_NDS32_GROUP on
each instructions of TLS patterns.
(nds32_elf_record_fixup_exp): Updated.
(nds32_apply_fix): Likewise.
(suffix_table): Add TLSDESC suffix.
2018-09-18 Tamar Christina <tamar.christina@arm.com>
* config/tc-aarch64.c (output_operand_error_report): Apply filtering to

View File

@ -204,6 +204,9 @@
/* Define default value for nds32_audio_ext */
#undef NDS32_DEFAULT_AUDIO_EXT
/* Define default value for nds32_dsp_ext */
#undef NDS32_DEFAULT_DSP_EXT
/* Define default value for nds32_dx_regs */
#undef NDS32_DEFAULT_DX_REGS
@ -216,6 +219,12 @@
/* Define default value for nds32_string_ext */
#undef NDS32_DEFAULT_STRING_EXT
/* Define default value for nds32_zol_ext */
#undef NDS32_DEFAULT_ZOL_EXT
/* Define default value for nds32_linux_toolchain */
#undef NDS32_LINUX_TOOLCHAIN
/* Define if environ is not declared in system header files. */
#undef NEED_DECLARATION_ENVIRON

File diff suppressed because it is too large Load Diff

View File

@ -24,6 +24,21 @@
#include "bfd_stdint.h"
/* Enum mapping symbol. */
enum mstate
{
MAP_UNDEFINED = 0, /* Must be zero, for seginfo in new sections. */
MAP_DATA,
MAP_CODE,
};
#define TC_SEGMENT_INFO_TYPE struct nds32_segment_info_type
/* For mapping symbol. */
struct nds32_segment_info_type
{
enum mstate mapstate;
};
#define LISTING_HEADER \
(target_big_endian ? "NDS32 GAS" : "NDS32 GAS Little Endian")
@ -231,7 +246,11 @@ enum nds32_ramp
NDS32_FIX = (1 << 7),
NDS32_ADDEND = (1 << 8),
NDS32_SYM = (1 << 9),
NDS32_PCREL = (1 << 10)
NDS32_PCREL = (1 << 10),
NDS32_PTR_PATTERN = (1 << 11),
NDS32_PTR_MULTIPLE = (1 << 12),
NDS32_GROUP = (1 << 13),
NDS32_SYM_DESC_MEM = (1 << 14)
};
typedef struct nds32_relax_fixup_info
@ -254,8 +273,8 @@ typedef struct nds32_cond_field
/* The max relaxation pattern is 20-bytes including the nop. */
#define NDS32_MAXCHAR 20
/* In current, the max extended number of instruction for one pseudo instruction
is 4, but its number of relocation may be 12. */
#define MAX_RELAX_NUM 4
is 6, but its number of relocation may be 12. */
#define MAX_RELAX_NUM 6
#define MAX_RELAX_FIX 12
typedef struct nds32_relax_info
@ -275,8 +294,17 @@ typedef struct nds32_relax_info
enum nds32_relax_hint_type
{
NDS32_RELAX_HINT_NONE = 0,
NDS32_RELAX_HINT_LA,
NDS32_RELAX_HINT_LS
NDS32_RELAX_HINT_LA_FLSI,
NDS32_RELAX_HINT_LALS,
NDS32_RELAX_HINT_LA_PLT,
NDS32_RELAX_HINT_LA_GOT,
NDS32_RELAX_HINT_LA_GOTOFF,
NDS32_RELAX_HINT_TLS_START = 0x100,
NDS32_RELAX_HINT_TLS_LE_LS,
NDS32_RELAX_HINT_TLS_IE_LS,
NDS32_RELAX_HINT_TLS_IE_LA,
NDS32_RELAX_HINT_TLS_IEGP_LA,
NDS32_RELAX_HINT_TLS_DESC_LS,
};
struct nds32_relax_hint_table

39
gas/configure vendored
View File

@ -12841,6 +12841,17 @@ _ACEOF
;;
nds32)
# setup NDS32_LINUX_TOOLCHAIN definition
if test "linux" = $em; then
$as_echo "#define NDS32_LINUX_TOOLCHAIN 1" >>confdefs.h
else
$as_echo "#define NDS32_LINUX_TOOLCHAIN 0" >>confdefs.h
fi
# Decide BASELINE, REDUCED_REGS, FPU_DP_EXT, FPU_SP_EXT features
# based on arch_name.
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --with-arch" >&5
@ -12932,6 +12943,34 @@ $as_echo "#define NDS32_DEFAULT_AUDIO_EXT 1" >>confdefs.h
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_audio_ext" >&5
$as_echo "$enable_audio_ext" >&6; }
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-dsp-ext" >&5
$as_echo_n "checking for default configuration of --enable-dsp-ext... " >&6; }
if test "x${enable_dsp_ext}" = xno; then
$as_echo "#define NDS32_DEFAULT_DSP_EXT 0" >>confdefs.h
else
$as_echo "#define NDS32_DEFAULT_DSP_EXT 1" >>confdefs.h
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_dsp_ext" >&5
$as_echo "$enable_dsp_ext" >&6; }
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for default configuration of --enable-zol-ext" >&5
$as_echo_n "checking for default configuration of --enable-zol-ext... " >&6; }
if test "x${enable_zol_ext}" = xno; then
$as_echo "#define NDS32_DEFAULT_ZOL_EXT 0" >>confdefs.h
else
$as_echo "#define NDS32_DEFAULT_ZOL_EXT 1" >>confdefs.h
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $enable_zol_ext" >&5
$as_echo "$enable_zol_ext" >&6; }
;;
aarch64 | i386 | riscv | s390 | sparc)

View File

@ -446,6 +446,15 @@ changequote([,])dnl
;;
nds32)
# setup NDS32_LINUX_TOOLCHAIN definition
if test "linux" = $em; then
AC_DEFINE(NDS32_LINUX_TOOLCHAIN, 1,
[Define value for nds32_linux_toolchain])
else
AC_DEFINE(NDS32_LINUX_TOOLCHAIN, 0,
[Define default value for nds32_linux_toolchain])
fi
# Decide BASELINE, REDUCED_REGS, FPU_DP_EXT, FPU_SP_EXT features
# based on arch_name.
AC_MSG_CHECKING(for default configuration of --with-arch)
@ -512,6 +521,26 @@ changequote([,])dnl
[Define default value for nds32_audio_ext])
fi
AC_MSG_RESULT($enable_audio_ext)
AC_MSG_CHECKING(for default configuration of --enable-dsp-ext)
if test "x${enable_dsp_ext}" = xno; then
AC_DEFINE(NDS32_DEFAULT_DSP_EXT, 0,
[Define value for nds32_dsp_ext])
else
AC_DEFINE(NDS32_DEFAULT_DSP_EXT, 1,
[Define default value for nds32_dsp_ext])
fi
AC_MSG_RESULT($enable_dsp_ext)
AC_MSG_CHECKING(for default configuration of --enable-zol-ext)
if test "x${enable_zol_ext}" = xno; then
AC_DEFINE(NDS32_DEFAULT_ZOL_EXT, 0,
[Define value for nds32_zol_ext])
else
AC_DEFINE(NDS32_DEFAULT_ZOL_EXT, 1,
[Define default value for nds32_zol_ext])
fi
AC_MSG_RESULT($enable_zol_ext)
;;
aarch64 | i386 | riscv | s390 | sparc)

View File

@ -109,7 +109,7 @@ case $target_triplet in {
# Some targets don't manage to resolve BFD_RELOC_8 for constants.
setup_xfail "alpha*-*-*" "*c30*-*-*" "*c4x*-*-*" \
"d\[13\]0v*-*-*" \
"nds32*-*-*" "pdp11-*-*" "xtensa*-*-*"
"pdp11-*-*" "xtensa*-*-*"
run_dump_test forward
}
}
@ -389,7 +389,6 @@ if { ![istarget "bfin-*-*"] && ![istarget "nds32*-*-*"] } then {
run_dump_test sleb128
run_dump_test sleb128-2
run_dump_test sleb128-3
setup_xfail "nds32*-*-*"
run_dump_test sleb128-4
run_dump_test sleb128-5
# .byte is not 8 bits on either tic4x or tic54x

View File

@ -3,8 +3,10 @@
#source: group0.s
#...
COMDAT group section \[ 1\] `\.group' \[.foo_group\] contains 2 sections:
COMDAT group section \[ 1\] `\.group' \[.foo_group\] contains . sections:
[ ]+\[Index\][ ]+Name
#...
[ ]+\[.*\][ ]+.foo
#...
[ ]+\[.*\][ ]+.bar
#pass

View File

@ -3,7 +3,8 @@
#source: group1.s
#...
COMDAT group section \[ 1\] `\.group' \[.foo_group\] contains 1 sections:
COMDAT group section \[ 1\] `\.group' \[.foo_group\] contains . sections:
[ ]+\[Index\][ ]+Name
#...
[ ]+\[.*\][ ]+.text
#pass

View File

@ -1,7 +1,8 @@
#readelf: -g --wide
COMDAT group section \[[ 0-9]+\] `.group' \[foo\] contains 3 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[foo\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] \.foo
#...
\[[ 0-9]+\] \.bar
\[[ 0-9]+\] \.rela?\.bar

View File

@ -3,8 +3,9 @@
#source: groupauto.s
#...
COMDAT group section \[ 1\] `\.group' \[some_group\] contains [23] sections:
COMDAT group section \[ 1\] `\.group' \[some_group\] contains . sections:
[ ]+\[Index\][ ]+Name
[ ]+\[.*\][ ]+.text
#...
[ ]+\[.*\][ ]+.note.bar
#pass

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@ -26,7 +26,7 @@
#...
\[[ 0-9]+\] \.mbind\.text[ ]+PROGBITS[ ]+0+0 0+[0-9a-f]+ 0+1 00 AXGD 0 3 1
#...
COMDAT group section \[ 1\] `\.group' \[\.foo_group\] contains 4 sections:
COMDAT group section \[ 1\] `\.group' \[\.foo_group\] contains . sections:
[ ]+\[Index\][ ]+Name
[ ]+\[[ 0-9]+][ ]+\.mbind\.rodata
[ ]+\[[ 0-9]+][ ]+\.mbind\.data

View File

@ -9,6 +9,8 @@
Disassembly of section .text:
0+0000 <[^>]*> beq \$r0, \$r1, 00000000 <foo>
0: R_NDS32_15_PCREL_RELA .text
0: R_NDS32_RELAX_ENTRY .text
0: R_NDS32_INSN16 \*ABS\*
0: R_NDS32_RELAX_ENTRY \*ABS\*
0+0004 <[^>]*> bne \$r0, \$r1, 00000004 <foo\+0x4>
4: R_NDS32_15_PCREL_RELA .text
4: R_NDS32_INSN16 \*ABS\*

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@ -9,7 +9,8 @@
Disassembly of section .text:
0+0000 <[^>]*> beqz \$r0, 00000000 <foo>
0: R_NDS32_17_PCREL_RELA .text
0: R_NDS32_RELAX_ENTRY .text
0: R_NDS32_INSN16 \*ABS\*
0: R_NDS32_RELAX_ENTRY \*ABS\*
0+0004 <[^>]*> bgez \$r0, 00000004 <foo\+0x4>
4: R_NDS32_17_PCREL_RELA .text
0+0008 <[^>]*> bgezal \$r0, 00000008 <foo\+0x8>

View File

@ -7,11 +7,11 @@
.*: file format .*
Disassembly of section .text:
0+0000 <[^>]*> j8 00000000 <foo>
0: R_NDS32_9_PCREL_RELA .text
0: R_NDS32_RELAX_ENTRY .text
0+0002 <[^>]*> jal 00000002 <foo\+0x2>
2: R_NDS32_25_PCREL_RELA .text
0+0006 <[^>]*> jr \$r0
0+000a <[^>]*> jral \$lp, \$r0
0+000e <[^>]*> ret \$lp
0+0000 <[^>]*> j 00000000 <foo>
0: R_NDS32_25_PCREL_RELA .text
0: R_NDS32_RELAX_ENTRY \*ABS\*
0+0004 <[^>]*> jal 00000004 <foo\+0x4>
4: R_NDS32_25_PCREL_RELA .text
0+0008 <[^>]*> jr[ ]+\$r0
0+000c <[^>]*> jral[ ]+\$lp, \$r0
0+0010 <[^>]*> ret[ ]+\$lp

View File

@ -1,3 +1,16 @@
2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
* elf/nds32.h: Remove the unused target features.
* dis-asm.h (disassemble_init_nds32): Declared.
* elf/nds32.h (E_NDS32_NULL): Removed.
(E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
* opcode/nds32.h: Ident.
(N32_SUB6, INSN_LW): New macros.
(enum n32_opcodes): Updated.
* elf/nds32.h: Doc fixes.
* elf/nds32.h: Add R_NDS32_LSI.
* elf/nds32.h: Add new relocations for TLS.
2018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* elf/common.h (AT_SUN_HWCAP): Rename to ...

View File

@ -304,6 +304,7 @@ extern bfd_boolean csky_symbol_is_valid (asymbol *, struct disassemble_info *);
extern void disassemble_init_powerpc (struct disassemble_info *);
extern void disassemble_init_s390 (struct disassemble_info *);
extern void disassemble_init_wasm32 (struct disassemble_info *);
extern void disassemble_init_nds32 (struct disassemble_info *);
extern const disasm_options_and_args_t *disassembler_options_arm (void);
extern const disasm_options_and_args_t *disassembler_options_mips (void);
extern const disasm_options_and_args_t *disassembler_options_powerpc (void);

View File

@ -24,8 +24,8 @@
#include "elf/reloc-macros.h"
/* Relocations. */
START_RELOC_NUMBERS (elf_nds32_reloc_type)
/* These used for relocations. */
RELOC_NUMBER (R_NDS32_NONE, 0)
/* REL relocations. */
RELOC_NUMBER (R_NDS32_16, 1)
@ -46,7 +46,6 @@ START_RELOC_NUMBERS (elf_nds32_reloc_type)
RELOC_NUMBER (R_NDS32_SDA15S0, 16)
RELOC_NUMBER (R_NDS32_GNU_VTINHERIT, 17)
RELOC_NUMBER (R_NDS32_GNU_VTENTRY, 18)
/* RELA relocations. */
RELOC_NUMBER (R_NDS32_16_RELA, 19)
RELOC_NUMBER (R_NDS32_32_RELA, 20)
@ -66,7 +65,7 @@ START_RELOC_NUMBERS (elf_nds32_reloc_type)
RELOC_NUMBER (R_NDS32_SDA15S0_RELA, 34)
RELOC_NUMBER (R_NDS32_RELA_GNU_VTINHERIT, 35)
RELOC_NUMBER (R_NDS32_RELA_GNU_VTENTRY, 36)
/* GOT and PLT. */
RELOC_NUMBER (R_NDS32_GOT20, 37)
RELOC_NUMBER (R_NDS32_25_PLTREL, 38)
RELOC_NUMBER (R_NDS32_COPY, 39)
@ -81,15 +80,17 @@ START_RELOC_NUMBERS (elf_nds32_reloc_type)
RELOC_NUMBER (R_NDS32_GOTPC_LO12, 48)
RELOC_NUMBER (R_NDS32_GOTOFF_HI20, 49)
RELOC_NUMBER (R_NDS32_GOTOFF_LO12, 50)
/* 32_to_16 relaxations. */
RELOC_NUMBER (R_NDS32_INSN16, 51)
/* Alignment tag. */
RELOC_NUMBER (R_NDS32_LABEL, 52)
RELOC_NUMBER (R_NDS32_LONGCALL1, 53)
RELOC_NUMBER (R_NDS32_LONGCALL2, 54)
RELOC_NUMBER (R_NDS32_LONGCALL3, 55)
RELOC_NUMBER (R_NDS32_LONGJUMP1, 56)
RELOC_NUMBER (R_NDS32_LONGJUMP2, 57)
RELOC_NUMBER (R_NDS32_LONGJUMP3, 58)
RELOC_NUMBER (R_NDS32_LOADSTORE, 59)
RELOC_NUMBER (R_NDS32_LONGCALL1, 53) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_LONGCALL2, 54) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_LONGCALL3, 55) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_LONGJUMP1, 56) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_LONGJUMP2, 57) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_LONGJUMP3, 58) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_LOADSTORE, 59) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_9_FIXED_RELA, 60)
RELOC_NUMBER (R_NDS32_15_FIXED_RELA, 61)
RELOC_NUMBER (R_NDS32_17_FIXED_RELA, 62)
@ -107,9 +108,9 @@ START_RELOC_NUMBERS (elf_nds32_reloc_type)
RELOC_NUMBER (R_NDS32_SDA17S2_RELA, 74)
RELOC_NUMBER (R_NDS32_SDA18S1_RELA, 75)
RELOC_NUMBER (R_NDS32_SDA19S0_RELA, 76)
RELOC_NUMBER (R_NDS32_DWARF2_OP1_RELA, 77)
RELOC_NUMBER (R_NDS32_DWARF2_OP2_RELA, 78)
RELOC_NUMBER (R_NDS32_DWARF2_LEB_RELA, 79)
RELOC_NUMBER (R_NDS32_DWARF2_OP1_RELA, 77) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_DWARF2_OP2_RELA, 78) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_DWARF2_LEB_RELA, 79) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_UPDATE_TA_RELA, 80) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_9_PLTREL, 81)
RELOC_NUMBER (R_NDS32_PLT_GOTREL_LO20, 82)
@ -126,8 +127,9 @@ START_RELOC_NUMBERS (elf_nds32_reloc_type)
RELOC_NUMBER (R_NDS32_SDA_FP7U2_RELA, 93)
RELOC_NUMBER (R_NDS32_WORD_9_PCREL_RELA, 94)
RELOC_NUMBER (R_NDS32_25_ABS_RELA, 95)
RELOC_NUMBER (R_NDS32_17IFC_PCREL_RELA, 96)
RELOC_NUMBER (R_NDS32_10IFCU_PCREL_RELA, 97)
RELOC_NUMBER (R_NDS32_17IFC_PCREL_RELA, 96) /* This is obsoleted. */
RELOC_NUMBER (R_NDS32_10IFCU_PCREL_RELA, 97) /* This is obsoleted. */
/* TLS support. */
RELOC_NUMBER (R_NDS32_TLS_LE_HI20, 98)
RELOC_NUMBER (R_NDS32_TLS_LE_LO12, 99)
RELOC_NUMBER (R_NDS32_TLS_IE_HI20, 100)
@ -144,7 +146,20 @@ START_RELOC_NUMBERS (elf_nds32_reloc_type)
RELOC_NUMBER (R_NDS32_LONGJUMP5, 111)
RELOC_NUMBER (R_NDS32_LONGJUMP6, 112)
RELOC_NUMBER (R_NDS32_LONGJUMP7, 113)
/* Reserved numbers: 114. */
/* TLS support */
RELOC_NUMBER (R_NDS32_TLS_IE_LO12, 115)
RELOC_NUMBER (R_NDS32_TLS_IEGP_HI20, 116)
RELOC_NUMBER (R_NDS32_TLS_IEGP_LO12, 117)
RELOC_NUMBER (R_NDS32_TLS_IEGP_LO12S2, 118)
RELOC_NUMBER (R_NDS32_TLS_DESC, 119)
RELOC_NUMBER (R_NDS32_TLS_DESC_HI20, 120)
RELOC_NUMBER (R_NDS32_TLS_DESC_LO12, 121)
RELOC_NUMBER (R_NDS32_TLS_DESC_20, 122)
RELOC_NUMBER (R_NDS32_TLS_DESC_SDA17S2, 123)
/* Reserved numbers: 124-191. */
/* These used only for relaxations */
RELOC_NUMBER (R_NDS32_RELAX_ENTRY, 192)
RELOC_NUMBER (R_NDS32_GOT_SUFF, 193)
RELOC_NUMBER (R_NDS32_GOTOFF_SUFF, 194)
@ -164,9 +179,19 @@ START_RELOC_NUMBERS (elf_nds32_reloc_type)
RELOC_NUMBER (R_NDS32_DIFF_ULEB128, 208)
RELOC_NUMBER (R_NDS32_DATA, 209)
RELOC_NUMBER (R_NDS32_TRAN, 210)
/* TLS support */
RELOC_NUMBER (R_NDS32_TLS_LE_ADD, 211)
RELOC_NUMBER (R_NDS32_TLS_LE_LS, 212)
RELOC_NUMBER (R_NDS32_EMPTY, 213)
RELOC_NUMBER (R_NDS32_TLS_DESC_ADD, 214)
RELOC_NUMBER (R_NDS32_TLS_DESC_FUNC, 215)
RELOC_NUMBER (R_NDS32_TLS_DESC_CALL, 216)
RELOC_NUMBER (R_NDS32_TLS_DESC_MEM, 217)
RELOC_NUMBER (R_NDS32_RELAX_REMOVE, 218)
RELOC_NUMBER (R_NDS32_RELAX_GROUP, 219)
RELOC_NUMBER (R_NDS32_TLS_IEGP_LW, 220)
RELOC_NUMBER (R_NDS32_LSI, 221)
/* Reserved numbers: 222-255. */
END_RELOC_NUMBERS (R_NDS32_max)
@ -217,7 +242,6 @@ END_RELOC_NUMBERS (R_NDS32_max)
/* MFUSR rt, PC and correct ISYNC, MSYNC instructions.
Old N1213HC has no such instructions. */
#define E_NDS32_HAS_MFUSR_PC_INST 0x00000100 /* Reclaimed. */
#define E_NDS32_HAS_EX9_INST 0x00000100 /* v3, ELF 1.4. */
/* C/C++ performance extension instructions. */
#define E_NDS32_HAS_EXT_INST 0x00000200
/* Performance extension set II instructions. */
@ -232,7 +256,6 @@ END_RELOC_NUMBERS (R_NDS32_max)
#define E_NDS32_HAS_DIV_DX_INST 0x00002000 /* v2. */
/* 16-bit instructions. */
#define E_NDS32_HAS_16BIT_INST 0x00004000 /* Reclaimed. */
#define E_NDS32_HAS_IFC_INST 0x00004000 /* v3, ELF 1.4. */
/* String operation instructions. */
#define E_NDS32_HAS_STRING_INST 0x00008000
/* Reduced register file. */
@ -259,12 +282,14 @@ END_RELOC_NUMBERS (R_NDS32_max)
#define E_NDS32_FPU_REG_32SP_32DP 0x3
/* FPU MAC instruction used. */
#define E_NDS32_HAS_FPU_MAC_INST 0x01000000
/* <<<Empty Check>>>. */
#define E_NDS32_NULL 0x02000000
/* DSP extension. */
#define E_NDS32_HAS_DSP_INST 0x02000000
/* PIC enabled. */
#define E_NDS32_HAS_PIC 0x04000000
/* Use custom section. */
#define E_NDS32_HAS_CUSTOM_SEC 0x08000000
/* Hardware zero-overhead loop enabled. */
#define E_NDS32_HAS_ZOL (1 << 26)
/* 4-bit for ABI signature, allow up to 16 ABIs
0: for OLD ABI V0, phase out
@ -293,7 +318,7 @@ END_RELOC_NUMBERS (R_NDS32_max)
/* Andes ELF Version 1.31. */
#define E_NDS32_ELF_VER_1_3 0x1
/* Andes ELF Version 1.4. Change the way we fix .debug_* and .gcc_except_table.
Change three bit for EX9, IFC and SAT. */
Change three bit for SAT. */
#define E_NDS32_ELF_VER_1_4 0x2
#endif

View File

@ -21,19 +21,20 @@
#define OPCODE_NDS32_H
/* Registers. */
#define REG_R5 5
#define REG_R8 8
#define REG_R10 10
#define REG_R12 12
#define REG_R15 15
#define REG_R16 16
#define REG_R20 20
#define REG_TA 15
#define REG_TP 27
#define REG_FP 28
#define REG_GP 29
#define REG_LP 30
#define REG_SP 31
#define REG_R0 (0)
#define REG_R5 (5)
#define REG_R8 (8)
#define REG_R10 (10)
#define REG_R12 (12)
#define REG_R15 (15)
#define REG_R16 (16)
#define REG_R20 (20)
#define REG_TA (15)
#define REG_TP (25)
#define REG_FP (28)
#define REG_GP (29)
#define REG_LP (30)
#define REG_SP (31)
/* Macros for extracting fields or making an instruction. */
static const int nds32_r45map[] ATTRIBUTE_UNUSED =
@ -146,6 +147,7 @@ static const int nds32_r54map[] ATTRIBUTE_UNUSED =
#define N32_RD5(insn) (((insn) >> 5) & 0x1f)
#define N32_SH5(insn) (((insn) >> 5) & 0x1f)
#define N32_SUB5(insn) (((insn) >> 0) & 0x1f)
#define N32_SUB6(insn) (((insn) >> 0) & 0x3f)
#define N32_SWID(insn) (((insn) >> 5) & 0x3ff)
#define N32_IMMU(insn, bs) ((insn) & __MASK (bs))
#define N32_IMMS(insn, bs) ((signed) __SEXT (((insn) & __MASK (bs)), bs))
@ -275,7 +277,7 @@ enum n32_opcodes
N32_BR1_BNE = 1,
/* bit[16:19] */
N32_BR2_IFCALL = 0,
N32_BR2_SOP0 = 0,
N32_BR2_BEQZ = 2,
N32_BR2_BNEZ = 3,
N32_BR2_BGEZ = 4,
@ -365,7 +367,8 @@ enum n32_opcodes
N32_ALU2_FFZMISM,
N32_ALU2_KADD = 0x18,
N32_ALU2_KSUB,
N32_ALU2_KSLRA,
N32_ALU2_KSLRAW,
N32_ALU2_KSLRAWu,
N32_ALU2_MFUSR = 0x20,
N32_ALU2_MTUSR,
N32_ALU2_0x22,
@ -381,20 +384,173 @@ enum n32_opcodes
N32_ALU2_MSUB64,
N32_ALU2_DIVS,
N32_ALU2_DIV,
N32_ALU2_0x30 = 0x30,
N32_ALU2_ADD64 = 0x30,
N32_ALU2_MULT32,
N32_ALU2_0x32,
N32_ALU2_SMAL,
N32_ALU2_MADD32,
N32_ALU2_0x34,
N32_ALU2_SUB64,
N32_ALU2_MSUB32,
N32_ALU2_0x36,
N32_ALU2_0x37,
N32_ALU2_RADD64 = 0x38,
N32_ALU2_URADD64,
N32_ALU2_KADD64,
N32_ALU2_UKADD64,
N32_ALU2_RSUB64,
N32_ALU2_URSUB64,
N32_ALU2_KSUB64,
N32_ALU2_UKSUB64,
/* bit[0:5], where bit[6:9] != 0 */
/* bit[0:5], where bit[6:9] = 0001 */
N32_ALU2_SMAR64 = 0x0,
N32_ALU2_UMAR64,
N32_ALU2_SMSR64,
N32_ALU2_UMSR64,
N32_ALU2_KMAR64,
N32_ALU2_UKMAR64,
N32_ALU2_KMSR64,
N32_ALU2_UKMSR64,
N32_ALU2_SMALDA = 0x8,
N32_ALU2_SMSLDA,
N32_ALU2_SMALDS,
N32_ALU2_SMALBB,
N32_ALU2_FFBI = 0xe,
N32_ALU2_FLMISM = 0xf,
N32_ALU2_SMALXDA = 0x10,
N32_ALU2_SMSLXDA,
N32_ALU2_SMALXDS,
N32_ALU2_SMALBT,
N32_ALU2_SMALDRS = 0x1a,
N32_ALU2_SMALTT,
N32_ALU2_RDOV = 0x20,
N32_ALU2_CLROV,
N32_ALU2_MULSR64 = 0x28,
N32_ALU2_MULR64 = 0x29,
N32_ALU2_MADDR32 = 0x33,
N32_ALU2_MSUBR32 = 0x35,
N32_ALU2_SMDS = 0x30,
N32_ALU2_SMXDS,
N32_ALU2_SMDRS,
N32_ALU2_MADDR32,
N32_ALU2_KMADRS,
N32_ALU2_MSUBR32,
N32_ALU2_KMADS,
N32_ALU2_KMAXDS,
/* bit[0:5], where bit[6:9] = 0010 */
N32_ALU2_KADD16 = 0x0,
N32_ALU2_KSUB16,
N32_ALU2_KCRAS16,
N32_ALU2_KCRSA16,
N32_ALU2_KADD8,
N32_ALU2_KSUB8,
N32_ALU2_WEXT,
N32_ALU2_WEXTI,
N32_ALU2_UKADD16 = 0x8,
N32_ALU2_UKSUB16,
N32_ALU2_UKCRAS16,
N32_ALU2_UKCRSA16,
N32_ALU2_UKADD8,
N32_ALU2_UKSUB8,
N32_ALU2_ONEOP = 0xf,
N32_ALU2_SMBB = 0x10,
N32_ALU2_SMBT,
N32_ALU2_SMTT,
N32_ALU2_KMABB = 0x15,
N32_ALU2_KMABT,
N32_ALU2_KMATT,
N32_ALU2_KMDA = 0x18,
N32_ALU2_KMXDA,
N32_ALU2_KMADA,
N32_ALU2_KMAXDA,
N32_ALU2_KMSDA,
N32_ALU2_KMSXDA,
N32_ALU2_RADD16 = 0x20,
N32_ALU2_RSUB16,
N32_ALU2_RCRAS16,
N32_ALU2_RCRSA16,
N32_ALU2_RADD8,
N32_ALU2_RSUB8,
N32_ALU2_RADDW,
N32_ALU2_RSUBW,
N32_ALU2_URADD16 = 0x28,
N32_ALU2_URSUB16,
N32_ALU2_URCRAS16,
N32_ALU2_URCRSA16,
N32_ALU2_URADD8,
N32_ALU2_URSUB8,
N32_ALU2_URADDW,
N32_ALU2_URSUBW,
N32_ALU2_ADD16 = 0x30,
N32_ALU2_SUB16,
N32_ALU2_CRAS16,
N32_ALU2_CRSA16,
N32_ALU2_ADD8,
N32_ALU2_SUB8,
N32_ALU2_BITREV,
N32_ALU2_BITREVI,
N32_ALU2_SMMUL = 0x38,
N32_ALU2_SMMULu,
N32_ALU2_KMMAC,
N32_ALU2_KMMACu,
N32_ALU2_KMMSB,
N32_ALU2_KMMSBu,
N32_ALU2_KWMMUL,
N32_ALU2_KWMMULu,
/* bit[0:5], where bit[6:9] = 0011 */
N32_ALU2_SMMWB = 0x0,
N32_ALU2_SMMWBu,
N32_ALU2_SMMWT,
N32_ALU2_SMMWTu,
N32_ALU2_KMMAWB,
N32_ALU2_KMMAWBu,
N32_ALU2_KMMAWT,
N32_ALU2_KMMAWTu,
N32_ALU2_PKTT16 = 0x8,
N32_ALU2_PKTB16,
N32_ALU2_PKBT16,
N32_ALU2_PKBB16,
N32_ALU2_0x10 = 0x10,
N32_ALU2_SCLIP16,
N32_ALU2_0x12,
N32_ALU2_SMAX16,
N32_ALU2_SMAX8 = 0x17,
N32_ALU2_0x18 = 0x18,
N32_ALU2_UCLIP16,
N32_ALU2_0x1a,
N32_ALU2_UMAX16,
N32_ALU2_UMAX8 = 0x1f,
N32_ALU2_SRA16 = 0x20,
N32_ALU2_SRA16u,
N32_ALU2_SRL16,
N32_ALU2_SRL16u,
N32_ALU2_SLL16,
N32_ALU2_KSLRA16,
N32_ALU2_KSLRA16u,
N32_ALU2_SRAu,
N32_ALU2_SRAI16 = 0x28,
N32_ALU2_SRAI16u,
N32_ALU2_SRLI16,
N32_ALU2_SRLI16u,
N32_ALU2_SLLI16,
N32_ALU2_KSLLI16,
N32_ALU2_KSLLI,
N32_ALU2_SRAIu,
N32_ALU2_CMPEQ16 = 0x30,
N32_ALU2_SCMPLT16,
N32_ALU2_SCMPLE16,
N32_ALU2_SMIN16,
N32_ALU2_CMPEQ8,
N32_ALU2_SCMPLT8,
N32_ALU2_SCMPLE8,
N32_ALU2_SMIN8,
N32_ALU2_0x38,
N32_ALU2_UCMPLT16 = 0x39,
N32_ALU2_UCMPLE16,
N32_ALU2_UMIN16,
N32_ALU2_0x3c,
N32_ALU2_UCMPLT8,
N32_ALU2_UCMPLE8,
N32_ALU2_UMIN8,
/* bit[0:5] */
N32_MEM_LB = 0,
@ -459,7 +615,8 @@ enum n32_opcodes
N32_MISC_MSYNC,
N32_MISC_ISYNC,
N32_MISC_TLBOP,
N32_MISC_0xf,
N32_MISC_SPECL,
N32_MISC_BPICK = 0x10,
/* bit[0:4] */
N32_SIMD_PBSAD = 0,
@ -704,6 +861,7 @@ enum n16_opcodes
#define INSN_ANDI 0x54000000
#define INSN_LDI 0x06000000
#define INSN_SDI 0x16000000
#define INSN_LW 0x38000002
#define INSN_LWI 0x04000000
#define INSN_LWSI 0x24000000
#define INSN_LWIP 0x0c000000

View File

@ -1,3 +1,17 @@
2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
* emultempl/nds32elf.em (hyper_relax): New variable.
(nds32_elf_create_output_section_statements):
the parameters of bfd_elf32_nds32_set_target_option
(PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS,
PARSE_AND_LIST_ARGS_CASES): Add new option --mhyper-relax.
* emultempl/nds32elf.em (nds32_elf_after_open): Updated.
* emultempl/nds32elf.em (tls_desc_trampoline): New variable.
* (nds32_elf_create_output_section_statements): Updated.
* (nds32_elf_after_parse): Disable relaxations when PIC is enable.
* (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS,
PARSE_AND_LIST_ARGS_CASES): Add new option --m[no-]tlsdesc-trampoline.
2018-09-19 Alan Modra <amodra@gmail.com>
PR ld/23648

View File

@ -30,17 +30,10 @@ fragment <<EOF
static int relax_fp_as_gp = 1; /* --mrelax-omit-fp */
static int eliminate_gc_relocs = 0; /* --meliminate-gc-relocs */
static FILE *sym_ld_script = NULL; /* --mgen-symbol-ld-script=<file> */
static int hyper_relax = 1; /* --mhyper-relax */
static int tls_desc_trampoline = 0; /* --m[no]tlsdesc-trampoline. */
/* Disable if linking a dynamically linked executable. */
static int load_store_relax = 1;
static int target_optimize = 0; /* Switch optimization. */
static int relax_status = 0; /* Finished optimization. */
static int relax_round = 0; /* Going optimization. */
static FILE *ex9_export_file = NULL; /* --mexport-ex9=<file> */
static FILE *ex9_import_file = NULL; /* --mimport-ex9=<file> */
static int update_ex9_table = 0; /* --mupdate-ex9. */
static int ex9_limit = 511;
static bfd_boolean ex9_loop_aware = FALSE; /* Ignore ex9 if inside a loop. */
static bfd_boolean ifc_loop_aware = FALSE; /* Ignore ifc if inside a loop. */
/* Save the target options into output bfd to avoid using to many global
variables. Do this after the output has been created, but before
@ -56,42 +49,24 @@ nds32_elf_create_output_section_statements (void)
return;
}
bfd_elf32_nds32_set_target_option (&link_info, relax_fp_as_gp,
bfd_elf32_nds32_set_target_option (&link_info,
relax_fp_as_gp,
eliminate_gc_relocs,
sym_ld_script,
load_store_relax,
target_optimize, relax_status, relax_round,
ex9_export_file, ex9_import_file,
update_ex9_table, ex9_limit,
ex9_loop_aware, ifc_loop_aware);
hyper_relax,
tls_desc_trampoline,
load_store_relax);
}
static void
nds32_elf_after_parse (void)
{
if (bfd_link_relocatable (&link_info))
if (bfd_link_relocatable (&link_info)
|| bfd_link_pic (&link_info))
DISABLE_RELAXATION;
if (!RELAXATION_ENABLED)
{
target_optimize = target_optimize & (!NDS32_RELAX_JUMP_IFC_ON);
target_optimize = target_optimize & (!NDS32_RELAX_EX9_ON);
relax_fp_as_gp = 0;
}
if (ex9_import_file != NULL)
{
ex9_export_file = NULL;
target_optimize = target_optimize & (!NDS32_RELAX_EX9_ON);
}
else
update_ex9_table = 0;
if (bfd_link_pic (&link_info))
{
target_optimize = target_optimize & (!NDS32_RELAX_JUMP_IFC_ON);
target_optimize = target_optimize & (!NDS32_RELAX_EX9_ON);
}
relax_fp_as_gp = 0;
gld${EMULATION_NAME}_after_parse ();
}
@ -124,64 +99,19 @@ nds32_elf_after_open (void)
einfo (_("%F%P: %pB: ABI version of object files mismatched\n"),
abfd);
}
#if defined NDS32_EX9_EXT
/* Append .ex9.itable section in the last input object file. */
if (abfd->link_next == NULL && (target_optimize & NDS32_RELAX_EX9_ON))
{
asection *itable;
struct bfd_link_hash_entry *h;
itable = bfd_make_section_with_flags (abfd, ".ex9.itable",
SEC_CODE | SEC_ALLOC | SEC_LOAD
| SEC_HAS_CONTENTS | SEC_READONLY
| SEC_IN_MEMORY | SEC_KEEP);
if (itable)
{
itable->gc_mark = 1;
itable->alignment_power = 2;
itable->size = 0x1000;
itable->contents = bfd_zalloc (abfd, itable->size);
/* Add a symbol in the head of ex9.itable to objdump clearly. */
h = bfd_link_hash_lookup (link_info.hash, "_EX9_BASE_",
FALSE, FALSE, FALSE);
_bfd_generic_link_add_one_symbol
(&link_info, link_info.output_bfd, "_EX9_BASE_",
BSF_GLOBAL | BSF_WEAK, itable, 0, (const char *) NULL, FALSE,
get_elf_backend_data (link_info.output_bfd)->collect, &h);
}
}
#endif
}
/* Check object files if the target is dynamic linked executable
or shared object. */
if (elf_hash_table (&link_info)->dynamic_sections_created
|| bfd_link_pic (&link_info))
|| bfd_link_pic (&link_info)
|| bfd_link_pie (&link_info))
{
for (abfd = link_info.input_bfds; abfd != NULL; abfd = abfd->link.next)
{
if (!(elf_elfheader (abfd)->e_flags & E_NDS32_HAS_PIC))
{
/* Non-PIC object file is used. */
if (bfd_link_pic (&link_info))
{
/* For PIE or shared object, all input must be PIC. */
einfo (_("%P: %pB: must use -fpic to compile this file "
"for shared object or PIE\n"), abfd);
}
else
{
/* Dynamic linked executable with SDA and non-PIC.
Turn off load/store relaxtion. */
/* TODO: This may support in the future. */
load_store_relax = 0 ;
relax_fp_as_gp = 0;
}
}
}
/* Turn off relax when building shared object or PIE
until we can support their relaxation. */
/* Dynamic linked executable with SDA and non-PIC.
Turn off load/store relaxtion. */
/* This may support in the future. */
load_store_relax = 0 ;
relax_fp_as_gp = 0;
}
/* Call the standard elf routine. */
@ -210,31 +140,17 @@ PARSE_AND_LIST_PROLOGUE='
#define OPTION_REDUCE_FP_UPDATE (OPTION_BASELINE + 4)
#define OPTION_NO_REDUCE_FP_UPDATE (OPTION_BASELINE + 5)
#define OPTION_EXPORT_SYMBOLS (OPTION_BASELINE + 6)
/* These are only available to ex9. */
#if defined NDS32_EX9_EXT
#define OPTION_EX9_BASELINE 320
#define OPTION_EX9_TABLE (OPTION_EX9_BASELINE + 1)
#define OPTION_NO_EX9_TABLE (OPTION_EX9_BASELINE + 2)
#define OPTION_EXPORT_EX9 (OPTION_EX9_BASELINE + 3)
#define OPTION_IMPORT_EX9 (OPTION_EX9_BASELINE + 4)
#define OPTION_UPDATE_EX9 (OPTION_EX9_BASELINE + 5)
#define OPTION_EX9_LIMIT (OPTION_EX9_BASELINE + 6)
#define OPTION_EX9_LOOP (OPTION_EX9_BASELINE + 7)
#endif
/* These are only available to link-time ifc. */
#if defined NDS32_IFC_EXT
#define OPTION_IFC_BASELINE 340
#define OPTION_JUMP_IFC (OPTION_IFC_BASELINE + 1)
#define OPTION_NO_JUMP_IFC (OPTION_IFC_BASELINE + 2)
#define OPTION_IFC_LOOP (OPTION_IFC_BASELINE + 3)
#endif
#define OPTION_HYPER_RELAX (OPTION_BASELINE + 7)
#define OPTION_TLSDESC_TRAMPOLINE (OPTION_BASELINE + 8)
#define OPTION_NO_TLSDESC_TRAMPOLINE (OPTION_BASELINE + 9)
'
PARSE_AND_LIST_LONGOPTS='
{ "mfp-as-gp", no_argument, NULL, OPTION_FP_AS_GP},
{ "mno-fp-as-gp", no_argument, NULL, OPTION_NO_FP_AS_GP},
{ "mexport-symbols", required_argument, NULL, OPTION_EXPORT_SYMBOLS},
{ "mhyper-relax", required_argument, NULL, OPTION_HYPER_RELAX},
{ "mtlsdesc-trampoline", no_argument, NULL, OPTION_TLSDESC_TRAMPOLINE},
{ "mno-tlsdesc-trampoline", no_argument, NULL, OPTION_NO_TLSDESC_TRAMPOLINE},
/* These are deprecated options. Remove them in the future. */
{ "mrelax-reduce-fp-update", no_argument, NULL, OPTION_REDUCE_FP_UPDATE},
{ "mrelax-no-reduce-fp-update", no_argument, NULL, OPTION_NO_REDUCE_FP_UPDATE},
@ -243,50 +159,16 @@ PARSE_AND_LIST_LONGOPTS='
{ "mrelax-omit-fp", no_argument, NULL, OPTION_FP_AS_GP},
{ "mrelax-no-omit-fp", no_argument, NULL, OPTION_NO_FP_AS_GP},
{ "mgen-symbol-ld-script", required_argument, NULL, OPTION_EXPORT_SYMBOLS},
/* These are specific optioins for ex9-ext support. */
#if defined NDS32_EX9_EXT
{ "mex9", no_argument, NULL, OPTION_EX9_TABLE},
{ "mno-ex9", no_argument, NULL, OPTION_NO_EX9_TABLE},
{ "mexport-ex9", required_argument, NULL, OPTION_EXPORT_EX9},
{ "mimport-ex9", required_argument, NULL, OPTION_IMPORT_EX9},
{ "mupdate-ex9", no_argument, NULL, OPTION_UPDATE_EX9},
{ "mex9-limit", required_argument, NULL, OPTION_EX9_LIMIT},
{ "mex9-loop-aware", no_argument, NULL, OPTION_EX9_LOOP},
#endif
/* These are specific optioins for ifc-ext support. */
#if defined NDS32_IFC_EXT
{ "mifc", no_argument, NULL, OPTION_JUMP_IFC},
{ "mno-ifc", no_argument, NULL, OPTION_NO_JUMP_IFC},
{ "mifc-loop-aware", no_argument, NULL, OPTION_IFC_LOOP},
#endif
'
PARSE_AND_LIST_OPTIONS='
fprintf (file, _("\
--m[no-]fp-as-gp Disable/enable fp-as-gp relaxation\n"));
fprintf (file, _("\
--mexport-symbols=FILE Exporting symbols in linker script\n"));
#if defined NDS32_EX9_EXT
fprintf (file, _("\
--m[no-]ex9 Disable/enable link-time EX9 relaxation\n"));
--mhyper-relax=level Adjust relax level (low|medium|high). default: medium\n"));
fprintf (file, _("\
--mexport-ex9=FILE Export EX9 table after linking\n"));
fprintf (file, _("\
--mimport-ex9=FILE Import Ex9 table for EX9 relaxation\n"));
fprintf (file, _("\
--mupdate-ex9 Update existing EX9 table\n"));
fprintf (file, _("\
--mex9-limit=NUM Maximum number of entries in ex9 table\n"));
fprintf (file, _("\
--mex9-loop-aware Avoid generate EX9 instruction inside loop\n"));
#endif
#if defined NDS32_IFC_EXT
fprintf (file, _("\
--m[no-]ifc Disable/enable link-time IFC optimization\n"));
fprintf (file, _("\
--mifc-loop-aware Avoid generate IFC instruction inside loop\n"));
#endif
--m[no-]tlsdesc-trampoline Disable/enable TLS DESC trampoline\n"));
'
PARSE_AND_LIST_ARGS_CASES='
case OPTION_BASELINE:
@ -316,62 +198,26 @@ PARSE_AND_LIST_ARGS_CASES='
einfo (_("%F%P: cannot open map file %s: %E\n"), optarg);
}
break;
#if defined NDS32_EX9_EXT
case OPTION_EX9_TABLE:
target_optimize = target_optimize | NDS32_RELAX_EX9_ON;
break;
case OPTION_NO_EX9_TABLE:
target_optimize = target_optimize & (!NDS32_RELAX_EX9_ON);
break;
case OPTION_EXPORT_EX9:
case OPTION_HYPER_RELAX:
if (!optarg)
einfo (_("%P: missing file for --mexport-ex9=<file>\n"));
einfo (_("%P: valid arguments to --mhyper-relax=(low|medium|high)\n"));
if(strcmp (optarg, "-") == 0)
ex9_export_file = stdout;
if (strcmp (optarg, "low") == 0)
hyper_relax = 0;
else if (strcmp (optarg, "medium") == 0)
hyper_relax = 1;
else if (strcmp (optarg, "high") == 0)
hyper_relax = 2;
else
{
ex9_export_file = fopen (optarg, "wb");
if(ex9_export_file == NULL)
einfo (_("%F%P: cannot open ex9 export file %s\n"), optarg);
}
break;
case OPTION_IMPORT_EX9:
if (!optarg)
einfo (_("%P: missing file for --mimport-ex9=<file>\n"));
einfo (_("%P: valid arguments to --mhyper-relax=(low|medium|high)\n"));
ex9_import_file = fopen (optarg, "rb+");
if(ex9_import_file == NULL)
einfo (_("%F%P: cannot open ex9 import file %s\n"), optarg);
break;
case OPTION_UPDATE_EX9:
update_ex9_table = 1;
case OPTION_TLSDESC_TRAMPOLINE:
tls_desc_trampoline = 1;
break;
case OPTION_EX9_LIMIT:
if (optarg)
{
ex9_limit = atoi (optarg);
if (ex9_limit > 511 || ex9_limit < 1)
einfo (_("%F%P: the range of ex9_limit must between 1 and 511\n"));
}
break;
case OPTION_EX9_LOOP:
target_optimize = target_optimize | NDS32_RELAX_EX9_ON;
ex9_loop_aware = 1;
break;
#endif
#if defined NDS32_IFC_EXT
case OPTION_JUMP_IFC:
target_optimize = target_optimize | NDS32_RELAX_JUMP_IFC_ON;
break;
case OPTION_NO_JUMP_IFC:
target_optimize = target_optimize & (!NDS32_RELAX_JUMP_IFC_ON);
break;
case OPTION_IFC_LOOP:
target_optimize = target_optimize | NDS32_RELAX_JUMP_IFC_ON;
ifc_loop_aware = 1;
break;
#endif
case OPTION_NO_TLSDESC_TRAMPOLINE:
tls_desc_trampoline = 0;
break;
'
LDEMUL_AFTER_OPEN=nds32_elf_after_open
LDEMUL_AFTER_PARSE=nds32_elf_after_parse

View File

@ -3,9 +3,10 @@
#readelf: -Sg --wide
#...
group section \[[ 0-9]+\] `\.group' \[foo_group\] contains 4 sections:
group section \[[ 0-9]+\] `\.group' \[foo_group\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] \.text.*
#...
\[[ 0-9]+\] \.rodata\.str.*
\[[ 0-9]+\] \.data.*
\[[ 0-9]+\] \.keepme.*

View File

@ -13,8 +13,9 @@
#...
\[[ 0-9]+\] \.data.*[ \t]+PROGBITS[ \t0-9a-f]+WAG.*
#...
COMDAT group section \[[ 0-9]+\] `\.group' \[foo_group\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `\.group' \[foo_group\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.*
#...
\[[ 0-9]+\] .data.*
#pass

View File

@ -13,8 +13,9 @@
#...
\[[ 0-9]+\] \.data.*[ \t]+PROGBITS[ \t0-9a-f]+WAG[ \t]+.*
#...
COMDAT group section \[[ 0-9]+\] `.group' \[.text.foo\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[.text.foo\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.*
#...
\[[ 0-9]+\] .data.*
#pass

View File

@ -13,8 +13,9 @@
#...
\[[ 0-9]+\] \.data.*[ \t]+PROGBITS[ \t0-9a-f]+WAG[ \t]+.*
#...
COMDAT group section \[[ 0-9]+\] `.group' \[foo3\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[foo3\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.*
#...
\[[ 0-9]+\] .data.*
#pass

View File

@ -13,8 +13,9 @@
#...
\[[ 0-9]+\] \.data.*[ \t]+PROGBITS[ \t0-9a-f]+WAG[ \t]+.*
#...
COMDAT group section \[[ 0-9]+\] `.group' \[foo4\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[foo4\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.*
#...
\[[ 0-9]+\] .data.*
#pass

View File

@ -9,23 +9,27 @@
# well with unique group sections under ld -r.
#...
COMDAT group section \[[ 0-9]+\] `\.group' \[foo_group\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `\.group' \[foo_group\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.foo
#...
\[[ 0-9]+\] .data.foo
#...
COMDAT group section \[[ 0-9]+\] `.group' \[.text.foo\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[.text.foo\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.foo
#...
\[[ 0-9]+\] .data.bar
#...
COMDAT group section \[[ 0-9]+\] `.group' \[foo3\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[foo3\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.foo3
#...
\[[ 0-9]+\] .data.bar3
#...
COMDAT group section \[[ 0-9]+\] `.group' \[foo4\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[foo4\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.foo4
#...
\[[ 0-9]+\] .data.foo4
#pass

View File

@ -7,6 +7,7 @@
# cr16 and crx use non-standard scripts with memory regions, which don't play
# well with unique group sections under ld -r.
COMDAT group section \[[ 0-9]+\] `.group' \[foo\] contains 1 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[foo\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.foo
#pass

View File

@ -7,6 +7,7 @@
# cr16 and crx use non-standard scripts with memory regions, which don't play
# well with unique group sections under ld -r.
COMDAT group section \[[ 0-9]+\] `.group' \[bar\] contains 1 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[bar\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.bar
#pass

View File

@ -7,7 +7,9 @@
# cr16 and crx use non-standard scripts with memory regions, which don't play
# well with unique group sections under ld -r.
COMDAT group section \[[ 0-9]+\] `.group' \[foo\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[foo\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] .text.foo
#...
\[[ 0-9]+\] .data.foo
#pass

View File

@ -7,12 +7,15 @@
# cr16 and crx use non-standard scripts with memory regions, which don't play
# well with unique group sections under ld -r.
COMDAT group section \[[ 0-9]+\] `.group' \[foo\] contains 2 sections:
COMDAT group section \[[ 0-9]+\] `.group' \[foo\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] \.text\.foo
#...
\[[ 0-9]+\] \.data\.foo
COMDAT group section \[[ 0-9]+\] `.group' \[bar\] contains 2 sections:
#...
COMDAT group section \[[ 0-9]+\] `.group' \[bar\] contains . sections:
\[Index\] Name
\[[ 0-9]+\] \.text\.bar
#...
\[[ 0-9]+\] \.rela?\.text\.bar
#pass

View File

@ -6,7 +6,7 @@
# generic elf targets don't emit relocs
.*: file format .*
#...
RELOCATION RECORDS FOR \[.debug_frame\]:
OFFSET[ ]+TYPE[ ]+VALUE[ ]*
.*(NONE|unused|UNUSED).*\*ABS\*

View File

@ -4,7 +4,7 @@
#xfail: bfin-*-* cr16-*-* cris*-*-* crx-*-* csky-*-* d10v-*-* d30v-*-* dlx-*-*
#xfail: fr30-*-* frv-*-* ft32-*-* h8300-*-* hppa*64*-*-* ip2k-*-* iq2000-*-*
#xfail: lm32-*-* m68hc11-*-* mcore-*-* mep-*-* metag-*-* mn102*-*-* ms1-*-*
#xfail: nios2-*-* or32-*-* pj-*-* pru-*-* s12z-*-* score-*-* tic6x-*-*
#xfail: nds32*-*-* nios2-*-* or32-*-* pj-*-* pru-*-* s12z-*-* score-*-* tic6x-*-*
#xfail: vax-*-* xgate-*-* xstormy16-*-* xtensa*-*-*
.*: file format .*elf.*

View File

@ -6,5 +6,6 @@
#...
\[[ 0-9]+\] \.text.*[ \t]+PROGBITS[ \t]+0+800000[ \t0-9a-f]+AX.*
#...
\[[ 0-9]+\] \.data.*[ \t]+PROGBITS[ \t]+0+900000[ \t0-9a-f]+WA.*
#pass

View File

@ -59,7 +59,7 @@ proc test_sort_common {} {
}
if { ![ld_link $ld tmpdir/sort-common.dx "--sort-common=descending tmpdir/sort-common.o"] } {
fail "$test"
fail "$test (could not link)"
return 0
}
@ -73,7 +73,7 @@ proc test_sort_common {} {
# section and large commons in a .bss section.
if { ![regexp ".*var_16.*var_8.*var_4.*var_2.*var_1.*" $exec_output]
&& ![regexp ".*sbss.*var_8.*var_4.*var_2.*var_1.*bss.*var_16.*" $exec_output] } {
fail $test
fail "$test (variables in wrong order)"
} else {
pass $test
}
@ -83,7 +83,7 @@ proc test_sort_common {} {
verbose "Check to see that --sort-common=ascending sorts in ascending alignment"
if { ![ld_link $ld tmpdir/sort-common.ax "--sort-common=ascending tmpdir/sort-common.o"] } {
fail "$test"
fail "$test (could not link)"
return 0
}
@ -91,7 +91,7 @@ proc test_sort_common {} {
set exec_output [run_host_cmd "$objdump" "--syms tmpdir/sort-common.ax | grep var | sort"]
if {![regexp ".*var_1.*var_2.*var_4.*var_8.*var_16.*" $exec_output]} {
fail $test
fail "$test (variables in wrong order)"
return 0
}

View File

@ -6,19 +6,15 @@
Disassembly of section .text:
0+0000 <[^>]*> beq \$r0, \$r1, 0000002c <main>
0+0004 <[^>]*> bne \$r0, \$r1, 0000002c <main>
0+0008 <[^>]*> bnez38 \$r0, 0000002c <main>
0+000a <[^>]*> beqz38 \$r0, 0000002c <main>
0+000c <[^>]*> bgez \$r0, 0000002c <main>
0+0000 <[^>]*> beq[ ]+\$r0, \$r1, 00000024 <main>
0+0004 <[^>]*> bne[ ]+\$r0, \$r1, 00000024 <main>
0+0008 <[^>]*> beqz38[ ]+\$r0, 00000024 <main>
0+000a <[^>]*> bnez38[ ]+\$r0, 00000024 <main>
0+000c <[^>]*> bgez[ ]+\$r0, 00000024 <main>
.*
0+0012 <[^>]*> bgezal \$r0, 0000002c <main>
0+0016 <[^>]*> bgtz \$r0, 0000002c <main>
0+0014 <[^>]*> bgtz[ ]+\$r0, 00000024 <main>
.*
0+001c <[^>]*> blez \$r0, 0000002c <main>
0+001c <[^>]*> bltz[ ]+\$r0, 00000024 <main>
.*
0+0022 <[^>]*> bltz \$r0, 0000002c <main>
0+0026 <[^>]*> srli45 \$r0, 0
0+0028 <[^>]*> bltzal \$r0, 0000002c <main>
0+002c <main>.*
0+0024 <[^>]*> nop16
#pass

View File

@ -6,13 +6,13 @@
Disassembly of section .text:
0+0000 <[^>]*> addi.gp \$r0, 8192
0+0004 <[^>]*> lbi.gp \$r0, \[\+ 8192\]
0+0008 <[^>]*> lbsi.gp \$r0, \[\+ 8192\]
0+000c <[^>]*> lhi.gp \$r0, \[\+ 8192\]
0+0010 <[^>]*> lhsi.gp \$r0, \[\+ 8192\]
0+0014 <[^>]*> lwi.gp \$r0, \[\+ 8192\]
0+0018 <[^>]*> sbi.gp \$r0, \[\+ 8192\]
0+001c <[^>]*> shi.gp \$r0, \[\+ 8192\]
0+0020 <[^>]*> swi.gp \$r0, \[\+ 8192\]
0+0000 <[^>]*> addi.gp \$r0, .*
0+0004 <[^>]*> lbi.gp \$r0, \[.*\]
0+0008 <[^>]*> lbsi.gp \$r0, \[.*\]
0+000c <[^>]*> lhi.gp \$r0, \[.*\]
0+0010 <[^>]*> lhsi.gp \$r0, \[.*\]
0+0014 <[^>]*> lwi.gp \$r0, \[.*\]
0+0018 <[^>]*> sbi.gp \$r0, \[.*\]
0+001c <[^>]*> shi.gp \$r0, \[.*\]
0+0020 <[^>]*> swi.gp \$r0, \[.*\]

View File

@ -8,8 +8,8 @@
Disassembly of section .text:
0+1000 <[^>]*> sethi \$r0, 0x11223
0+1004 <[^>]*> ori \$r0, \$r0, 836
0+1008 <[^>]*> movi \$r0, 70179
0+100c <[^>]*> movi55 \$r0, 15
0+1000 <[^>]*> sethi \$r0, #0x11223
0+1004 <[^>]*> ori \$r0, \$r0, #0x344
0+1008 <[^>]*> movi \$r0, #0x11223
0+100c <[^>]*> movi55[ ]+\$r0, #0xf

View File

@ -6,7 +6,7 @@
Disassembly of section .text:
0+0000 <[^>]*> j8 00000006 <main>
0+0002 <[^>]*> jal 00000006 <main>
0+0006 <[^>]*> srli45 \$r0, 0
0+0000 <[^>]*> j 00000008 <main>
0+0004 <[^>]*> jal 00000008 <main>
0+0008 <[^>]*> nop16

View File

@ -6,7 +6,7 @@
Disassembly of section .text:
0+0000 <[^>]*> lwi.gp \$r0, \[\+ 0\]
0+0004 <[^>]*> lhi.gp \$r0, \[\+ 4\]
0+0008 <[^>]*> lbi.gp \$r0, \[\+ 6\]
0+0000 <[^>]*> lwi.gp \$r0, \[ \+ #0\]
0+0004 <[^>]*> lhi.gp \$r0, \[ \+ #4\]
0+0008 <[^>]*> lbi.gp \$r0, \[ \+ #6\]

View File

@ -1,3 +1,43 @@
2018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
* nds32-asm.c (operand_fields): Remove the unused fields.
(nds32_opcodes): Remove the unused instructions.
* nds32-dis.c (nds32_ex9_info): Removed.
(nds32_parse_opcode): Updated.
(print_insn_nds32): Likewise.
* nds32-asm.c (config.h, stdlib.h, string.h): New includes.
(LEX_SET_FIELD, LEX_GET_FIELD): Update defines.
(nds32_asm_init, build_operand_hash_table, build_keyword_hash_table,
build_opcode_hash_table): New functions.
(nds32_keyword_table, nds32_keyword_count_table, nds32_field_table,
nds32_opcode_table): New.
(hw_ktabs): Declare it to a pointer rather than an array.
(build_hash_table): Removed.
* nds32-asm.h (enum): Add SYN_INPUT, SYN_OUTPUT, SYN_LOPT,
SYN_ROPT and upadte HW_GPR and HW_INT.
* nds32-dis.c (keywords): Remove const.
(match_field): New function.
(nds32_parse_opcode): Updated.
* disassemble.c (disassemble_init_for_target):
Add disassemble_init_nds32.
* nds32-dis.c (eum map_type): New.
(nds32_private_data): Likewise.
(get_mapping_symbol_type, is_mapping_symbol, nds32_symbol_is_valid,
nds32_add_opcode_hash_table, disassemble_init_nds32): New functions.
(print_insn_nds32): Updated.
* nds32-asm.c (parse_aext_reg): Add new parameter.
(parse_re, parse_re2, parse_aext_reg): Only reduced registers
are allowed to use.
All callers changed.
* nds32-asm.c (keyword_usr, keyword_sr): Updated.
(operand_fields): Add new fields.
(nds32_opcodes): Add new instructions.
(keyword_aridxi_mx): New keyword.
* nds32-asm.h (enum): Add NASM_ATTR_DSP_ISAEXT, HW_AEXT_ARIDXI_MX
and NASM_ATTR_ZOL.
(ALU2_1, ALU2_2, ALU2_3): New macros.
* nds32-dis.c (nds32_filter_unknown_insn): Updated.
2018-09-17 Kito Cheng <kito@andestech.com>
* riscv-opc.c (riscv_opcodes): Adjust the order of ble and bleu.

View File

@ -666,6 +666,11 @@ disassemble_init_for_target (struct disassemble_info * info)
disassemble_init_s390 (info);
break;
#endif
#ifdef ARCH_nds32
case bfd_arch_nds32:
disassemble_init_nds32 (info);
break;
#endif
default:
break;
}

File diff suppressed because it is too large Load Diff

View File

@ -77,6 +77,8 @@ enum
NASM_ATTR_SATURATION_EXT = 0x0400000,
NASM_ATTR_PCREL = 0x0800000,
NASM_ATTR_GPREL = 0x1000000,
NASM_ATTR_DSP_ISAEXT = 0x2000000,
NASM_ATTR_ZOL = (1 << 26),
/* Attributes for relocations. */
NASM_ATTR_HI20 = 0x10000000,
@ -87,19 +89,22 @@ enum
NASM_ATTR_RDREG = 0x000100
};
/* We only support one core for now. */
#define NDS32_CORE_COUNT 1
#define NDS32_MAIN_CORE 0
enum
{
/* This is a field (operand) of just a separator char. */
SYN_FIELD = 0x100,
/* This operand is used for input or output. (define or use) */
SYN_INPUT = 0x1000,
SYN_OUTPUT = 0x2000,
SYN_LOPT = 0x4000,
SYN_ROPT = 0x8000,
SYN_INPUT = 0x10000,
SYN_OUTPUT = 0x20000,
SYN_LOPT = 0x40000,
SYN_ROPT = 0x80000,
/* Hardware resources. */
HW_GPR = 0,
/* Hardware resources:
Current set up allows up to 256 resources for each class
defined above. */
HW_GPR = NDS32_MAIN_CORE << 8,
HW_USR,
HW_DXR,
HW_SR,
@ -128,10 +133,9 @@ enum
HW_AEXT_ARIDX,
HW_AEXT_ARIDX2,
HW_AEXT_ARIDXI,
HW_AEXT_ARIDXI_MX,
_HW_LAST,
/* TODO: Maybe we should add a new type to distinguish address and
const int. Only the former allows symbols and relocations. */
HW_INT,
HW_INT = 0x1000,
HW_UINT
};
@ -277,6 +281,9 @@ extern void nds32_asm_init (nds32_asm_desc_t *, int);
#define SIMD(sub) (OP6 (SIMD) | N32_SIMD_ ## sub)
#define ALU1(sub) (OP6 (ALU1) | N32_ALU1_ ## sub)
#define ALU2(sub) (OP6 (ALU2) | N32_ALU2_ ## sub)
#define ALU2_1(sub) (OP6 (ALU2) | N32_BIT (6) | N32_ALU2_ ## sub)
#define ALU2_2(sub) (OP6 (ALU2) | N32_BIT (7) | N32_ALU2_ ## sub)
#define ALU2_3(sub) (OP6 (ALU2) | N32_BIT (6) | N32_BIT (7) | N32_ALU2_ ## sub)
#define MISC(sub) (OP6 (MISC) | N32_MISC_ ## sub)
#define MEM(sub) (OP6 (MEM) | N32_MEM_ ## sub)
#define FPU_RA_IMMBI(sub) (OP6 (sub) | N32_BIT (12))

View File

@ -35,16 +35,42 @@
/* Get fields macro define. */
#define MASK_OP(insn, mask) ((insn) & (0x3f << 25 | (mask)))
/* For mapping symbol. */
enum map_type
{
MAP_DATA0,
MAP_DATA1,
MAP_DATA2,
MAP_DATA3,
MAP_DATA4,
MAP_CODE,
};
struct nds32_private_data
{
/* Whether any mapping symbols are present in the provided symbol
table. -1 if we do not know yet, otherwise 0 or 1. */
int has_mapping_symbols;
/* Track the last type (although this doesn't seem to be useful). */
enum map_type last_mapping_type;
/* Tracking symbol table information. */
int last_symbol_index;
bfd_vma last_addr;
};
/* Default text to print if an instruction isn't recognized. */
#define UNKNOWN_INSN_MSG _("*unknown*")
#define NDS32_PARSE_INSN16 0x01
#define NDS32_PARSE_INSN32 0x02
#define NDS32_PARSE_EX9IT 0x04
#define NDS32_PARSE_EX9TAB 0x08
extern const field_t *nds32_field_table[NDS32_CORE_COUNT];
extern opcode_t *nds32_opcode_table[NDS32_CORE_COUNT];
extern keyword_t **nds32_keyword_table[NDS32_CORE_COUNT];
extern struct nds32_opcode nds32_opcodes[];
extern const field_t operand_fields[];
extern const keyword_t *keywords[];
extern keyword_t *keywords[];
extern const keyword_t keyword_gpr[];
static void print_insn16 (bfd_vma pc, disassemble_info *info,
uint32_t insn, uint32_t parse_mode);
@ -52,6 +78,10 @@ static void print_insn32 (bfd_vma pc, disassemble_info *info, uint32_t insn,
uint32_t parse_mode);
static uint32_t nds32_mask_opcode (uint32_t);
static void nds32_special_opcode (uint32_t, struct nds32_opcode **);
static int get_mapping_symbol_type (struct disassemble_info *, int,
enum map_type *);
static int is_mapping_symbol (struct disassemble_info *, int,
enum map_type *);
/* define in objdump.c. */
struct objdump_disasm_info
@ -65,62 +95,10 @@ struct objdump_disasm_info
arelent * reloc;
};
/* file_ptr ex9_filepos=NULL;. */
bfd_byte *ex9_data = NULL;
int ex9_ready = 0, ex9_base_offset = 0;
/* Hash function for disassemble. */
static htab_t opcode_htab;
static void
nds32_ex9_info (bfd_vma pc ATTRIBUTE_UNUSED,
disassemble_info *info, uint32_t ex9_index)
{
uint32_t insn;
static asymbol *itb = NULL;
bfd_byte buffer[4];
long unsigned int isec_vma;
/* Lookup itb symbol. */
if (!itb)
{
int i;
for (i = 0; i < info->symtab_size; i++)
if (bfd_asymbol_name (info->symtab[i])
&& (strcmp (bfd_asymbol_name (info->symtab[i]), "$_ITB_BASE_") == 0
|| strcmp (bfd_asymbol_name (info->symtab[i]),
"_ITB_BASE_") == 0))
{
itb = info->symtab[i];
break;
}
/* Lookup it only once, in case _ITB_BASE_ doesn't exist at all. */
if (itb == NULL)
itb = (void *) -1;
}
if (itb == (void *) -1)
return;
isec_vma = itb->section->vma;
isec_vma = itb->section->vma - bfd_asymbol_value (itb);
if (!itb->section || !itb->section->owner)
return;
bfd_get_section_contents (itb->section->owner, itb->section, buffer,
ex9_index * 4 - isec_vma, 4);
insn = bfd_getb32 (buffer);
/* 16-bit instructions in ex9 table. */
if (insn & 0x80000000)
print_insn16 (pc, info, (insn & 0x0000FFFF),
NDS32_PARSE_INSN16 | NDS32_PARSE_EX9IT);
/* 32-bit instructions in ex9 table. */
else
print_insn32 (pc, info, insn, NDS32_PARSE_INSN32 | NDS32_PARSE_EX9IT);
}
/* Find the value map register name. */
static keyword_t *
@ -221,6 +199,30 @@ nds32_parse_audio_ext (const field_t *pfd,
func (stream, "$%s", psys_reg->name);
}
/* Match instruction opcode with keyword table. */
static field_t *
match_field (char *name)
{
field_t *pfd;
int k;
for (k = 0; k < NDS32_CORE_COUNT; k++)
{
pfd = (field_t *) nds32_field_table[k];
while (1)
{
if (pfd->name == NULL)
break;
if (strcmp (name, pfd->name) == 0)
return pfd;
pfd++;
}
}
return NULL;
}
/* Dump instruction. If the opcode is unknown, return FALSE. */
static void
@ -245,9 +247,6 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
return;
}
if (parse_mode & NDS32_PARSE_EX9IT)
func (stream, " !");
pstr_src = opc->instruction;
if (*pstr_src == 0)
{
@ -294,15 +293,8 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
}
*pstr_tmp = 0;
pfd = (const field_t *) &operand_fields[0];
while (1)
{
if (pfd->name == NULL)
return;
else if (strcmp (&tmp_string[0], pfd->name) == 0)
break;
pfd++;
}
if ((pfd = match_field (&tmp_string[0])) == NULL)
return;
/* For insn-16. */
if (parse_mode & NDS32_PARSE_INSN16)
@ -348,12 +340,11 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
int_value = 0 - (128 - int_value);
func (stream, "#%d", int_value);
}
/* beqz38/bnez38/beqs38/bnes38/j8/beqzs8/bnezs8/ifcall9. */
/* beqz38/bnez38/beqs38/bnes38/j8/beqzs8/bnezs8. */
else if ((opc->value == 0xc000) || (opc->value == 0xc800)
|| (opc->value == 0xd000) || (opc->value == 0xd800)
|| (opc->value == 0xd500) || (opc->value == 0xe800)
|| (opc->value == 0xe900)
|| (opc->value == 0xf800))
|| (opc->value == 0xe900))
{
info->print_address_func (int_value + pc, info);
}
@ -365,12 +356,6 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
func (stream, "~$%s", keyword_gpr[push25gpr].name);
func (stream, ", $fp, $gp, $lp}");
}
/* ex9.it. */
else if ((opc->value == 0xdd40) || (opc->value == 0xea00))
{
func (stream, "#%d", int_value);
nds32_ex9_info (pc, info, int_value);
}
else if (pfd->hw_res == HW_INT)
{
if (int_value < 10)
@ -394,12 +379,13 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
nds32_parse_audio_ext (pfd, info, insn);
}
/* for insn-32. */
else if (pfd->hw_res < _HW_LAST)
else if (pfd->hw_res < HW_INT)
{
int_value =
__GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
psys_reg = (keyword_t*) keywords[pfd->hw_res];
psys_reg = *(nds32_keyword_table[pfd->hw_res >> 8]
+ (pfd->hw_res & 0xff));
psys_reg = nds32_find_reg_keyword (psys_reg, int_value);
/* For HW_SR, dump the index when it can't
@ -444,15 +430,7 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
/* FIXME: Handle relocation. */
if (info->flags & INSN_HAS_RELOC)
pc = 0;
/* Check if insn32 in ex9 table. */
if (parse_mode & NDS32_PARSE_EX9IT)
info->print_address_func ((pc & 0xFE000000) | int_value,
info);
/* Check if decode ex9 table, PC(31,25)|Inst(23,0)<<1. */
else if (parse_mode & NDS32_PARSE_EX9TAB)
func (stream, "PC(31,25)|#0x%x", int_value);
else
info->print_address_func (int_value + pc, info);
info->print_address_func (int_value + pc, info);
}
else if (op == N32_OP6_LSMW)
{
@ -571,7 +549,7 @@ nds32_filter_unknown_insn (uint32_t insn, struct nds32_opcode **opc)
if (__GF (insn, 5, 5) != 0)
*opc = NULL;
break;
case BR2 (IFCALL):
case BR2 (SOP0):
if (__GF (insn, 20, 5) != 0)
*opc = NULL;
break;
@ -765,7 +743,14 @@ nds32_mask_opcode (uint32_t insn)
|| __GF (insn, 0, 7) == (N32_ALU2_MTUSR | N32_BIT (6)))
/* RDOV CLROV */
return MASK_OP (insn, 0xf81ff);
return MASK_OP (insn, 0x1ff);
else if (__GF (insn, 0, 10) == (N32_ALU2_ONEOP | N32_BIT (7)))
{
/* INSB */
if (__GF (insn, 12, 3) == 4)
return MASK_OP (insn, 0x73ff);
return MASK_OP (insn, 0x7fff);
}
return MASK_OP (insn, 0x3ff);
case N32_OP6_ALU1:
case N32_OP6_SIMD:
return MASK_OP (insn, 0x1f);
@ -794,7 +779,10 @@ nds32_mask_opcode (uint32_t insn)
case N32_OP6_BR1:
return MASK_OP (insn, 0x1 << 14);
case N32_OP6_BR2:
return MASK_OP (insn, 0xf << 16);
if (__GF (insn, 16, 4) == 0)
return MASK_OP (insn, 0x1ff << 16);
else
return MASK_OP (insn, 0xf << 16);
case N32_OP6_BR3:
return MASK_OP (insn, 0x1 << 19);
case N32_OP6_MISC:
@ -887,7 +875,8 @@ nds32_mask_opcode (uint32_t insn)
/* AMAWzSSA AMWzSSA */
return MASK_OP (insn, (0x1f << 20) | (0x3 << 7));
else
/* AMAWzSL.L AMAWzSL2.S AMAWzSL2.L AMWzSL.L AMWzSL.L AMWzSL2.S */
/* AMAWzSL.L AMAWzSL2.S AMAWzSL2.L
AMWzSL.L AMWzSL.L AMWzSL2.S */
return MASK_OP (insn, (0x1f << 20) | (0x7 << 6));
case 0x2:
if (__GF (insn, 6, 3) == 2)
@ -897,7 +886,8 @@ nds32_mask_opcode (uint32_t insn)
/* AMAWyySSA AMWyySSA */
return MASK_OP (insn, (0x1f << 20) | (0x3 << 7));
else
/* AMAWyySL.L AMAWyySL2.S AMAWyySL2.L AMWyySL.L AMWyySL.L AMWyySL2.S */
/* AMAWyySL.L AMAWyySL2.S AMAWyySL2.L
AMWyySL.L AMWyySL.L AMWyySL2.S */
return MASK_OP (insn, (0x1f << 20) | (0x7 << 6));
}
return MASK_OP (insn, 0x1f << 20);
@ -968,13 +958,8 @@ nds32_special_opcode (uint32_t insn, struct nds32_opcode **opc)
case JREG (JR) | JREG_RET:
if (__GF (insn, 8, 2) != 0)
string = "tit";
break;
break;
case N32_OP6_COP:
break;
case 0xea00:
/* break16 ex9 */
if (__GF (insn, 5, 4) != 0)
string = "ex9";
break;
case 0x9200:
/* nop16 */
@ -1005,46 +990,187 @@ print_insn_nds32 (bfd_vma pc, disassemble_info *info)
{
int status;
bfd_byte buf[4];
bfd_byte buf_data[16];
long long given;
long long given1;
uint32_t insn;
static int init = 1;
int i = 0;
struct nds32_opcode *opc;
struct nds32_opcode **slot;
int n;
int last_symbol_index = -1;
bfd_vma addr;
int is_data = FALSE;
bfd_boolean found = FALSE;
struct nds32_private_data *private_data;
unsigned int size = 16;
enum map_type mapping_type = MAP_CODE;
if (init)
if (info->private_data == NULL)
{
/* Build opcode table. */
opcode_htab = htab_create_alloc (1024, htab_hash_hash, htab_hash_eq,
NULL, xcalloc, free);
/* Note: remain lifecycle throughout whole execution. */
static struct nds32_private_data private;
private.has_mapping_symbols = -1; /* unknown yet. */
private.last_symbol_index = -1;
private.last_addr = 0;
info->private_data = &private;
}
private_data = info->private_data;
while (nds32_opcodes[i].opcode != NULL)
if (info->symtab_size != 0)
{
int start;
if (pc == 0)
start = 0;
else
{
opc = &nds32_opcodes[i];
slot =
(struct nds32_opcode **) htab_find_slot (opcode_htab, &opc->value,
INSERT);
if (*slot == NULL)
{
/* This is the new one. */
*slot = opc;
}
else
{
/* Already exists. Append to the list. */
opc = *slot;
while (opc->next)
opc = opc->next;
opc->next = &nds32_opcodes[i];
}
i++;
start = info->symtab_pos;
if (start < private_data->last_symbol_index)
start = private_data->last_symbol_index;
}
init = 0;
if (0 > start)
start = 0;
if (private_data->has_mapping_symbols != 0
&& ((strncmp (".text", info->section->name, 5) == 0)))
{
for (n = start; n < info->symtab_size; n++)
{
addr = bfd_asymbol_value (info->symtab[n]);
if (addr > pc)
break;
if (get_mapping_symbol_type (info, n, &mapping_type))
{
last_symbol_index = n;
found = TRUE;
}
}
if (found)
private_data->has_mapping_symbols = 1;
else if (!found && private_data->has_mapping_symbols == -1)
{
/* Make sure there are no any mapping symbol. */
for (n = 0; n < info->symtab_size; n++)
{
if (is_mapping_symbol (info, n, &mapping_type))
{
private_data->has_mapping_symbols = -1;
break;
}
}
if (private_data->has_mapping_symbols == -1)
private_data->has_mapping_symbols = 0;
}
private_data->last_symbol_index = last_symbol_index;
private_data->last_mapping_type = mapping_type;
is_data = (private_data->last_mapping_type == MAP_DATA0
|| private_data->last_mapping_type == MAP_DATA1
|| private_data->last_mapping_type == MAP_DATA2
|| private_data->last_mapping_type == MAP_DATA3
|| private_data->last_mapping_type == MAP_DATA4);
}
}
/* Wonder data or instruction. */
if (is_data)
{
unsigned int i1;
/* Fix corner case: there is no next mapping symbol,
let mapping type decides size */
if (last_symbol_index + 1 >= info->symtab_size)
{
if (mapping_type == MAP_DATA0)
size = 1;
if (mapping_type == MAP_DATA1)
size = 2;
if (mapping_type == MAP_DATA2)
size = 4;
if (mapping_type == MAP_DATA3)
size = 8;
if (mapping_type == MAP_DATA4)
size = 16;
}
for (n = last_symbol_index + 1; n < info->symtab_size; n++)
{
addr = bfd_asymbol_value (info->symtab[n]);
enum map_type fake_mapping_type;
if (get_mapping_symbol_type (info, n, &fake_mapping_type)
&& (addr > pc
&& ((info->section == NULL)
|| (info->section == info->symtab[n]->section)))
&& (addr - pc < size))
{
size = addr - pc;
break;
}
}
if (size == 3)
size = (pc & 1) ? 1 : 2;
/* Read bytes from BFD. */
info->read_memory_func (pc, (bfd_byte *) buf_data, size, info);
given = 0;
given1 = 0;
/* Start assembling data. */
/* Little endian of data. */
if (info->endian == BFD_ENDIAN_LITTLE)
{
for (i1 = size - 1;; i1--)
{
if (i1 >= 8)
given1 = buf_data[i1] | (given1 << 8);
else
given = buf_data[i1] | (given << 8);
if (i1 == 0)
break;
}
}
else
{
/* Big endian of data. */
for (i1 = 0; i1 < size; i1++)
{
if (i1 <= 7)
given = buf_data[i1] | (given << 8);
else
given1 = buf_data[i1] | (given1 << 8);
}
}
info->bytes_per_line = 4;
if (size == 16)
info->fprintf_func (info->stream, ".qword\t0x%016llx%016llx",
given, given1);
else if (size == 8)
info->fprintf_func (info->stream, ".dword\t0x%016llx", given);
else if (size == 4)
info->fprintf_func (info->stream, ".word\t0x%08llx", given);
else if (size == 2)
{
/* short */
if (mapping_type == MAP_DATA0)
info->fprintf_func (info->stream, ".byte\t0x%02llx", given & 0xFF);
else
info->fprintf_func (info->stream, ".short\t0x%04llx", given);
}
else
{
/* byte */
info->fprintf_func (info->stream, ".byte\t0x%02llx", given);
}
return size;
}
status = info->read_memory_func (pc, (bfd_byte *) buf, 4, info);
if (status)
{
/* for the last 16-bit instruction. */
/* For the last 16-bit instruction. */
status = info->read_memory_func (pc, (bfd_byte *) buf, 2, info);
if (status)
{
@ -1057,12 +1183,6 @@ print_insn_nds32 (bfd_vma pc, disassemble_info *info)
/* 16-bit instruction. */
if (insn & 0x80000000)
{
if (info->section && strstr (info->section->name, ".ex9.itable") != NULL)
{
print_insn16 (pc, info, (insn & 0x0000FFFF),
NDS32_PARSE_INSN16 | NDS32_PARSE_EX9TAB);
return 4;
}
print_insn16 (pc, info, (insn >> 16), NDS32_PARSE_INSN16);
return 2;
}
@ -1070,11 +1190,149 @@ print_insn_nds32 (bfd_vma pc, disassemble_info *info)
/* 32-bit instructions. */
else
{
if (info->section
&& strstr (info->section->name, ".ex9.itable") != NULL)
print_insn32 (pc, info, insn, NDS32_PARSE_INSN32 | NDS32_PARSE_EX9TAB);
else
print_insn32 (pc, info, insn, NDS32_PARSE_INSN32);
print_insn32 (pc, info, insn, NDS32_PARSE_INSN32);
return 4;
}
}
/* Ignore disassembling unnecessary name. */
static bfd_boolean
nds32_symbol_is_valid (asymbol *sym,
struct disassemble_info *info ATTRIBUTE_UNUSED)
{
const char *name;
if (sym == NULL)
return FALSE;
name = bfd_asymbol_name (sym);
/* Mapping symbol is invalid. */
if (name[0] == '$')
return FALSE;
return TRUE;
}
static void
nds32_add_opcode_hash_table (unsigned indx)
{
opcode_t *opc;
opc = nds32_opcode_table[indx];
if (opc == NULL)
return;
while (opc->opcode != NULL)
{
opcode_t **slot;
slot = (opcode_t **) htab_find_slot
(opcode_htab, &opc->value, INSERT);
if (*slot == NULL)
{
/* This is the new one. */
*slot = opc;
}
else
{
opcode_t *tmp;
/* Already exists. Append to the list. */
tmp = *slot;
while (tmp->next)
tmp = tmp->next;
tmp->next = opc;
opc->next = NULL;
}
opc++;
}
}
void
disassemble_init_nds32 (struct disassemble_info *info)
{
static unsigned init_done = 0;
unsigned k;
/* Set up symbol checking function. */
info->symbol_is_valid = nds32_symbol_is_valid;
/* Only need to initialize once:
High level will call this function for every object file.
For example, when disassemble all members of a library. */
if (init_done)
return;
/* Setup main core. */
nds32_keyword_table[NDS32_MAIN_CORE] = &keywords[0];
nds32_opcode_table[NDS32_MAIN_CORE] = &nds32_opcodes[0];
nds32_field_table[NDS32_MAIN_CORE] = &operand_fields[0];
/* Build opcode table. */
opcode_htab = htab_create_alloc (1024, htab_hash_hash, htab_hash_eq,
NULL, xcalloc, free);
for (k = 0; k < NDS32_CORE_COUNT; k++)
{
/* Add op-codes. */
nds32_add_opcode_hash_table (k);
}
init_done = 1;
}
static int
is_mapping_symbol (struct disassemble_info *info, int n,
enum map_type *map_type)
{
const char *name = NULL;
/* Get symbol name. */
name = bfd_asymbol_name (info->symtab[n]);
if (name[1] == 'c')
{
*map_type = MAP_CODE;
return TRUE;
}
else if (name[1] == 'd' && name[2] == '0')
{
*map_type = MAP_DATA0;
return TRUE;
}
else if (name[1] == 'd' && name[2] == '1')
{
*map_type = MAP_DATA1;
return TRUE;
}
else if (name[1] == 'd' && name[2] == '2')
{
*map_type = MAP_DATA2;
return TRUE;
}
else if (name[1] == 'd' && name[2] == '3')
{
*map_type = MAP_DATA3;
return TRUE;
}
else if (name[1] == 'd' && name[2] == '4')
{
*map_type = MAP_DATA4;
return TRUE;
}
return FALSE;
}
static int
get_mapping_symbol_type (struct disassemble_info *info, int n,
enum map_type *map_type)
{
/* If the symbol is in a different section, ignore it. */
if (info->section != NULL
&& info->section != info->symtab[n]->section)
return FALSE;
return is_mapping_symbol (info, n, map_type);
}