* gas/mips/micromips@24k-branch-delay-1.d: New test.

* gas/mips/micromips@24k-triple-stores-1.d: New test.
	* gas/mips/micromips@24k-triple-stores-2.d: New test.
	* gas/mips/micromips@24k-triple-stores-3.d: New test.
	* gas/mips/micromips@24k-triple-stores-4.d: New test.
	* gas/mips/micromips@24k-triple-stores-5.d: New test.
	* gas/mips/micromips@24k-triple-stores-6.d: New test.
	* gas/mips/micromips@24k-triple-stores-7.d: New test.
	* gas/mips/micromips@24k-triple-stores-8.d: New test.
	* gas/mips/micromips@24k-triple-stores-9.d: New test.
	* gas/mips/micromips@24k-triple-stores-10.d: New test.
	* gas/mips/micromips@24k-triple-stores-11.d: New test.
	* gas/mips/24k-triple-stores-1.s: Adjust for microMIPS
	disassembly.
	* gas/mips/24k-triple-stores-2.s: Likewise.
	* gas/mips/24k-triple-stores-3.s: Likewise.
	* gas/mips/24k-triple-stores-4.s: Likewise.
	* gas/mips/24k-triple-stores-5.s: Likewise.
	* gas/mips/24k-triple-stores-6.s: Likewise.
	* gas/mips/24k-triple-stores-7.s: Likewise.
	* gas/mips/24k-triple-stores-8.s: Likewise.
	* gas/mips/24k-triple-stores-9.s: Likewise.
	* gas/mips/24k-triple-stores-10.s: Likewise.
	* gas/mips/24k-triple-stores-11.s: Likewise.
	* gas/mips/mips.exp: Run the new tests.
This commit is contained in:
Maciej W. Rozycki 2011-11-21 11:18:28 +00:00
parent 9535b3e573
commit fbdd3712c9
25 changed files with 580 additions and 14 deletions

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@ -1,3 +1,31 @@
2011-11-21 Maciej W. Rozycki <macro@codesourcery.com>
* gas/mips/micromips@24k-branch-delay-1.d: New test.
* gas/mips/micromips@24k-triple-stores-1.d: New test.
* gas/mips/micromips@24k-triple-stores-2.d: New test.
* gas/mips/micromips@24k-triple-stores-3.d: New test.
* gas/mips/micromips@24k-triple-stores-4.d: New test.
* gas/mips/micromips@24k-triple-stores-5.d: New test.
* gas/mips/micromips@24k-triple-stores-6.d: New test.
* gas/mips/micromips@24k-triple-stores-7.d: New test.
* gas/mips/micromips@24k-triple-stores-8.d: New test.
* gas/mips/micromips@24k-triple-stores-9.d: New test.
* gas/mips/micromips@24k-triple-stores-10.d: New test.
* gas/mips/micromips@24k-triple-stores-11.d: New test.
* gas/mips/24k-triple-stores-1.s: Adjust for microMIPS
disassembly.
* gas/mips/24k-triple-stores-2.s: Likewise.
* gas/mips/24k-triple-stores-3.s: Likewise.
* gas/mips/24k-triple-stores-4.s: Likewise.
* gas/mips/24k-triple-stores-5.s: Likewise.
* gas/mips/24k-triple-stores-6.s: Likewise.
* gas/mips/24k-triple-stores-7.s: Likewise.
* gas/mips/24k-triple-stores-8.s: Likewise.
* gas/mips/24k-triple-stores-9.s: Likewise.
* gas/mips/24k-triple-stores-10.s: Likewise.
* gas/mips/24k-triple-stores-11.s: Likewise.
* gas/mips/mips.exp: Run the new tests.
2011-11-21 Maciej W. Rozycki <macro@codesourcery.com>
* gas/mips/micromips@loc-swap-2.d: Correct test case.

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@ -1,5 +1,6 @@
# integer stores
foo:
sb $2,0($sp)
sb $3,8($sp)
sb $4,16($sp)

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@ -1,4 +1,5 @@
.text
foo:
sb $2,0($8)
sb $3,8($8)
.data

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@ -1,4 +1,5 @@
.text
foo:
add $4,$4,$4
add $4,$4,$4
add $4,$4,$4

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@ -1,5 +1,6 @@
# Check for range
foo:
sb $2,0($sp)
sb $3,10($sp)
sb $4,31($sp)

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@ -1,6 +1,7 @@
# Assume to be on the same line (within 32bytes)
# Check for individual different double words
foo:
# safe
sb $2,11($sp)
sb $3,11($sp)

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@ -1,5 +1,6 @@
# Range check for safe case after alignment its range >= 32.
foo:
sb $s3,10($t0)
sh $s3,1($t0)
sb $s3,32($t0)

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@ -1,5 +1,6 @@
# Mix byte/half/word sizes with arbitary base register.
foo:
# safe
sh $2,7($8)
sb $3,0($8)

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@ -1,5 +1,6 @@
# Store macros
foo:
usw $ra,80($sp)
usw $s3,88($sp)
usw $s8,96($sp)

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@ -1,3 +1,4 @@
foo:
# range check
sb $s3,4($t0)
sw $s3,8($t0)

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@ -1,5 +1,6 @@
# Range check after alignment between adjacent offsets >= 24 ??
foo:
sb $s3,0($t0)
sb $s3,1($t0)
sb $s3,24($t0)

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@ -1,4 +1,5 @@
.text
foo:
sb $2,0($8)
.data
.word 1

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@ -0,0 +1,22 @@
#objdump: -dr
#as: -mfix-24k -32
#name: 24K: Delay slot filling (microMIPS)
#source: 24k-branch-delay-1.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 3043 0005 addiu v0,v1,5
*[0-9a-f]+: 6a20 lw a0,0\(v0\)
*[0-9a-f]+: e9a0 sw v1,0\(v0\)
*[0-9a-f]+: e9a2 sw v1,8\(v0\)
*([0-9a-f]+): 9403 fffe beqz v1,\1 <.*\+0x\1>
[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
*[0-9a-f]+: e9a4 sw v1,16\(v0\)
*[0-9a-f]+: 69a2 lw v1,8\(v0\)
[0-9a-f]+ <.*>:
*[0-9a-f]+: 6aa4 lw a1,16\(v0\)
\.\.\.

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@ -0,0 +1,77 @@
#objdump: -dr
#as: -mfix-24k -32
#name: 24K: Triple Store (Opcode Check)
#source: 24k-triple-stores-1.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 185d 0000 sb v0,0\(sp\)
*[0-9a-f]+: 187d 0008 sb v1,8\(sp\)
*[0-9a-f]+: 189d 0010 sb a0,16\(sp\)
*[0-9a-f]+: 18bd 0018 sb a1,24\(sp\)
*[0-9a-f]+: 18dd 0020 sb a2,32\(sp\)
*[0-9a-f]+: 385d 0000 sh v0,0\(sp\)
*[0-9a-f]+: 387d 0008 sh v1,8\(sp\)
*[0-9a-f]+: 389d 0010 sh a0,16\(sp\)
*[0-9a-f]+: 38bd 0018 sh a1,24\(sp\)
*[0-9a-f]+: 38dd 0020 sh a2,32\(sp\)
*[0-9a-f]+: c840 sw v0,0\(sp\)
*[0-9a-f]+: c862 sw v1,8\(sp\)
*[0-9a-f]+: c884 sw a0,16\(sp\)
*[0-9a-f]+: c8a6 sw a1,24\(sp\)
*[0-9a-f]+: c8c8 sw a2,32\(sp\)
*[0-9a-f]+: 605d 9000 swr v0,0\(sp\)
*[0-9a-f]+: 607d 9008 swr v1,8\(sp\)
*[0-9a-f]+: 609d 9010 swr a0,16\(sp\)
*[0-9a-f]+: 60bd 9018 swr a1,24\(sp\)
*[0-9a-f]+: 60dd 9020 swr a2,32\(sp\)
*[0-9a-f]+: 605d 8000 swl v0,0\(sp\)
*[0-9a-f]+: 607d 8008 swl v1,8\(sp\)
*[0-9a-f]+: 609d 8010 swl a0,16\(sp\)
*[0-9a-f]+: 60bd 8018 swl a1,24\(sp\)
*[0-9a-f]+: 60dd 8020 swl a2,32\(sp\)
*[0-9a-f]+: 605d b000 sc v0,0\(sp\)
*[0-9a-f]+: 607d b008 sc v1,8\(sp\)
*[0-9a-f]+: 609d b010 sc a0,16\(sp\)
*[0-9a-f]+: 60bd b018 sc a1,24\(sp\)
*[0-9a-f]+: 60dd b020 sc a2,32\(sp\)
*[0-9a-f]+: 985d 0000 swc1 \$f2,0\(sp\)
*[0-9a-f]+: 987d 0008 swc1 \$f3,8\(sp\)
*[0-9a-f]+: 989d 0010 swc1 \$f4,16\(sp\)
*[0-9a-f]+: 98bd 0018 swc1 \$f5,24\(sp\)
*[0-9a-f]+: 98dd 0020 swc1 \$f6,32\(sp\)
*[0-9a-f]+: 205d 8000 swc2 \$2,0\(sp\)
*[0-9a-f]+: 207d 8008 swc2 \$3,8\(sp\)
*[0-9a-f]+: 209d 8010 swc2 \$4,16\(sp\)
*[0-9a-f]+: 20bd 8018 swc2 \$5,24\(sp\)
*[0-9a-f]+: 20dd 8020 swc2 \$6,32\(sp\)
*[0-9a-f]+: b85d 0000 sdc1 \$f2,0\(sp\)
*[0-9a-f]+: b87d 0008 sdc1 \$f3,8\(sp\)
*[0-9a-f]+: b89d 0010 sdc1 \$f4,16\(sp\)
*[0-9a-f]+: b8bd 0018 sdc1 \$f5,24\(sp\)
*[0-9a-f]+: b8dd 0020 sdc1 \$f6,32\(sp\)
*[0-9a-f]+: 205d a000 sdc2 \$2,0\(sp\)
*[0-9a-f]+: 207d a008 sdc2 \$3,8\(sp\)
*[0-9a-f]+: 209d a010 sdc2 \$4,16\(sp\)
*[0-9a-f]+: 20bd a018 sdc2 \$5,24\(sp\)
*[0-9a-f]+: 20dd a020 sdc2 \$6,32\(sp\)
*[0-9a-f]+: 5528 0048 lwxc1 \$f0,t1\(t0\)
*[0-9a-f]+: 5548 0848 lwxc1 \$f1,t2\(t0\)
*[0-9a-f]+: 5568 1048 lwxc1 \$f2,t3\(t0\)
*[0-9a-f]+: 5588 1848 lwxc1 \$f3,t4\(t0\)
*[0-9a-f]+: 55a8 2048 lwxc1 \$f4,t5\(t0\)
*[0-9a-f]+: 5528 0108 sdxc1 \$f0,t1\(t0\)
*[0-9a-f]+: 5548 1108 sdxc1 \$f2,t2\(t0\)
*[0-9a-f]+: 5568 2108 sdxc1 \$f4,t3\(t0\)
*[0-9a-f]+: 5588 3108 sdxc1 \$f6,t4\(t0\)
*[0-9a-f]+: 55a8 4108 sdxc1 \$f8,t5\(t0\)
*[0-9a-f]+: 5528 0188 suxc1 \$f0,t1\(t0\)
*[0-9a-f]+: 5548 1188 suxc1 \$f2,t2\(t0\)
*[0-9a-f]+: 5568 2188 suxc1 \$f4,t3\(t0\)
*[0-9a-f]+: 5588 3188 suxc1 \$f6,t4\(t0\)
*[0-9a-f]+: 55a8 4188 suxc1 \$f8,t5\(t0\)
*[0-9a-f]+: 0c00 nop
\.\.\.

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@ -0,0 +1,14 @@
#objdump: -drz
#as: -mfix-24k -32
#name: 24K: Triple Store (Intervening data #2)
#source: 24k-triple-stores-10.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 1848 0000 sb v0,0\(t0\)
*[0-9a-f]+: 1868 0008 sb v1,8\(t0\)
*[0-9a-f]+: 1888 0010 sb a0,16\(t0\)
#pass

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@ -0,0 +1,21 @@
#objdump: -drz
#as: -mfix-24k -32
#name: 24K: Triple Store (gprel relocs)
#source: 24k-triple-stores-11.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 0084 2110 add a0,a0,a0
*[0-9a-f]+: 0084 2110 add a0,a0,a0
*[0-9a-f]+: 0084 2110 add a0,a0,a0
*[0-9a-f]+: 0084 2110 add a0,a0,a0
*[0-9a-f]+: f85c 0000 sw v0,0\(gp\)
[0-9a-f]+: R_MICROMIPS_GPREL16 sym1
*[0-9a-f]+: f87c 0000 sw v1,0\(gp\)
[0-9a-f]+: R_MICROMIPS_GPREL16 sym2
*[0-9a-f]+: f89c 0000 sw a0,0\(gp\)
[0-9a-f]+: R_MICROMIPS_GPREL16 sym3
#pass

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@ -0,0 +1,39 @@
#objdump: -dr
#as: -mfix-24k -32
#name: 24K: Triple Store (Range Check)
#source: 24k-triple-stores-2.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 185d 0000 sb v0,0\(sp\)
*[0-9a-f]+: 187d 000a sb v1,10\(sp\)
*[0-9a-f]+: 189d 001f sb a0,31\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 385d 0000 sh v0,0\(sp\)
*[0-9a-f]+: 387d fff0 sh v1,-16\(sp\)
*[0-9a-f]+: 389d ffe0 sh a0,-32\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: c840 sw v0,0\(sp\)
*[0-9a-f]+: f87d fff8 sw v1,-8\(sp\)
*[0-9a-f]+: c882 sw a0,8\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 605d 9000 swr v0,0\(sp\)
*[0-9a-f]+: 607d 9ff0 swr v1,-16\(sp\)
*[0-9a-f]+: 609d 9010 swr a0,16\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 605d 8000 swl v0,0\(sp\)
*[0-9a-f]+: 607d 8008 swl v1,8\(sp\)
*[0-9a-f]+: 609d 8010 swl a0,16\(sp\)
*[0-9a-f]+: 60bd 8018 swl a1,24\(sp\)
*[0-9a-f]+: 60dd 8000 swl a2,0\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 605d b020 sc v0,32\(sp\)
*[0-9a-f]+: 607d b008 sc v1,8\(sp\)
*[0-9a-f]+: 609d bff8 sc a0,-8\(sp\)
*[0-9a-f]+: 60bd b000 sc a1,0\(sp\)
*[0-9a-f]+: 60dd b020 sc a2,32\(sp\)
*[0-9a-f]+: 0c00 nop
\.\.\.

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@ -0,0 +1,76 @@
#objdump: -dr
#as: -mfix-24k -32
#name: 24K: Triple Store (Double-word Check)
#source: 24k-triple-stores-3.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 185d 000b sb v0,11\(sp\)
*[0-9a-f]+: 187d 000b sb v1,11\(sp\)
*[0-9a-f]+: 189d 0004 sb a0,4\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 185d 0000 sb v0,0\(sp\)
*[0-9a-f]+: 187d 000b sb v1,11\(sp\)
*[0-9a-f]+: 189d 0005 sb a0,5\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 185d 0007 sb v0,7\(sp\)
*[0-9a-f]+: 187d 000b sb v1,11\(sp\)
*[0-9a-f]+: 189d 0010 sb a0,16\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1848 0000 sb v0,0\(t0\)
*[0-9a-f]+: 1868 0008 sb v1,8\(t0\)
*[0-9a-f]+: 1888 0009 sb a0,9\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 385d 0000 sh v0,0\(sp\)
*[0-9a-f]+: 387d ffe1 sh v1,-31\(sp\)
*[0-9a-f]+: 389d ffe2 sh a0,-30\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 385d 0006 sh v0,6\(sp\)
*[0-9a-f]+: 387d 0008 sh v1,8\(sp\)
*[0-9a-f]+: 389d 0010 sh a0,16\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 3848 0001 sh v0,1\(t0\)
*[0-9a-f]+: 3868 0003 sh v1,3\(t0\)
*[0-9a-f]+: 3888 000b sh a0,11\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: c842 sw v0,8\(sp\)
*[0-9a-f]+: f87d fff8 sw v1,-8\(sp\)
*[0-9a-f]+: c882 sw a0,8\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: c841 sw v0,4\(sp\)
*[0-9a-f]+: c862 sw v1,8\(sp\)
*[0-9a-f]+: c884 sw a0,16\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: f848 0003 sw v0,3\(t0\)
*[0-9a-f]+: f868 0007 sw v1,7\(t0\)
*[0-9a-f]+: f888 000f sw a0,15\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 605d 8004 swl v0,4\(sp\)
*[0-9a-f]+: 607d 800a swl v1,10\(sp\)
*[0-9a-f]+: 609d 8011 swl a0,17\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 605d 8007 swl v0,7\(sp\)
*[0-9a-f]+: 607d 800c swl v1,12\(sp\)
*[0-9a-f]+: 609d 8010 swl a0,16\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 605d 8000 swl v0,0\(sp\)
*[0-9a-f]+: 607d 800c swl v1,12\(sp\)
*[0-9a-f]+: 609d 8017 swl a0,23\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 6048 8003 swl v0,3\(t0\)
*[0-9a-f]+: 6068 8008 swl v1,8\(t0\)
*[0-9a-f]+: 6088 800c swl a0,12\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 605d 8000 swl v0,0\(sp\)
*[0-9a-f]+: 607d 800c swl v1,12\(sp\)
*[0-9a-f]+: 609d 9017 swr a0,23\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 6048 8005 swl v0,5\(t0\)
*[0-9a-f]+: 6068 8011 swl v1,17\(t0\)
*[0-9a-f]+: 6088 901c swr a0,28\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 0c00 nop
\.\.\.

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@ -0,0 +1,59 @@
#objdump: -dr
#as: -mfix-24k -32
#name: 24K: Triple Store (Range Check >= 32)
#source: 24k-triple-stores-4.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 1a68 000a sb s3,10\(t0\)
*[0-9a-f]+: 3a68 0001 sh s3,1\(t0\)
*[0-9a-f]+: 1a68 0020 sb s3,32\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 000a sb s3,10\(t0\)
*[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
*[0-9a-f]+: 3a68 0020 sh s3,32\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0021 sb s3,33\(t0\)
*[0-9a-f]+: 3a68 0037 sh s3,55\(t0\)
*[0-9a-f]+: 1a68 0040 sb s3,64\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0021 sb s3,33\(t0\)
*[0-9a-f]+: 1a68 0037 sb s3,55\(t0\)
*[0-9a-f]+: 3a68 0040 sh s3,64\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 000c sb s3,12\(t0\)
*[0-9a-f]+: fa68 0001 sw s3,1\(t0\)
*[0-9a-f]+: 1a68 0020 sb s3,32\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 000c sb s3,12\(t0\)
*[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
*[0-9a-f]+: fa68 0020 sw s3,32\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0023 sb s3,35\(t0\)
*[0-9a-f]+: fa68 0037 sw s3,55\(t0\)
*[0-9a-f]+: 1a68 0040 sb s3,64\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0023 sb s3,35\(t0\)
*[0-9a-f]+: 1a68 0037 sb s3,55\(t0\)
*[0-9a-f]+: fa68 0040 sw s3,64\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0010 sb s3,16\(t0\)
*[0-9a-f]+: b808 0001 sdc1 \$f0,1\(t0\)
*[0-9a-f]+: 1a68 0020 sb s3,32\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0010 sb s3,16\(t0\)
*[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
*[0-9a-f]+: b808 0020 sdc1 \$f0,32\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0027 sb s3,39\(t0\)
*[0-9a-f]+: b808 0037 sdc1 \$f0,55\(t0\)
*[0-9a-f]+: 1a68 0040 sb s3,64\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0027 sb s3,39\(t0\)
*[0-9a-f]+: 1a68 0037 sb s3,55\(t0\)
*[0-9a-f]+: b808 0040 sdc1 \$f0,64\(t0\)
*[0-9a-f]+: 4680 break
\.\.\.

View File

@ -0,0 +1,35 @@
#objdump: -dr
#as: -mfix-24k -32
#name: 24K: Triple Store (Mix byte/half/word size check)
#source: 24k-triple-stores-5.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 3848 0007 sh v0,7\(t0\)
*[0-9a-f]+: 1868 0000 sb v1,0\(t0\)
*[0-9a-f]+: f888 0001 sw a0,1\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 3848 0016 sh v0,22\(t0\)
*[0-9a-f]+: 1868 000f sb v1,15\(t0\)
*[0-9a-f]+: f888 0018 sw a0,24\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 3848 0000 sh v0,0\(t0\)
*[0-9a-f]+: 1868 0009 sb v1,9\(t0\)
*[0-9a-f]+: f888 0002 sw a0,2\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 3848 0006 sh v0,6\(t0\)
*[0-9a-f]+: 1868 0010 sb v1,16\(t0\)
*[0-9a-f]+: f888 000c sw a0,12\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 3848 000a sh v0,10\(t0\)
*[0-9a-f]+: 1868 000f sb v1,15\(t0\)
*[0-9a-f]+: f888 0004 sw a0,4\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 3848 000a sh v0,10\(t0\)
*[0-9a-f]+: 1868 0010 sb v1,16\(t0\)
*[0-9a-f]+: f888 0004 sw a0,4\(t0\)
*[0-9a-f]+: 4680 break
\.\.\.

View File

@ -0,0 +1,36 @@
#objdump: -dr
#as: -mfix-24k -32 -EB
#name: 24K: Triple Store (Store Macro Check)
#source: 24k-triple-stores-6.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 63fd 8050 swl ra,80\(sp\)
*[0-9a-f]+: 63fd 9053 swr ra,83\(sp\)
*[0-9a-f]+: 627d 8058 swl s3,88\(sp\)
*[0-9a-f]+: 627d 905b swr s3,91\(sp\)
*[0-9a-f]+: 63dd 8060 swl s8,96\(sp\)
*[0-9a-f]+: 63dd 9063 swr s8,99\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1bfd 0051 sb ra,81\(sp\)
*[0-9a-f]+: 003f 4040 srl at,ra,0x8
*[0-9a-f]+: 183d 0050 sb at,80\(sp\)
*[0-9a-f]+: 1a7d 0059 sb s3,89\(sp\)
*[0-9a-f]+: 0033 4040 srl at,s3,0x8
*[0-9a-f]+: 183d 0058 sb at,88\(sp\)
*[0-9a-f]+: 1bdd 0061 sb s8,97\(sp\)
*[0-9a-f]+: 003e 4040 srl at,s8,0x8
*[0-9a-f]+: 183d 0060 sb at,96\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 981d 0050 swc1 \$f0,80\(sp\)
*[0-9a-f]+: 985d 0058 swc1 \$f2,88\(sp\)
*[0-9a-f]+: 989d 0060 swc1 \$f4,96\(sp\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: b81d 0050 sdc1 \$f0,80\(sp\)
*[0-9a-f]+: b85d 0058 sdc1 \$f2,88\(sp\)
*[0-9a-f]+: b89d 0060 sdc1 \$f4,96\(sp\)
*[0-9a-f]+: 4680 break
\.\.\.

View File

@ -0,0 +1,75 @@
#objdump: -dr
#as: -mfix-24k -32
#name: 24K: Triple Store (Extended Range Check)
#source: 24k-triple-stores-7.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 1a68 0004 sb s3,4\(t0\)
*[0-9a-f]+: fa68 0008 sw s3,8\(t0\)
*[0-9a-f]+: 1a68 000f sb s3,15\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0003 sb s3,3\(t0\)
*[0-9a-f]+: fa68 0008 sw s3,8\(t0\)
*[0-9a-f]+: 1a68 000f sb s3,15\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: fa68 001c sw s3,28\(t0\)
*[0-9a-f]+: fa68 0008 sw s3,8\(t0\)
*[0-9a-f]+: 1a68 001f sb s3,31\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0005 sb s3,5\(t0\)
*[0-9a-f]+: fa68 0009 sw s3,9\(t0\)
*[0-9a-f]+: 1a68 0010 sb s3,16\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0004 sb s3,4\(t0\)
*[0-9a-f]+: fa68 0009 sw s3,9\(t0\)
*[0-9a-f]+: 1a68 0010 sb s3,16\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0006 sb s3,6\(t0\)
*[0-9a-f]+: 3a68 0008 sh s3,8\(t0\)
*[0-9a-f]+: 1a68 000f sb s3,15\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0005 sb s3,5\(t0\)
*[0-9a-f]+: 3a68 0008 sh s3,8\(t0\)
*[0-9a-f]+: 1a68 000f sb s3,15\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 3a68 001e sh s3,30\(t0\)
*[0-9a-f]+: 3a68 0008 sh s3,8\(t0\)
*[0-9a-f]+: 1a68 001f sb s3,31\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0007 sb s3,7\(t0\)
*[0-9a-f]+: 3a68 0009 sh s3,9\(t0\)
*[0-9a-f]+: 1a68 0010 sb s3,16\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0006 sb s3,6\(t0\)
*[0-9a-f]+: 3a68 0009 sh s3,9\(t0\)
*[0-9a-f]+: 1a68 0010 sb s3,16\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0007 sb s3,7\(t0\)
*[0-9a-f]+: b808 0008 sdc1 \$f0,8\(t0\)
*[0-9a-f]+: 1a68 000f sb s3,15\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0007 sb s3,7\(t0\)
*[0-9a-f]+: b808 0008 sdc1 \$f0,8\(t0\)
*[0-9a-f]+: 1a68 0010 sb s3,16\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0010 sb s3,16\(t0\)
*[0-9a-f]+: b808 0008 sdc1 \$f0,8\(t0\)
*[0-9a-f]+: 1a68 0017 sb s3,23\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0010 sb s3,16\(t0\)
*[0-9a-f]+: b808 0008 sdc1 \$f0,8\(t0\)
*[0-9a-f]+: 1a68 0018 sb s3,24\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0008 sb s3,8\(t0\)
*[0-9a-f]+: b808 0009 sdc1 \$f0,9\(t0\)
*[0-9a-f]+: 1a68 0010 sb s3,16\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 fffd sb s3,-3\(t0\)
*[0-9a-f]+: b808 fffe sdc1 \$f0,-2\(t0\)
*[0-9a-f]+: 1a68 0006 sb s3,6\(t0\)
*[0-9a-f]+: 4680 break
\.\.\.

View File

@ -0,0 +1,59 @@
#objdump: -dr
#as: -mfix-24k -32
#name: 24K: Triple Store (Range Check >= 24)
#source: 24k-triple-stores-8.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 1a68 0000 sb s3,0\(t0\)
*[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
*[0-9a-f]+: 1a68 0018 sb s3,24\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0000 sb s3,0\(t0\)
*[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
*[0-9a-f]+: 1a68 0019 sb s3,25\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
*[0-9a-f]+: 1a68 0019 sb s3,25\(t0\)
*[0-9a-f]+: 1a68 001a sb s3,26\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0000 sb s3,0\(t0\)
*[0-9a-f]+: 3a68 0003 sh s3,3\(t0\)
*[0-9a-f]+: 1a68 001a sb s3,26\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 3a68 0000 sh s3,0\(t0\)
*[0-9a-f]+: 1a68 0003 sb s3,3\(t0\)
*[0-9a-f]+: 1a68 001a sb s3,26\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0023 sb s3,35\(t0\)
*[0-9a-f]+: 3a68 0020 sh s3,32\(t0\)
*[0-9a-f]+: 1a68 0009 sb s3,9\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
*[0-9a-f]+: 3a68 0019 sh s3,25\(t0\)
*[0-9a-f]+: 1a68 001b sb s3,27\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0000 sb s3,0\(t0\)
*[0-9a-f]+: fa68 0007 sw s3,7\(t0\)
*[0-9a-f]+: 1a68 001c sb s3,28\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0000 sb s3,0\(t0\)
*[0-9a-f]+: 1a68 0007 sb s3,7\(t0\)
*[0-9a-f]+: fa68 001c sw s3,28\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0040 sb s3,64\(t0\)
*[0-9a-f]+: fa68 003b sw s3,59\(t0\)
*[0-9a-f]+: fa68 0025 sw s3,37\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: fa68 0040 sw s3,64\(t0\)
*[0-9a-f]+: 1a68 003d sb s3,61\(t0\)
*[0-9a-f]+: 1a68 0027 sb s3,39\(t0\)
*[0-9a-f]+: 4680 break
*[0-9a-f]+: 1a68 0001 sb s3,1\(t0\)
*[0-9a-f]+: fa68 0019 sw s3,25\(t0\)
*[0-9a-f]+: 1a68 001d sb s3,29\(t0\)
*[0-9a-f]+: 4680 break
\.\.\.

View File

@ -0,0 +1,14 @@
#objdump: -drz
#as: -mfix-24k -32
#name: 24K: Triple store (Intervening data #1)
#source: 24k-triple-stores-9.s
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <.*>:
*[0-9a-f]+: 1848 0000 sb v0,0\(t0\)
*[0-9a-f]+: 1868 0008 sb v1,8\(t0\)
*[0-9a-f]+: 1888 0010 sb a0,16\(t0\)
#pass

View File

@ -494,30 +494,30 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "eret-2"
run_dump_test "eret-3"
run_dump_test_arches "24k-branch-delay-1" \
[mips_arch_list_matching mips1 !micromips]
[mips_arch_list_matching mips1]
run_dump_test_arches "24k-triple-stores-1" \
[mips_arch_list_matching fpisa5 !octeon !micromips]
[mips_arch_list_matching fpisa5 !octeon]
run_dump_test_arches "24k-triple-stores-2" \
[mips_arch_list_matching mips2 !micromips]
[mips_arch_list_matching mips2]
run_dump_test_arches "24k-triple-stores-3" \
[mips_arch_list_matching mips2 !micromips]
[mips_arch_list_matching mips2]
run_dump_test_arches "24k-triple-stores-4" \
[mips_arch_list_matching mips2 !micromips]
[mips_arch_list_matching mips2]
run_dump_test_arches "24k-triple-stores-5" \
[mips_arch_list_matching mips1 !micromips]
[mips_arch_list_matching mips1]
run_dump_test_arches "24k-triple-stores-6" \
[mips_arch_list_matching mips2 !micromips]
[mips_arch_list_matching mips2]
run_dump_test_arches "24k-triple-stores-7" \
[mips_arch_list_matching mips2 !micromips]
[mips_arch_list_matching mips2]
run_dump_test_arches "24k-triple-stores-8" \
[mips_arch_list_matching mips1 !micromips]
[mips_arch_list_matching mips1]
run_dump_test_arches "24k-triple-stores-9" \
[mips_arch_list_matching mips1 !micromips]
[mips_arch_list_matching mips1]
run_dump_test_arches "24k-triple-stores-10" \
[mips_arch_list_matching mips1 !micromips]
[mips_arch_list_matching mips1]
if $elf {
run_dump_test_arches "24k-triple-stores-11" \
[mips_arch_list_matching mips1 !micromips]
[mips_arch_list_matching mips1]
}
if $elf {