OpenE2K/binutils-gdb
12
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

sim: bfin: add missing VS set with add/sub insns

Browse Source 
The 16bit add/sub insns missed setting the VS bit in ASTAT whenever the
V bit was also set.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2011-03-26 06:02:41 +00:00
parent 81723326fe
commit fcd1ee07d3
2 changed files with 7 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
sim/bfin/ChangeLog
View File

@ -1,3 +1,7 @@
2011-03-26 Robin Getz <robin.getz@analog.com>
* bfin-sim.c (decode_dsp32alu_0): Set VS when V is set.
2011-03-24 Mike Frysinger <vapier@gentoo.org>
* dv-bfin_gpio.c (bfin_gpio_port_event): Call HW_TRACE at every

3
sim/bfin/bfin-sim.c
View File

@ -4122,6 +4122,9 @@ decode_dsp32alu_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1)
SET_ASTATREG (ac0, ac0_i);
SET_ASTATREG (v, v_i);
if (v_i)
SET_ASTATREG (vs, v_i);
if (HL)
SET_DREG_H (dst0, val << 16);
else