* i386-tdep.c: Fix spelling mistakes.
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@ -1,3 +1,7 @@
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2004-04-29 Mark Kettenis <kettenis@gnu.org>
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* i386-tdep.c: Fix spelling mistakes.
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2004-04-28 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
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2004-04-28 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
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Andrew Cagney <cagney@redhat.com>
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Andrew Cagney <cagney@redhat.com>
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@ -572,12 +572,12 @@ i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc,
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subl $XXX, %esp
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subl $XXX, %esp
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NOTE: You can't subtract a 16 bit immediate from a 32 bit
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NOTE: You can't subtract a 16-bit immediate from a 32-bit
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reg, so we don't have to worry about a data16 prefix. */
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reg, so we don't have to worry about a data16 prefix. */
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op = read_memory_unsigned_integer (pc + 3, 1);
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op = read_memory_unsigned_integer (pc + 3, 1);
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if (op == 0x83)
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if (op == 0x83)
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{
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{
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/* `subl' with 8 bit immediate. */
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/* `subl' with 8-bit immediate. */
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if (read_memory_unsigned_integer (pc + 4, 1) != 0xec)
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if (read_memory_unsigned_integer (pc + 4, 1) != 0xec)
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/* Some instruction starting with 0x83 other than `subl'. */
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/* Some instruction starting with 0x83 other than `subl'. */
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return pc + 3;
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return pc + 3;
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@ -589,12 +589,12 @@ i386_analyze_frame_setup (CORE_ADDR pc, CORE_ADDR current_pc,
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}
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}
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else if (op == 0x81)
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else if (op == 0x81)
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{
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{
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/* Maybe it is `subl' with a 32 bit immedediate. */
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/* Maybe it is `subl' with a 32-bit immediate. */
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if (read_memory_unsigned_integer (pc + 4, 1) != 0xec)
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if (read_memory_unsigned_integer (pc + 4, 1) != 0xec)
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/* Some instruction starting with 0x81 other than `subl'. */
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/* Some instruction starting with 0x81 other than `subl'. */
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return pc + 3;
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return pc + 3;
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/* It is `subl' with a 32 bit immediate. */
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/* It is `subl' with a 32-bit immediate. */
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cache->locals = read_memory_integer (pc + 5, 4);
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cache->locals = read_memory_integer (pc + 5, 4);
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return pc + 9;
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return pc + 9;
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}
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}
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@ -657,9 +657,9 @@ i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc,
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once used in the System V compiler).
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once used in the System V compiler).
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Local space is allocated just below the saved %ebp by either the
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Local space is allocated just below the saved %ebp by either the
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'enter' instruction, or by "subl $<size>, %esp". 'enter' has a 16
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'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
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bit unsigned argument for space to allocate, and the 'addl'
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16-bit unsigned argument for space to allocate, and the 'addl'
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instruction could have either a signed byte, or 32 bit immediate.
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instruction could have either a signed byte, or 32-bit immediate.
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Next, the registers used by this function are pushed. With the
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Next, the registers used by this function are pushed. With the
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System V compiler they will always be in the order: %edi, %esi,
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System V compiler they will always be in the order: %edi, %esi,
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@ -1161,7 +1161,7 @@ i386_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
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(i386_frame_this_id, i386_sigtramp_frame_this_id,
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(i386_frame_this_id, i386_sigtramp_frame_this_id,
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i386_unwind_dummy_id). It's there, since all frame unwinders for
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i386_unwind_dummy_id). It's there, since all frame unwinders for
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a given target have to agree (within a certain margin) on the
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a given target have to agree (within a certain margin) on the
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defenition of the stack address of a frame. Otherwise
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definition of the stack address of a frame. Otherwise
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frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
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frame_id_inner() won't work correctly. Since DWARF2/GCC uses the
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stack address *before* the function call as a frame's CFA. On
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stack address *before* the function call as a frame's CFA. On
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the i386, when %ebp is used as a frame pointer, the offset
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the i386, when %ebp is used as a frame pointer, the offset
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@ -1533,7 +1533,7 @@ i386_register_to_value (struct frame_info *frame, int regnum,
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return;
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return;
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}
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}
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/* Read a value spread accross multiple registers. */
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/* Read a value spread across multiple registers. */
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gdb_assert (len > 4 && len % 4 == 0);
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gdb_assert (len > 4 && len % 4 == 0);
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@ -1565,7 +1565,7 @@ i386_value_to_register (struct frame_info *frame, int regnum,
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return;
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return;
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}
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}
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/* Write a value spread accross multiple registers. */
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/* Write a value spread across multiple registers. */
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gdb_assert (len > 4 && len % 4 == 0);
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gdb_assert (len > 4 && len % 4 == 0);
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@ -1936,7 +1936,7 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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tdep->sizeof_fpregset = I387_SIZEOF_FSAVE;
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tdep->sizeof_fpregset = I387_SIZEOF_FSAVE;
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/* The default settings include the FPU registers, the MMX registers
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/* The default settings include the FPU registers, the MMX registers
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and the SSE registers. This can be overidden for a specific ABI
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and the SSE registers. This can be overridden for a specific ABI
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by adjusting the members `st0_regnum', `mm0_regnum' and
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by adjusting the members `st0_regnum', `mm0_regnum' and
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`num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
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`num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
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will show up in the output of "info all-registers". Ideally we
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will show up in the output of "info all-registers". Ideally we
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@ -1952,7 +1952,7 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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tdep->st0_regnum = I386_ST0_REGNUM;
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tdep->st0_regnum = I386_ST0_REGNUM;
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/* The MMX registers are implemented as pseudo-registers. Put off
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/* The MMX registers are implemented as pseudo-registers. Put off
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caclulating the register number for %mm0 until we know the number
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calculating the register number for %mm0 until we know the number
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of raw registers. */
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of raw registers. */
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tdep->mm0_regnum = 0;
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tdep->mm0_regnum = 0;
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@ -1995,7 +1995,7 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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/* NOTE: kettenis/20040418: GCC does have two possible register
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/* NOTE: kettenis/20040418: GCC does have two possible register
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numbering schemes on the i386: dbx and SVR4. These schemes
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numbering schemes on the i386: dbx and SVR4. These schemes
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differ in how they number %ebp, %esp, %eflags, and the
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differ in how they number %ebp, %esp, %eflags, and the
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floating-point registers, and are implemented by the attays
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floating-point registers, and are implemented by the arrays
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dbx_register_map[] and svr4_dbx_register_map in
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dbx_register_map[] and svr4_dbx_register_map in
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gcc/config/i386.c. GCC also defines a third numbering scheme in
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gcc/config/i386.c. GCC also defines a third numbering scheme in
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gcc/config/i386.c, which it designates as the "default" register
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gcc/config/i386.c, which it designates as the "default" register
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