[bfd]
* reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, R_M32C_HI16. (m32c_reloc_map): Likewise. (m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16. [cpu] * m32c.opc (parse_unsigned8): Add %dsp8(). (parse_signed8): Add %hi8(). (parse_unsigned16): Add %dsp16(). (parse_signed16): Add %lo16() and %hi16(). (parse_lab_5_3): Make valuep a bfd_vma *. [gas] * config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands. Support %mod() modifiers from opcodes. * doc/c-m32c.texi (M32C-Modifiers): New section. [include/elf] * m32c.h: Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, and R_M32C_HI16. [opcodes] * m32c-asm.c Regenerate. * m32c-dis.c Regenerate.
This commit is contained in:
parent
030cf60a5d
commit
fd54057a29
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@ -1,3 +1,14 @@
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2005-07-25 DJ Delorie <dj@redhat.com>
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* reloc.c: Remove unused M32C relocs, add BFD_RELOC_M32C_HI8.
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* libbfd.h: Regenerate.
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* bfd-in2.h: Regenerate.
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* elf32-m32c.c (m32c_elf_howto_table): Add R_M32C_8, R_M32C_LO16,
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R_M32C_HI8, R_M32C_HI16.
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(m32c_reloc_map): Likewise.
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(m32c_elf_relocate_section): Add R_M32C_HI8 and R_M32C_HI16.
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2005-07-25 Jan Hubicka <jh@suse.cz>
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H.J. Lu <hongjiu.lu@intel.com>
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@ -3077,23 +3077,7 @@ of the container. */
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BFD_RELOC_DLX_JMP26,
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/* Renesas M16C/M32C Relocations. */
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BFD_RELOC_M16C_8_PCREL8,
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BFD_RELOC_M16C_16_PCREL8,
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BFD_RELOC_M16C_8_PCREL16,
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BFD_RELOC_M16C_8_ELABEL24,
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BFD_RELOC_M16C_8_ABS16,
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BFD_RELOC_M16C_16_ABS16,
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BFD_RELOC_M16C_16_ABS24,
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BFD_RELOC_M16C_16_ABS32,
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BFD_RELOC_M16C_24_ABS16,
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BFD_RELOC_M16C_24_ABS24,
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BFD_RELOC_M16C_24_ABS32,
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BFD_RELOC_M16C_32_ABS16,
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BFD_RELOC_M16C_32_ABS24,
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BFD_RELOC_M16C_32_ABS32,
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BFD_RELOC_M16C_40_ABS16,
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BFD_RELOC_M16C_40_ABS24,
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BFD_RELOC_M16C_40_ABS32,
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BFD_RELOC_M32C_HI8,
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/* Renesas M32R (formerly Mitsubishi M32R) relocs.
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This is a 24 bit absolute address. */
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@ -132,6 +132,62 @@ static reloc_howto_type m32c_elf_howto_table [] =
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0, /* src_mask */
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0, /* dst_mask */
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TRUE), /* pcrel_offset */
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HOWTO (R_M32C_8, /* type */
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0, /* rightshift */
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0, /* size (0 = byte, 1 = short, 2 = long) */
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8, /* bitsize */
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FALSE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_unsigned, /* complain_on_overflow */
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bfd_elf_generic_reloc, /* special_function */
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"R_M32C_8", /* name */
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FALSE, /* partial_inplace */
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0, /* src_mask */
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0x000000ff, /* dst_mask */
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FALSE), /* pcrel_offset */
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HOWTO (R_M32C_LO16, /* type */
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0, /* rightshift */
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1, /* size (0 = byte, 1 = short, 2 = long) */
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16, /* bitsize */
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FALSE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_dont, /* complain_on_overflow */
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bfd_elf_generic_reloc, /* special_function */
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"R_M32C_LO16", /* name */
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FALSE, /* partial_inplace */
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0, /* src_mask */
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0x0000ffff, /* dst_mask */
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FALSE), /* pcrel_offset */
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HOWTO (R_M32C_HI8, /* type */
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0, /* rightshift */
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0, /* size (0 = byte, 1 = short, 2 = long) */
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8, /* bitsize */
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FALSE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_dont, /* complain_on_overflow */
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bfd_elf_generic_reloc, /* special_function */
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"R_M32C_HI8", /* name */
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FALSE, /* partial_inplace */
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0, /* src_mask */
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0x000000ff, /* dst_mask */
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FALSE), /* pcrel_offset */
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HOWTO (R_M32C_HI16, /* type */
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0, /* rightshift */
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1, /* size (0 = byte, 1 = short, 2 = long) */
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16, /* bitsize */
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FALSE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_dont, /* complain_on_overflow */
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bfd_elf_generic_reloc, /* special_function */
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"R_M32C_HI16", /* name */
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FALSE, /* partial_inplace */
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0, /* src_mask */
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0x0000ffff, /* dst_mask */
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FALSE), /* pcrel_offset */
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};
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/* Map BFD reloc types to M32C ELF reloc types. */
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@ -149,7 +205,11 @@ static const struct m32c_reloc_map m32c_reloc_map [] =
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{ BFD_RELOC_24, R_M32C_24 },
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{ BFD_RELOC_32, R_M32C_32 },
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{ BFD_RELOC_8_PCREL, R_M32C_8_PCREL },
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{ BFD_RELOC_16_PCREL, R_M32C_16_PCREL }
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{ BFD_RELOC_16_PCREL, R_M32C_16_PCREL },
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{ BFD_RELOC_8, R_M32C_8 },
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{ BFD_RELOC_LO16, R_M32C_LO16 },
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{ BFD_RELOC_HI16, R_M32C_HI16 },
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{ BFD_RELOC_M32C_HI8, R_M32C_HI8 }
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};
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static reloc_howto_type *
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}
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}
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break;
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case R_M32C_HI8:
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case R_M32C_HI16:
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relocation >>= 16;
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break;
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}
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r = _bfd_final_link_relocate (howto, input_bfd, input_section,
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18
bfd/libbfd.h
18
bfd/libbfd.h
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@ -1338,23 +1338,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
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"BFD_RELOC_DLX_HI16_S",
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"BFD_RELOC_DLX_LO16",
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"BFD_RELOC_DLX_JMP26",
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"BFD_RELOC_M16C_8_PCREL8",
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"BFD_RELOC_M16C_16_PCREL8",
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"BFD_RELOC_M16C_8_PCREL16",
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"BFD_RELOC_M16C_8_ELABEL24",
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"BFD_RELOC_M16C_8_ABS16",
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"BFD_RELOC_M16C_16_ABS16",
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"BFD_RELOC_M16C_16_ABS24",
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"BFD_RELOC_M16C_16_ABS32",
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"BFD_RELOC_M16C_24_ABS16",
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"BFD_RELOC_M16C_24_ABS24",
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"BFD_RELOC_M16C_24_ABS32",
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"BFD_RELOC_M16C_32_ABS16",
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"BFD_RELOC_M16C_32_ABS24",
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"BFD_RELOC_M16C_32_ABS32",
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"BFD_RELOC_M16C_40_ABS16",
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"BFD_RELOC_M16C_40_ABS24",
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"BFD_RELOC_M16C_40_ABS32",
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"BFD_RELOC_M32C_HI8",
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"BFD_RELOC_M32R_24",
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"BFD_RELOC_M32R_10_PCREL",
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"BFD_RELOC_M32R_18_PCREL",
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34
bfd/reloc.c
34
bfd/reloc.c
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@ -3069,39 +3069,7 @@ ENUMDOC
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DLX relocs
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ENUM
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BFD_RELOC_M16C_8_PCREL8
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ENUMX
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BFD_RELOC_M16C_16_PCREL8
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ENUMX
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BFD_RELOC_M16C_8_PCREL16
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ENUMX
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BFD_RELOC_M16C_8_ELABEL24
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ENUMX
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BFD_RELOC_M16C_8_ABS16
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ENUMX
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BFD_RELOC_M16C_16_ABS16
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ENUMX
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BFD_RELOC_M16C_16_ABS24
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ENUMX
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BFD_RELOC_M16C_16_ABS32
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ENUMX
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BFD_RELOC_M16C_24_ABS16
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ENUMX
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BFD_RELOC_M16C_24_ABS24
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ENUMX
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BFD_RELOC_M16C_24_ABS32
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ENUMX
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BFD_RELOC_M16C_32_ABS16
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ENUMX
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BFD_RELOC_M16C_32_ABS24
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ENUMX
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BFD_RELOC_M16C_32_ABS32
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ENUMX
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BFD_RELOC_M16C_40_ABS16
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ENUMX
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BFD_RELOC_M16C_40_ABS24
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ENUMX
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BFD_RELOC_M16C_40_ABS32
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BFD_RELOC_M32C_HI8
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ENUMDOC
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Renesas M16C/M32C Relocations.
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@ -1,3 +1,11 @@
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2005-07-25 DJ Delorie <dj@redhat.com>
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* m32c.opc (parse_unsigned8): Add %dsp8().
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(parse_signed8): Add %hi8().
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(parse_unsigned16): Add %dsp16().
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(parse_signed16): Add %lo16() and %hi16().
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(parse_lab_5_3): Make valuep a bfd_vma *.
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2005-07-18 Nick Clifton <nickc@redhat.com>
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* m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
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118
cpu/m32c.opc
118
cpu/m32c.opc
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unsigned long value;
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long have_zero = 0;
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if (strncasecmp (*strp, "%dsp8(", 6) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 6;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
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& result_type, & value);
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if (**strp != ')')
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return _("missing `)'");
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(*strp) ++;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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return _("%dsp8() takes a symbolic address, not a number");
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}
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*valuep = value;
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return errmsg;
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}
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if (strncmp (*strp, "0x0", 3) == 0
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|| (**strp == '0' && *(*strp + 1) != 'x'))
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have_zero = 1;
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{
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const char *errmsg = 0;
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signed long value;
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if (strncasecmp (*strp, "%hi8(", 5) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 5;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
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& result_type, & value);
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if (**strp != ')')
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return _("missing `)'");
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(*strp) ++;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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value >>= 16;
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}
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*valuep = value;
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return errmsg;
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}
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PARSE_SIGNED;
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if (value <= 255 && value > 127)
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@ -221,7 +265,29 @@ parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
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const char *errmsg = 0;
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unsigned long value;
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long have_zero = 0;
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if (strncasecmp (*strp, "%dsp16(", 7) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 7;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
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& result_type, & value);
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if (**strp != ')')
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return _("missing `)'");
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(*strp) ++;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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return _("%dsp16() takes a symbolic address, not a number");
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}
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*valuep = value;
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return errmsg;
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}
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/* Don't successfully parse literals beginning with '['. */
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if (**strp == '[')
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return "Invalid literal"; /* Anything -- will not be seen. */
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@ -259,6 +325,50 @@ parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
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const char *errmsg = 0;
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signed long value;
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if (strncasecmp (*strp, "%lo16(", 6) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 6;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
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& result_type, & value);
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if (**strp != ')')
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return _("missing `)'");
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(*strp) ++;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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value &= 0xffff;
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}
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*valuep = value;
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return errmsg;
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}
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if (strncasecmp (*strp, "%hi16(", 6) == 0)
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *errmsg;
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*strp += 6;
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errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
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& result_type, & value);
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if (**strp != ')')
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return _("missing `)'");
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(*strp) ++;
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if (errmsg == NULL
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&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
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{
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value >>= 16;
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}
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*valuep = value;
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return errmsg;
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}
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PARSE_SIGNED;
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if (value <= 65535 && value > 32767)
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@ -380,10 +490,10 @@ parse_lab_5_3 (CGEN_CPU_DESC cd,
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int opindex ATTRIBUTE_UNUSED,
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int opinfo,
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enum cgen_parse_operand_result *type_addr,
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unsigned long *valuep)
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bfd_vma *valuep)
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{
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const char *errmsg = 0;
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unsigned long value;
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bfd_vma value;
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enum cgen_parse_operand_result op_res;
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errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
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@ -1,3 +1,9 @@
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2005-07-25 DJ Delorie <dj@redhat.com>
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* config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands.
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Support %mod() modifiers from opcodes.
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* doc/c-m32c.texi (M32C-Modifiers): New section.
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2005-07-25 Jan Hubicka <jh@suse.cz>
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H.J. Lu <hongjiu.lu@intel.com>
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@ -738,6 +738,27 @@ md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
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int offset;
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} op_reloc_table[] = {
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/* Absolute relocs for 8-bit fields. */
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{ M32C_OPERAND_IMM_8_QI, BFD_RELOC_8, 1 },
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{ M32C_OPERAND_IMM_16_QI, BFD_RELOC_8, 2 },
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{ M32C_OPERAND_IMM_24_QI, BFD_RELOC_8, 3 },
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{ M32C_OPERAND_IMM_32_QI, BFD_RELOC_8, 4 },
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{ M32C_OPERAND_IMM_40_QI, BFD_RELOC_8, 5 },
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{ M32C_OPERAND_IMM_48_QI, BFD_RELOC_8, 6 },
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{ M32C_OPERAND_IMM_56_QI, BFD_RELOC_8, 7 },
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{ M32C_OPERAND_DSP_8_S8, BFD_RELOC_8, 1 },
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{ M32C_OPERAND_DSP_16_S8, BFD_RELOC_8, 2 },
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{ M32C_OPERAND_DSP_24_S8, BFD_RELOC_8, 3 },
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{ M32C_OPERAND_DSP_32_S8, BFD_RELOC_8, 4 },
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{ M32C_OPERAND_DSP_40_S8, BFD_RELOC_8, 5 },
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{ M32C_OPERAND_DSP_48_S8, BFD_RELOC_8, 6 },
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{ M32C_OPERAND_DSP_8_U8, BFD_RELOC_8, 1 },
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{ M32C_OPERAND_DSP_16_U8, BFD_RELOC_8, 2 },
|
||||
{ M32C_OPERAND_DSP_24_U8, BFD_RELOC_8, 3 },
|
||||
{ M32C_OPERAND_DSP_32_U8, BFD_RELOC_8, 4 },
|
||||
{ M32C_OPERAND_DSP_40_U8, BFD_RELOC_8, 5 },
|
||||
{ M32C_OPERAND_DSP_48_U8, BFD_RELOC_8, 6 },
|
||||
|
||||
/* Absolute relocs for 16-bit fields. */
|
||||
{ M32C_OPERAND_IMM_16_HI, BFD_RELOC_16, 2 },
|
||||
{ M32C_OPERAND_IMM_24_HI, BFD_RELOC_16, 3 },
|
||||
|
@ -777,6 +798,11 @@ md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
|
|||
{
|
||||
fixP->fx_where += or->offset;
|
||||
fixP->fx_size -= or->offset;
|
||||
|
||||
if (fixP->fx_cgen.opinfo
|
||||
&& fixP->fx_cgen.opinfo != BFD_RELOC_NONE)
|
||||
return fixP->fx_cgen.opinfo;
|
||||
|
||||
return or->reloc;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -21,6 +21,7 @@ change the default to the M32C microprocessor.
|
|||
|
||||
@menu
|
||||
* M32C-Opts:: M32C Options
|
||||
* M32C-Modifiers:: Symbolic Operand Modifiers
|
||||
@end menu
|
||||
|
||||
@node M32C-Opts
|
||||
|
@ -46,3 +47,70 @@ Assemble M32C instructions.
|
|||
Assemble M16C instructions (default).
|
||||
|
||||
@end table
|
||||
|
||||
@node M32C-Modifiers
|
||||
@section Symbolic Operand Modifiers
|
||||
|
||||
@cindex M32C modifiers
|
||||
@cindex syntax, M32C
|
||||
|
||||
The assembler supports several modifiers when using symbol addresses
|
||||
in M32C instruction operands. The general syntax is the following:
|
||||
|
||||
@smallexample
|
||||
%modifier(symbol)
|
||||
@end smallexample
|
||||
|
||||
@table @code
|
||||
@cindex symbol modifiers
|
||||
|
||||
@item %dsp8
|
||||
@itemx %dsp16
|
||||
|
||||
These modifiers override the assembler's assumptions about how big a
|
||||
symbol's address is. Normally, when it sees an operand like
|
||||
@samp{sym[a0]} it assumes @samp{sym} may require the widest
|
||||
displacement field (16 bits for @samp{-m16c}, 24 bits for
|
||||
@samp{-m32c}). These modifiers tell it to assume the address will fit
|
||||
in an 8 or 16 bit (respectively) unsigned displacement. Note that, of
|
||||
course, if it doesn't actually fit you will get linker errors. Example:
|
||||
|
||||
@smallexample
|
||||
mov.w %dsp8(sym)[a0],r1
|
||||
mov.b #0,%dsp8(sym)[a0]
|
||||
@end smallexample
|
||||
|
||||
@item %hi8
|
||||
|
||||
This modifier allows you to load bits 16 through 23 of a 24 bit
|
||||
address into an 8 bit register. This is useful with, for example, the
|
||||
M16C @samp{smovf} instruction, which expects a 20 bit address in
|
||||
@samp{r1h} and @samp{a0}. Example:
|
||||
|
||||
@smallexample
|
||||
mov.b #%hi8(sym),r1h
|
||||
mov.w #%lo16(sym),a0
|
||||
smovf.b
|
||||
@end smallexample
|
||||
|
||||
@item %lo16
|
||||
|
||||
Likewise, this modifier allows you to load bits 0 through 15 of a 24
|
||||
bit address into a 16 bit register.
|
||||
|
||||
@item %hi16
|
||||
|
||||
This modifier allows you to load bits 16 through 31 of a 32 bit
|
||||
address into a 16 bit register. While the M32C family only has 24
|
||||
bits of address space, it does support addresses in pairs of 16 bit
|
||||
registers (like @samp{a1a0} for the @samp{lde} instruction). This
|
||||
modifier is for loading the upper half in such cases. Example:
|
||||
|
||||
@smallexample
|
||||
mov.w #%hi16(sym),a1
|
||||
mov.w #%lo16(sym),a0
|
||||
@dots{}
|
||||
lde.w [a1a0],r1
|
||||
@end smallexample
|
||||
|
||||
@end table
|
||||
|
|
|
@ -1,3 +1,7 @@
|
|||
2005-07-25 DJ Delorie <dj@redhat.com>
|
||||
|
||||
* m32c.h: Add R_M32C_8, R_M32C_LO16, R_M32C_HI8, and R_M32C_HI16.
|
||||
|
||||
2005-07-25 Jan Hubicka <jh@suse.cz>
|
||||
|
||||
* x86-64.h (SHN_X86_64_LCOMMON): New.
|
||||
|
|
|
@ -30,6 +30,16 @@ along with this program; if not, write to the Free Software Foundation, Inc.,
|
|||
RELOC_NUMBER (R_M32C_32, 3)
|
||||
RELOC_NUMBER (R_M32C_8_PCREL, 4)
|
||||
RELOC_NUMBER (R_M32C_16_PCREL, 5)
|
||||
|
||||
/* 8 bit unsigned address, used for dsp8[a0] etc */
|
||||
RELOC_NUMBER (R_M32C_8, 6)
|
||||
/* Bits 0..15 of an address, for SMOVF's A0, A1A0, etc. */
|
||||
RELOC_NUMBER (R_M32C_LO16, 7)
|
||||
/* Bits 16..23 of an address, for SMOVF's R1H etc. */
|
||||
RELOC_NUMBER (R_M32C_HI8, 8)
|
||||
/* Bits 16..31 of an address, for LDE's A1A0 etc. */
|
||||
RELOC_NUMBER (R_M32C_HI16, 9)
|
||||
|
||||
END_RELOC_NUMBERS (R_M32C_max)
|
||||
|
||||
#define EF_M32C_CPU_M16C 0x00000075 /* default */
|
||||
|
|
|
@ -1,3 +1,8 @@
|
|||
2005-07-25 DJ Delorie <dj@redhat.com>
|
||||
|
||||
* m32c-asm.c Regenerate.
|
||||
* m32c-dis.c Regenerate.
|
||||
|
||||
2005-07-20 DJ Delorie <dj@redhat.com>
|
||||
|
||||
* disassemble.c (disassemble_init_for_target): M32C ISAs are
|
||||
|
|
|
@ -127,6 +127,28 @@ parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp,
|
|||
unsigned long value;
|
||||
long have_zero = 0;
|
||||
|
||||
if (strncasecmp (*strp, "%dsp8(", 6) == 0)
|
||||
{
|
||||
enum cgen_parse_operand_result result_type;
|
||||
bfd_vma value;
|
||||
const char *errmsg;
|
||||
|
||||
*strp += 6;
|
||||
errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8,
|
||||
& result_type, & value);
|
||||
if (**strp != ')')
|
||||
return _("missing `)'");
|
||||
(*strp) ++;
|
||||
|
||||
if (errmsg == NULL
|
||||
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
|
||||
{
|
||||
return _("%dsp8() takes a symbolic address, not a number");
|
||||
}
|
||||
*valuep = value;
|
||||
return errmsg;
|
||||
}
|
||||
|
||||
if (strncmp (*strp, "0x0", 3) == 0
|
||||
|| (**strp == '0' && *(*strp + 1) != 'x'))
|
||||
have_zero = 1;
|
||||
|
@ -175,7 +197,29 @@ parse_signed8 (CGEN_CPU_DESC cd, const char **strp,
|
|||
{
|
||||
const char *errmsg = 0;
|
||||
signed long value;
|
||||
|
||||
|
||||
if (strncasecmp (*strp, "%hi8(", 5) == 0)
|
||||
{
|
||||
enum cgen_parse_operand_result result_type;
|
||||
bfd_vma value;
|
||||
const char *errmsg;
|
||||
|
||||
*strp += 5;
|
||||
errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8,
|
||||
& result_type, & value);
|
||||
if (**strp != ')')
|
||||
return _("missing `)'");
|
||||
(*strp) ++;
|
||||
|
||||
if (errmsg == NULL
|
||||
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
|
||||
{
|
||||
value >>= 16;
|
||||
}
|
||||
*valuep = value;
|
||||
return errmsg;
|
||||
}
|
||||
|
||||
PARSE_SIGNED;
|
||||
|
||||
if (value <= 255 && value > 127)
|
||||
|
@ -195,7 +239,29 @@ parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp,
|
|||
const char *errmsg = 0;
|
||||
unsigned long value;
|
||||
long have_zero = 0;
|
||||
|
||||
|
||||
if (strncasecmp (*strp, "%dsp16(", 7) == 0)
|
||||
{
|
||||
enum cgen_parse_operand_result result_type;
|
||||
bfd_vma value;
|
||||
const char *errmsg;
|
||||
|
||||
*strp += 7;
|
||||
errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16,
|
||||
& result_type, & value);
|
||||
if (**strp != ')')
|
||||
return _("missing `)'");
|
||||
(*strp) ++;
|
||||
|
||||
if (errmsg == NULL
|
||||
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
|
||||
{
|
||||
return _("%dsp16() takes a symbolic address, not a number");
|
||||
}
|
||||
*valuep = value;
|
||||
return errmsg;
|
||||
}
|
||||
|
||||
/* Don't successfully parse literals beginning with '['. */
|
||||
if (**strp == '[')
|
||||
return "Invalid literal"; /* Anything -- will not be seen. */
|
||||
|
@ -233,6 +299,50 @@ parse_signed16 (CGEN_CPU_DESC cd, const char **strp,
|
|||
const char *errmsg = 0;
|
||||
signed long value;
|
||||
|
||||
if (strncasecmp (*strp, "%lo16(", 6) == 0)
|
||||
{
|
||||
enum cgen_parse_operand_result result_type;
|
||||
bfd_vma value;
|
||||
const char *errmsg;
|
||||
|
||||
*strp += 6;
|
||||
errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16,
|
||||
& result_type, & value);
|
||||
if (**strp != ')')
|
||||
return _("missing `)'");
|
||||
(*strp) ++;
|
||||
|
||||
if (errmsg == NULL
|
||||
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
|
||||
{
|
||||
value &= 0xffff;
|
||||
}
|
||||
*valuep = value;
|
||||
return errmsg;
|
||||
}
|
||||
|
||||
if (strncasecmp (*strp, "%hi16(", 6) == 0)
|
||||
{
|
||||
enum cgen_parse_operand_result result_type;
|
||||
bfd_vma value;
|
||||
const char *errmsg;
|
||||
|
||||
*strp += 6;
|
||||
errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16,
|
||||
& result_type, & value);
|
||||
if (**strp != ')')
|
||||
return _("missing `)'");
|
||||
(*strp) ++;
|
||||
|
||||
if (errmsg == NULL
|
||||
&& result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
|
||||
{
|
||||
value >>= 16;
|
||||
}
|
||||
*valuep = value;
|
||||
return errmsg;
|
||||
}
|
||||
|
||||
PARSE_SIGNED;
|
||||
|
||||
if (value <= 65535 && value > 32767)
|
||||
|
@ -354,10 +464,10 @@ parse_lab_5_3 (CGEN_CPU_DESC cd,
|
|||
int opindex ATTRIBUTE_UNUSED,
|
||||
int opinfo,
|
||||
enum cgen_parse_operand_result *type_addr,
|
||||
unsigned long *valuep)
|
||||
bfd_vma *valuep)
|
||||
{
|
||||
const char *errmsg = 0;
|
||||
unsigned long value;
|
||||
bfd_vma value;
|
||||
enum cgen_parse_operand_result op_res;
|
||||
|
||||
errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3,
|
||||
|
|
|
@ -1229,7 +1229,7 @@ print_insn_m32c (bfd_vma pc, disassemble_info *info)
|
|||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* If we haven't initialized yet, initialize the opcode table. */
|
||||
if (! cd)
|
||||
|
|
Loading…
Reference in New Issue