* mips-dis.c: Updated to account for name changes in new version
of opcode/mips.h. * Makefile.in: Added header file dependencies.
This commit is contained in:
Ian Lance Taylor
parent
05166a28a4
commit
fde326fbc9
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@ -1,3 +1,9 @@
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Tue Jul 6 15:18:37 1993 Ian Lance Taylor (ian@cygnus.com)
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* mips-dis.c: Updated to account for name changes in new version
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of opcode/mips.h.
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* Makefile.in: Added header file dependencies.
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Sat Jul 3 23:47:56 1993 Doug Evans (dje@canuck.cygnus.com)
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* h8300-dis.c (bfd_h8_disassemble): Correct fetching of instruction.
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@ -53,9 +53,9 @@ BISON = bison
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MAKEINFO = makeinfo
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RANLIB = ranlib
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INCDIR = $(srcdir)/../include
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INCDIR = $(srcdir)/../include
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BFDDIR = $(srcdir)/../bfd
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CSEARCH = -I. -I$(srcdir) -I../include -I$(INCDIR) -I$(BFDDIR)
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CSEARCH = -I. -I$(srcdir) -I../bfd -I$(INCDIR) -I$(BFDDIR)
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DEP = mkdep
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@ -112,22 +112,22 @@ $(TARGETLIB): $(OFILES)
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$(AR) $(AR_FLAGS) $(TARGETLIB) $(OFILES)
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$(RANLIB) $(TARGETLIB)
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# Circumvent Sun Make bug with VPATH.
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a29k-dis.o: a29k-dis.c
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dis-buf.o: dis-buf.c
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h8500-dis.o: h8500-dis.c
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h8300-dis.o: h8300-dis.c
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i386-dis.o: i386-dis.c
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i960-dis.o: i960-dis.c
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m68881-ext.o: m68881-ext.c
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m68k-dis.o: m68k-dis.c
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mips-dis.o: mips-dis.c
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sparc-dis.o: sparc-dis.c
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sparc-opc.o: sparc-opc.c
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z8k-dis.o: z8k-dis.c
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sh-dis.o: sh-dis.c
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alpha-dis.o: alpha-dis.c
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hppa-dis.o: hppa-dis.c $(srcdir)/../include/opcode/hppa.h
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a29k-dis.o: a29k-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/a29k.h
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dis-buf.o: dis-buf.c $(INCDIR)/dis-asm.h
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h8500-dis.o: h8500-dis.c h8500-opc.h $(INCDIR)/dis-asm.h
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h8300-dis.o: h8300-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/h8300.h
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i386-dis.o: i386-dis.c $(INCDIR)/dis-asm.h
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i960-dis.o: i960-dis.c $(INCDIR)/dis-asm.h
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m68881-ext.o: m68881-ext.c $(INCDIR)/ieee-float.h
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m68k-dis.o: m68k-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/ieee-float.h \
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$(INCDIR)/opcode/m68k.h
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mips-dis.o: mips-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/mips.h
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sparc-dis.o: sparc-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/sparc.h
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sparc-opc.o: sparc-opc.c $(INCDIR)/opcode/sparc.h
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z8k-dis.o: z8k-dis.c z8k-opc.h $(INCDIR)/dis-asm.h
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sh-dis.o: sh-dis.c sh-opc.h $(INCDIR)/dis-asm.h
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alpha-dis.o: alpha-dis.c alpha-opc.h $(INCDIR)/dis-asm.h
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hppa-dis.o: hppa-dis.c $(INCDIR)/dis-asm.h $(INCDIR)/opcode/hppa.h
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tags etags: TAGS
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@ -26,21 +26,8 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* FIXME: we need direct access to the swapping functions. */
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#include "libbfd.h"
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/* We use bfd_vma in a couple of places where gdb expects CORE_ADDR. */
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#ifdef HOST_64_BIT
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#error FIXME: bfd_vma will not match gdb expectations
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#endif
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/* This file is used both by gdb and by objdump. A program which
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wants to use this code must provide an external function
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print_address. */
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extern int print_address PARAMS ((bfd_vma, FILE *));
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/* Mips instructions are never longer than this many bytes. */
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#define MAXLEN 4
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/* Number of elements in the opcode table. */
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#define NOPCODES (sizeof mips_opcodes / sizeof mips_opcodes[0])
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/* FIXME: This should be shared with gdb somehow. */
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#define REGISTER_NAMES \
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@ -67,6 +54,8 @@ print_insn_arg (d, l, pc, info)
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bfd_vma pc;
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struct disassemble_info *info;
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{
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int delta;
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switch (*d)
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{
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case ',':
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@ -76,34 +65,48 @@ print_insn_arg (d, l, pc, info)
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break;
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case 's':
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case 'b':
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case 'r':
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case 'v':
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(*info->fprintf_func) (info->stream, "$%s",
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reg_names[(l >> OP_SH_RS) & OP_MASK_RS]);
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break;
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case 't':
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case 'w':
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(*info->fprintf_func) (info->stream, "$%s",
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reg_names[(l >> OP_SH_RT) & OP_MASK_RT]);
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break;
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case 'i':
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case 'u':
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(*info->fprintf_func) (info->stream, "%d",
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(l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE);
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break;
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case 'j': /* same as i, but sign-extended */
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case 'o':
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delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
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if (delta & 0x8000)
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delta |= ~0xffff;
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(*info->fprintf_func) (info->stream, "%d",
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(l >> OP_SH_DELTA) & OP_MASK_DELTA);
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delta);
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break;
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case 'a':
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print_address (((pc & 0xF0000000)
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| (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)),
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info->stream);
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(*info->print_address_func)
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(((pc & 0xF0000000) | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)),
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info);
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break;
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case 'b':
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print_address ((((l >> OP_SH_DELTA) & OP_MASK_DELTA) << 2) + pc + 4,
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info->stream);
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case 'p':
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/* sign extend the displacement */
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delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
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if (delta & 0x8000)
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delta |= ~0xffff;
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(*info->print_address_func)
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((delta << 2) + pc + 4,
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info);
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break;
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case 'd':
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@ -111,22 +114,34 @@ print_insn_arg (d, l, pc, info)
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reg_names[(l >> OP_SH_RD) & OP_MASK_RD]);
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break;
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case 'h':
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case '<':
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(*info->fprintf_func) (info->stream, "0x%x",
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(l >> OP_SH_SHAMT) & OP_MASK_SHAMT);
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break;
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case 'B':
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case 'c':
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(*info->fprintf_func) (info->stream, "0x%x",
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(l >> OP_SH_CODE) & OP_MASK_CODE);
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break;
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case 'C':
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(*info->fprintf_func) (info->stream, "0x%x",
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(l >> OP_SH_COPZ) & OP_MASK_COPZ);
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break;
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case 'B':
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(*info->fprintf_func) (info->stream, "0x%x",
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(l >> OP_SH_SYSCALL) & OP_MASK_SYSCALL);
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break;
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case 'S':
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case 'V':
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(*info->fprintf_func) (info->stream, "$f%d",
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(l >> OP_SH_FS) & OP_MASK_FS);
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break;
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case 'T':
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case 'W':
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(*info->fprintf_func) (info->stream, "$f%d",
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(l >> OP_SH_FT) & OP_MASK_FT);
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break;
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@ -136,6 +151,16 @@ print_insn_arg (d, l, pc, info)
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(l >> OP_SH_FD) & OP_MASK_FD);
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break;
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case 'E':
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(*info->fprintf_func) (info->stream, "$%d",
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(l >> OP_SH_RT) & OP_MASK_RT);
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break;
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case 'G':
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(*info->fprintf_func) (info->stream, "$%d",
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(l >> OP_SH_RD) & OP_MASK_RD);
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break;
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default:
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(*info->fprintf_func) (info->stream,
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"# internal error, undefined modifier(%c)", *d);
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@ -157,16 +182,19 @@ _print_insn_mips (memaddr, word, info)
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register int i;
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register char *d;
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for (i = 0; i < NOPCODES; i++)
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for (i = 0; i < NUMOPCODES; i++)
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{
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register unsigned int opcode = mips_opcodes[i].opcode;
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register unsigned int match = mips_opcodes[i].match;
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if ((word & match) == opcode)
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break;
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if (mips_opcodes[i].pinfo != INSN_MACRO)
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{
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register unsigned int match = mips_opcodes[i].match;
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register unsigned int mask = mips_opcodes[i].mask;
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if ((word & mask) == match)
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break;
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}
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}
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/* Handle undefined instructions. */
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if (i == NOPCODES)
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if (i == NUMOPCODES)
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{
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(*info->fprintf_func) (info->stream, "0x%x", word);
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return 4;
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