gas: PR 25863: Fix scalar vmul inside it block when assembling for MVE
This fixes PR 25863 by fixing the condition in the parsing of vmul in do_mve_vmull. It also simplifies the code in there fixing latent issues that would lead to NEON code being accepted when it shouldn't. gas/ChangeLog: 2020-05-04 Andre Vieira <andre.simoesdiasvieira@arm.com> PR gas/25863 * config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul. * testsuite/gas/arm/mve-scalar-vmult-it.d: New test. * testsuite/gas/arm/mve-scalar-vmult-it.s: New test.
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2020-05-04 Andre Vieira <andre.simoesdiasvieira@arm.com>
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PR gas/25863
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* config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul.
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* testsuite/gas/arm/mve-scalar-vmult-it.d: New test.
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* testsuite/gas/arm/mve-scalar-vmult-it.s: New test.
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2020-05-04 Nick Clifton <nickc@redhat.com>
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PR 25917
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@ -18273,19 +18273,13 @@ do_mve_vmull (void)
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enum neon_shape rs = neon_select_shape (NS_HHH, NS_FFF, NS_DDD, NS_DDS,
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NS_QQS, NS_QQQ, NS_QQR, NS_NULL);
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if (!ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext)
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&& inst.cond == COND_ALWAYS
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if (inst.cond == COND_ALWAYS
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&& ((unsigned)inst.instruction) == M_MNEM_vmullt)
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{
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if (rs == NS_QQQ)
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{
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struct neon_type_el et = neon_check_type (3, rs, N_EQK , N_EQK,
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N_SUF_32 | N_F64 | N_P8
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| N_P16 | N_I_MVE | N_KEY);
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if (((et.type == NT_poly) && et.size == 8
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&& ARM_CPU_IS_ANY (cpu_variant))
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|| (et.type == NT_integer) || (et.type == NT_float))
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if (!ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext))
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goto neon_vmul;
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}
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else
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# name: Armv8.1-M Mainline scalar vmul instructions in it blocks (with MVE)
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# as: -march=armv8.1-m.main+mve.fp+fp.dp
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# objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main
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.*: +file format .*arm.*
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Disassembly of section .text:
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[^>]*> bfbc itt lt
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[^>]*> ee20 0a81 vmullt.f32 s0, s1, s2
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[^>]*> ee21 0b02 vmullt.f64 d0, d1, d2
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#...
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@ -0,0 +1,5 @@
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.syntax unified
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.text
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itt lt
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vmullt.f32 s0, s1, s2
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vmullt.f64 d0, d1, d2
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