Remove h8300-coff support

include/
	* coff/h8300.h: Delete.
bfd/
	* Makefile.am: Remove h8300-coff support.
	* coffcode.h: Likewise.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* reloc16.c: Likewise.
	* targets.c: Likewise.
	* coff-h8300.c: Delete.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
binutils/
	* testsuite/binutils-all/objcopy.exp: Remove h8300-coff support.
gas/
	* config/obj-coff.h: Remove h8300-coff support.
	* config/tc-h8300.c: Likewise.
	* config/tc-h8300.h: Likewise.
	* testsuite/gas/h8300/h8300.exp: Likewise.
	* testsuite/gas/h8300/branch-coff.s: Delete.
	* testsuite/gas/h8300/branchh-coff.s: Delete.
	* testsuite/gas/h8300/branchs-coff.s: Delete.
	* testsuite/gas/h8300/ffxx1-coff.d: Delete.
	* testsuite/gas/h8300/ffxx1-coff.s: Delete.
	* testsuite/gas/h8300/h8300-coff.exp: Delete.
ld/
	* Makefile.am: Remove h8300-coff support.
	* configure.tgt: Likewise.
	* testsuite/ld-h8300/h8300.exp: Likewise.
	* emulparams/h8300.sh: Delete.
	* emulparams/h8300h.sh: Delete.
	* emulparams/h8300hn.sh: Delete.
	* emulparams/h8300s.sh: Delete.
	* emulparams/h8300sn.sh: Delete.
	* emulparams/h8300sx.sh: Delete.
	* emulparams/h8300sxn.sh: Delete.
	* scripttempl/h8300.sc: Delete.
	* scripttempl/h8300h.sc: Delete.
	* scripttempl/h8300hn.sc: Delete.
	* scripttempl/h8300s.sc: Delete.
	* scripttempl/h8300sn.sc: Delete.
	* scripttempl/h8300sx.sc: Delete.
	* scripttempl/h8300sxn.sc: Delete.
	* testsuite/ld-h8300/relax-3-coff.d: Delete.
	* testsuite/ld-h8300/relax-4-coff.d: Delete.
	* testsuite/ld-h8300/relax-5-coff.d: Delete.
	* testsuite/ld-h8300/relax-6-coff.d: Delete.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
This commit is contained in:
Alan Modra 2018-04-16 15:17:57 +09:30
parent fdef394344
commit fe0bf0fd57
50 changed files with 74 additions and 2992 deletions

View File

@ -1,3 +1,16 @@
2018-04-16 Alan Modra <amodra@gmail.com>
* Makefile.am: Remove h8300-coff support.
* coffcode.h: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* reloc16.c: Likewise.
* targets.c: Likewise.
* coff-h8300.c: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
2018-04-16 Alan Modra <amodra@gmail.com>
* Makefile.am: Remove IEEE 695 support.

View File

@ -281,7 +281,6 @@ BFD32_BACKENDS = \
coff-arm.lo \
coff-aux.lo \
coff-go32.lo \
coff-h8300.lo \
coff-h8500.lo \
coff-i386.lo \
coff-m68k.lo \
@ -465,7 +464,6 @@ BFD32_BACKENDS_CFILES = \
coff-arm.c \
coff-aux.c \
coff-go32.c \
coff-h8300.c \
coff-h8500.c \
coff-i386.c \
coff-m68k.c \

View File

@ -615,7 +615,6 @@ BFD32_BACKENDS = \
coff-arm.lo \
coff-aux.lo \
coff-go32.lo \
coff-h8300.lo \
coff-h8500.lo \
coff-i386.lo \
coff-m68k.lo \
@ -799,7 +798,6 @@ BFD32_BACKENDS_CFILES = \
coff-arm.c \
coff-aux.c \
coff-go32.c \
coff-h8300.c \
coff-h8500.c \
coff-i386.c \
coff-m68k.c \
@ -1314,7 +1312,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-aux.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-bfd.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-go32.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-h8300.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-h8500.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-i386.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-m68k.Plo@am__quote@

File diff suppressed because it is too large Load Diff

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@ -2285,51 +2285,6 @@ coff_set_arch_mach_hook (bfd *abfd, void * filehdr)
break;
#endif
#ifdef H8300MAGIC
case H8300MAGIC:
arch = bfd_arch_h8300;
machine = bfd_mach_h8300;
/* !! FIXME this probably isn't the right place for this. */
abfd->flags |= BFD_IS_RELAXABLE;
break;
#endif
#ifdef H8300HMAGIC
case H8300HMAGIC:
arch = bfd_arch_h8300;
machine = bfd_mach_h8300h;
/* !! FIXME this probably isn't the right place for this. */
abfd->flags |= BFD_IS_RELAXABLE;
break;
#endif
#ifdef H8300SMAGIC
case H8300SMAGIC:
arch = bfd_arch_h8300;
machine = bfd_mach_h8300s;
/* !! FIXME this probably isn't the right place for this. */
abfd->flags |= BFD_IS_RELAXABLE;
break;
#endif
#ifdef H8300HNMAGIC
case H8300HNMAGIC:
arch = bfd_arch_h8300;
machine = bfd_mach_h8300hn;
/* !! FIXME this probably isn't the right place for this. */
abfd->flags |= BFD_IS_RELAXABLE;
break;
#endif
#ifdef H8300SNMAGIC
case H8300SNMAGIC:
arch = bfd_arch_h8300;
machine = bfd_mach_h8300sn;
/* !! FIXME this probably isn't the right place for this. */
abfd->flags |= BFD_IS_RELAXABLE;
break;
#endif
#ifdef SH_ARCH_MAGIC_BIG
case SH_ARCH_MAGIC_BIG:
case SH_ARCH_MAGIC_LITTLE:
@ -2888,20 +2843,6 @@ coff_set_flags (bfd * abfd,
return TRUE;
#endif
#ifdef H8300MAGIC
case bfd_arch_h8300:
switch (bfd_get_mach (abfd))
{
case bfd_mach_h8300: *magicp = H8300MAGIC; return TRUE;
case bfd_mach_h8300h: *magicp = H8300HMAGIC; return TRUE;
case bfd_mach_h8300s: *magicp = H8300SMAGIC; return TRUE;
case bfd_mach_h8300hn: *magicp = H8300HNMAGIC; return TRUE;
case bfd_mach_h8300sn: *magicp = H8300SNMAGIC; return TRUE;
default: break;
}
break;
#endif
#ifdef SH_ARCH_MAGIC_BIG
case bfd_arch_sh:
#ifdef COFF_IMAGE_WITH_PE

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@ -60,7 +60,6 @@ case $targ in
arm-epoc-pe* | \
arm*-*-aout | \
arm*-*-coff | \
h8300*-*-coff | \
h8500*-*-coff | \
i[3-7]86-*-sco3.2v5*coff | \
i[3-7]86-*-sysv4* | i[3-7]86-*-unixware* | \
@ -132,6 +131,7 @@ case $targ in
*-*-rtemscoff* | \
a29k-* | \
arm-*-oabi | \
h8300*-*-coff | \
hppa*-*-rtems* | \
i860-*-* | \
i960-*-* | \
@ -565,11 +565,6 @@ case "${targ}" in
targ_defvec=h8300_elf32_linux_vec
;;
h8300*-*-*)
targ_defvec=h8300_coff_vec
targ_underscore=yes
;;
h8500-*-*)
targ_defvec=h8500_coff_vec
targ_underscore=yes

1
bfd/configure vendored
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@ -14392,7 +14392,6 @@ do
fr30_elf32_vec) tb="$tb elf32-fr30.lo elf32.lo $elf" ;;
frv_elf32_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;;
frv_elf32_fdpic_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;;
h8300_coff_vec) tb="$tb coff-h8300.lo reloc16.lo $coffgen" ;;
h8300_elf32_vec) tb="$tb elf32-h8300.lo elf32.lo $elf" ;;
h8300_elf32_linux_vec) tb="$tb elf32-h8300.lo elf32.lo $elf" ;;
h8500_coff_vec) tb="$tb coff-h8500.lo reloc16.lo $coffgen" ;;

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@ -469,7 +469,6 @@ do
fr30_elf32_vec) tb="$tb elf32-fr30.lo elf32.lo $elf" ;;
frv_elf32_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;;
frv_elf32_fdpic_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;;
h8300_coff_vec) tb="$tb coff-h8300.lo reloc16.lo $coffgen" ;;
h8300_elf32_vec) tb="$tb elf32-h8300.lo elf32.lo $elf" ;;
h8300_elf32_linux_vec) tb="$tb elf32-h8300.lo elf32.lo $elf" ;;
h8500_coff_vec) tb="$tb coff-h8500.lo reloc16.lo $coffgen" ;;

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@ -29,7 +29,6 @@ coff-arm.c
coff-aux.c
coff-bfd.c
coff-go32.c
coff-h8300.c
coff-h8500.c
coff-i386.c
coff-m68k.c

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@ -22,8 +22,7 @@
/* Most of this hacked by Steve Chamberlain <sac@cygnus.com>. */
/* These routines are used by coff-h8300 and coff-z8k to do
relocation.
/* These routines are used by coff-z8k to do relocation.
FIXME: This code should be rewritten to support the new COFF
linker. Basically, they need to deal with COFF relocs rather than

View File

@ -647,7 +647,6 @@ extern const bfd_target epiphany_elf32_vec;
extern const bfd_target fr30_elf32_vec;
extern const bfd_target frv_elf32_vec;
extern const bfd_target frv_elf32_fdpic_vec;
extern const bfd_target h8300_coff_vec;
extern const bfd_target h8300_elf32_vec;
extern const bfd_target h8300_elf32_linux_vec;
extern const bfd_target h8500_coff_vec;
@ -1057,7 +1056,6 @@ static const bfd_target * const _bfd_target_vector[] =
&frv_elf32_vec,
&frv_elf32_fdpic_vec,
&h8300_coff_vec,
&h8300_elf32_vec,
&h8300_elf32_linux_vec,
&h8500_coff_vec,

View File

@ -1,3 +1,7 @@
2018-04-16 Alan Modra <amodra@gmail.com>
* testsuite/binutils-all/objcopy.exp: Remove h8300-coff support.
2018-04-16 Alan Modra <amodra@gmail.com>
* Makefile.am: Remove IEEE 695 support.

View File

@ -77,7 +77,6 @@ proc objcopy_test {testname srcfile} {
# files in the first place, and may order things a little
# differently. Those systems should use setup_xfail here.
setup_xfail "h8300-*-coff"
setup_xfail "h8500-*-rtems*" "h8500-*-coff"
setup_xfail "hppa*-*-*"
setup_xfail "m68*-*-*coff" "m68*-*-hpux*" "m68*-*-lynxos*"

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@ -1,3 +1,16 @@
2018-04-16 Alan Modra <amodra@gmail.com>
* config/obj-coff.h: Remove h8300-coff support.
* config/tc-h8300.c: Likewise.
* config/tc-h8300.h: Likewise.
* testsuite/gas/h8300/h8300.exp: Likewise.
* testsuite/gas/h8300/branch-coff.s: Delete.
* testsuite/gas/h8300/branchh-coff.s: Delete.
* testsuite/gas/h8300/branchs-coff.s: Delete.
* testsuite/gas/h8300/ffxx1-coff.d: Delete.
* testsuite/gas/h8300/ffxx1-coff.s: Delete.
* testsuite/gas/h8300/h8300-coff.exp: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* app.c: Remove IEEE 695 support.

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@ -85,11 +85,6 @@
#define TARGET_FORMAT "coff-z8k"
#endif
#ifdef TC_H8300
#include "coff/h8300.h"
#define TARGET_FORMAT "coff-h8300"
#endif
#ifdef TC_H8500
#include "coff/h8500.h"
#define TARGET_FORMAT "coff-h8500"

View File

@ -28,10 +28,7 @@
#define h8_opcodes ops
#include "opcode/h8300.h"
#include "safe-ctype.h"
#ifdef OBJ_ELF
#include "elf/h8.h"
#endif
const char comment_chars[] = ";";
const char line_comment_chars[] = "#";
@ -212,12 +209,10 @@ const pseudo_typeS md_pseudo_table[] =
{"page", listing_eject, 0},
{"program", s_ignore, 0},
#ifdef OBJ_ELF
{"section", h8300_elf_section, 0},
{"section.s", h8300_elf_section, 0},
{"sect", h8300_elf_section, 0},
{"sect.s", h8300_elf_section, 0},
#endif
{0, 0, 0}
};
@ -1372,7 +1367,6 @@ do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode, cons
check_operand (operand, 0xffff, t);
bytes[0] |= operand->exp.X_add_number >> 8;
bytes[1] |= operand->exp.X_add_number >> 0;
#ifdef OBJ_ELF
/* MOVA needs both relocs to relax the second operand properly. */
if (relaxmode != 0
&& (OP_KIND(this_try->opcode->how) == O_MOVAB
@ -1382,7 +1376,6 @@ do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode, cons
idx = BFD_RELOC_16;
fix_new_exp (frag_now, offset, 2, &operand->exp, 0, idx);
}
#endif
break;
case L_24:
check_operand (operand, 0xffffff, t);
@ -1399,11 +1392,9 @@ do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode, cons
bytes[3] |= operand->exp.X_add_number >> 0;
if (relaxmode != 0)
{
#ifdef OBJ_ELF
if ((operand->mode & MODE) == DISP && relaxmode == 1)
idx = BFD_RELOC_H8_DISP32A16;
else
#endif
idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1;
fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
}
@ -1418,12 +1409,9 @@ do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode, cons
case L_32:
size = 4;
where = (operand->mode & SIZE) == L_24 ? -1 : 0;
#ifdef OBJ_ELF
if ((operand->mode & MODE) == DISP && relaxmode == 1)
idx = BFD_RELOC_H8_DISP32A16;
else
#endif
if (relaxmode == 2)
else if (relaxmode == 2)
idx = R_MOV24B1;
else if (relaxmode == 1)
idx = R_MOVL1;
@ -1656,17 +1644,9 @@ build_bytes (const struct h8_instruction *this_try, struct h8_op *operand)
int x_mode = x & MODE;
if (x_mode == IMM || x_mode == DISP)
{
#ifndef OBJ_ELF
/* Remove MEMRELAX flag added in h8300.h on mov with
addressing mode "register indirect with displacement". */
if (x_mode == DISP)
x &= ~MEMRELAX;
#endif
do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2,
op_at[i] & 1, operand + i, (x & MEMRELAX) != 0,
this_try);
}
do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2,
op_at[i] & 1, operand + i, (x & MEMRELAX) != 0,
this_try);
else if (x_mode == ABS)
do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2,
op_at[i] & 1, operand + i,
@ -1685,14 +1665,6 @@ build_bytes (const struct h8_instruction *this_try, struct h8_op *operand)
if (operand[i].exp.X_add_number & 1)
as_warn (_("branch operand has odd offset (%lx)\n"),
(unsigned long) operand->exp.X_add_number);
#ifndef OBJ_ELF
/* The COFF port has always been off by one, changing it
now would be an incompatible change, so we leave it as-is.
We don't want to do this for ELF as we want to be
compatible with the proposed ELF format from Hitachi. */
operand[i].exp.X_add_number -= 1;
#endif
if (size16)
{
operand[i].exp.X_add_number =
@ -1744,7 +1716,6 @@ build_bytes (const struct h8_instruction *this_try, struct h8_op *operand)
int where = 0;
bfd_reloc_code_real_type reloc_type = R_JMPL1;
#ifdef OBJ_ELF
/* To be compatible with the proposed H8 ELF format, we
want the relocation's offset to point to the first byte
that will be modified, not to the start of the instruction. */
@ -1756,7 +1727,6 @@ build_bytes (const struct h8_instruction *this_try, struct h8_op *operand)
}
else
where = 1;
#endif
/* This jmp may be a jump or a branch. */

View File

@ -26,7 +26,6 @@
/* Fixup debug sections since we will never relax them. */
#define TC_LINKRELAX_FIXUP(seg) (seg->flags & SEC_ALLOC)
#ifdef OBJ_ELF
#ifndef TE_LINUX
#define TARGET_FORMAT "elf32-h8300"
#else
@ -35,18 +34,12 @@
#define LOCAL_LABEL_PREFIX '.'
#define LOCAL_LABEL(NAME) (NAME[0] == '.' && NAME[1] == 'L')
#define FAKE_LABEL_NAME ".L0\001"
#endif
struct fix;
struct internal_reloc;
#define WORKING_DOT_WORD
#define COFF_MAGIC ( Smode && Nmode ? 0x8304 : Hmode && Nmode ? 0x8303 : Smode ? 0x8302 : Hmode ? 0x8301 : 0x8300)
#define IGNORE_NONSTANDARD_ESCAPES
#define tc_coff_symbol_emit_hook(a) ; /* not used */
/* No shared lib support, so we don't need to ensure externally
visible symbols can be overridden. */
#define EXTERN_FORCE_RELOC 0
@ -55,11 +48,8 @@ struct internal_reloc;
#define DWARF2_LINE_MIN_INSN_LENGTH 2
#define DWARF2_USE_FIXED_ADVANCE_PC 0
#ifdef OBJ_ELF
/* Provide mappings from the original H8 COFF relocation names to
their corresponding BFD relocation names. This allows us to use
most of tc-h8300.c without modifications for both ELF and COFF
ports. */
their corresponding BFD relocation names. */
#define R_MOV24B1 BFD_RELOC_H8_DIR24A8
#define R_MOVL1 BFD_RELOC_H8_DIR32A16
#define R_RELLONG BFD_RELOC_32
@ -74,12 +64,8 @@ struct internal_reloc;
/* We do not want to adjust any relocations to make implementation of
linker relaxations easier. */
#define tc_fix_adjustable(FIX) 0
#endif
#define LISTING_HEADER "Renesas H8/300 GAS "
#ifndef OBJ_ELF
#define RELOC_32 1234
#endif
extern int Hmode;
extern int Smode;

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@ -1,10 +0,0 @@
.text
h8300_branches:
bsr h8300_branches
jmp h8300_branches
jmp @r0
jmp @@16:8
jsr h8300_branches
jsr @r0
jsr @@16:8

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@ -1,12 +0,0 @@
.h8300h
.text
h8300h_branches:
bsr h8300h_branches:8
bsr h8300h_branches:16
jmp h8300h_branches
jmp @er0
jmp @@16:8
jsr h8300h_branches
jsr @er0
jsr @@16:8

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@ -1,12 +0,0 @@
.h8300s
.text
h8300s_branches:
bsr h8300s_branches:8
bsr h8300s_branches:16
jmp h8300s_branches
jmp @er0
jmp @@16:8
jsr h8300s_branches
jsr @er0
jsr @@16:8

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@ -1,23 +0,0 @@
#objdump: --prefix-addresses -dr
#name: FFxx1
# Test for FFxx:8 addressing.
.*: file format .*h8300.*
Disassembly of section .text:
...
0: 16 main
0+0400 <main>.*mov.b #0x7f,r0l
0+0402 <.*>.*mov.b @0xbb:8,r0l
0+0404 <.*>.*mov.b r0l,@0xffb9:16
0+0408 <.*>.*mov.b #0x1,r0l
0+040a <loop>.*mov.b r0l,@0xffbb:16
0+040e <delay>.*mov.w #0x0,r1
0+0412 <deloop>.*adds #1,r1
0+0414 <.*>.*bne .0 \(0x416\)
415: DISP8 deloop[+]0xffffffff
0+0416 <.*>.*rotl.b r0l
0+0418 <.*>.*bra .0 \(0x41a\)
419: DISP8 loop[+]0xffffffff
...

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@ -1,20 +0,0 @@
.equ p6ddr, 0xffb9 ;0x7f for output
.equ p6dr, 0xffbb
.equ seed, 0x01
.text
.org 0
reset: .word main ;reset vector
;
.org 0x400
main: mov.b #0x7f,r0l ;port 6 ddr = 7F
mov.b @0xffbb:8,r0l ;***test***
mov.b r0l,@p6ddr:16
;
mov.b #seed,r0l ;start with 0000001
loop: mov.b r0l,@p6dr:16 ;output to port 6
delay: mov.w #0x0000,r1
deloop: adds #1,r1
bne deloop:8 ;not = 0
rotl r0l
bra loop:8
.word 0

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@ -1,299 +0,0 @@
# Copyright (C) 2012-2018 Free Software Foundation, Inc.
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
#
# Some H8/300 coff tests
#
proc do_h8300_cbranch {} {
set testname "cbranch.s: h8300 conditional branch tests"
set x 0
gas_start "cbranch.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
while 1 {
expect {
-re " +\[0-9\]+ 0000 4000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0002 4000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0004 4100\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0006 4100\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0008 4200\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000a 4300\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000c 4400\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000e 4400\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0010 4500\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0012 4500\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0014 4600\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0016 4700\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0018 4800\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 001a 4900\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 001c 4A00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 001e 4B00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0020 4C00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0022 4D00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0024 4E00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0026 4F00\[^\n\]*\n" { set x [expr $x+1] }
timeout { perror "timeout\n; break }
eof { break }
}
}
# This was intended to do any cleanup necessary. It kinda looks like it
# isn't needed, but just in case, please keep it in for now.
gas_finish
# Did we find what we were looking for? If not, flunk it.
if [expr $x == 20] then { pass $testname } else { fail $testname }
}
proc do_h8300_branch {} {
set testname "branch.s: h8300 branch tests"
set x 0
gas_start "branch-coff.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
while 1 {
expect {
-re " +\[0-9\]+ 0000 5500\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0002 5A000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0006 5900\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0008 5B00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000a 5E000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000e 5D00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0010 5F00\[^\n\]*\n" { set x [expr $x+1] }
timeout { perror "timeout\n; break }
eof { break }
}
}
# This was intended to do any cleanup necessary. It kinda looks like it
# isn't needed, but just in case, please keep it in for now.
gas_finish
# Did we find what we were looking for? If not, flunk it.
if [expr $x == 7] then { pass $testname } else { fail $testname }
}
proc do_h8300h_cbranch {} {
set testname "cbranchh.s: h8300h conditional branch tests"
set x 0
gas_start "cbranchh.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
while 1 {
expect {
-re " +\[0-9\]+ 0000 4000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0002 4000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0004 4100\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0006 4100\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0008 4200\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000a 4300\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000c 4400\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000e 4400\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0010 4500\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0012 4500\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0014 4600\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0016 4700\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0018 4800\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 001a 4900\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 001c 4A00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 001e 4B00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0020 4C00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0022 4D00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0024 4E00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0026 4F00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0028 58000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 002c 58000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0030 58100000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0034 58100000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0038 58200000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 003c 58300000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0040 58400000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0044 58400000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0048 58500000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 004c 58500000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0050 58600000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0054 58700000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0058 58800000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 005c 58900000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0060 58A00000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0064 58B00000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0068 58C00000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 006c 58D00000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0070 58E00000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0074 58F00000\[^\n\]*\n" { set x [expr $x+1] }
timeout { perror "timeout\n; break }
eof { break }
}
}
# This was intended to do any cleanup necessary. It kinda looks like it
# isn't needed, but just in case, please keep it in for now.
gas_finish
# Did we find what we were looking for? If not, flunk it.
if [expr $x == 40] then { pass $testname } else { fail $testname }
}
proc do_h8300h_branch {} {
set testname "branchh.s: h8300h branch tests"
set x 0
gas_start "branchh-coff.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
while 1 {
expect {
-re " +\[0-9\]+ 0000 5500\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0002 5C000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0006 5A000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000a 5900\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000c 5B00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000e 5E000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0012 5D00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0014 5F00\[^\n\]*\n" { set x [expr $x+1] }
timeout { perror "timeout\n; break }
eof { break }
}
}
# This was intended to do any cleanup necessary. It kinda looks like it
# isn't needed, but just in case, please keep it in for now.
gas_finish
# Did we find what we were looking for? If not, flunk it.
if [expr $x == 8] then { pass $testname } else { fail $testname }
}
proc do_h8300s_cbranch {} {
set testname "cbranchs.s: h8300s conditional branch tests"
set x 0
gas_start "cbranchs.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
while 1 {
expect {
-re " +\[0-9\]+ 0000 4000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0002 4000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0004 4100\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0006 4100\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0008 4200\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000a 4300\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000c 4400\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000e 4400\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0010 4500\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0012 4500\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0014 4600\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0016 4700\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0018 4800\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 001a 4900\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 001c 4A00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 001e 4B00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0020 4C00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0022 4D00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0024 4E00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0026 4F00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0028 58000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 002c 58000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0030 58100000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0034 58100000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0038 58200000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 003c 58300000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0040 58400000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0044 58400000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0048 58500000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 004c 58500000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0050 58600000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0054 58700000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0058 58800000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 005c 58900000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0060 58A00000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0064 58B00000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0068 58C00000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 006c 58D00000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0070 58E00000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0074 58F00000\[^\n\]*\n" { set x [expr $x+1] }
timeout { perror "timeout\n; break }
eof { break }
}
}
# This was intended to do any cleanup necessary. It kinda looks like it
# isn't needed, but just in case, please keep it in for now.
gas_finish
# Did we find what we were looking for? If not, flunk it.
if [expr $x == 40] then { pass $testname } else { fail $testname }
}
proc do_h8300s_branch {} {
set testname "branchs.s: h8300s branch tests"
set x 0
gas_start "branchs-coff.s" "-al"
# Check each instruction bit pattern to verify it got
# assembled correctly.
while 1 {
expect {
-re " +\[0-9\]+ 0000 5500\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0002 5C000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0006 5A000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000a 5900\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000c 5B00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 000e 5E000000\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0012 5D00\[^\n\]*\n" { set x [expr $x+1] }
-re " +\[0-9\]+ 0014 5F00\[^\n\]*\n" { set x [expr $x+1] }
timeout { perror "timeout\n; break }
eof { break }
}
}
# This was intended to do any cleanup necessary. It kinda looks like it
# isn't needed, but just in case, please keep it in for now.
gas_finish
# Did we find what we were looking for? If not, flunk it.
if [expr $x == 8] then { pass $testname } else { fail $testname }
}
if { [istarget h8300*-*-coff]
|| [istarget h8300*-*-hms*]
|| [istarget h8300*-*-rtemscoff*] } then {
# Test the basic h8300 instruction parser
do_h8300_cbranch
do_h8300_branch
# Now test the h8300h instruction parser
do_h8300h_cbranch
do_h8300h_branch
# Now test the h8300s instruction parser
do_h8300s_cbranch
do_h8300s_branch
# Now some random tests
run_dump_test "ffxx1-coff"
}

View File

@ -2255,10 +2255,6 @@ if [istarget h8300*-*-*] then {
do_h8300h_mov32bug
# Now some random tests
set svr4pic [expr [istarget *-*-elf*] || [istarget *-*-irix5*] ]
set empic [expr [istarget *-*-ecoff*] || [istarget *-*-ultrix*] || [istarget *-*-irix\[1-4\]*] ]
set aout [expr [istarget *-*-bsd*] || [istarget *-*-netbsd*]]
gas_test "cmpsi2.s" "" "" "cmpsi2.s"
run_dump_test "pr3134"

View File

@ -1,3 +1,7 @@
2018-04-16 Alan Modra <amodra@gmail.com>
* coff/h8300.h: Delete.
2018-04-16 Alan Modra <amodra@gmail.com>
* ieee.h: Delete.

View File

@ -1,55 +0,0 @@
/* coff information for Renesas H8/300 and H8/300-H
Copyright (C) 2001-2018 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#define L_LNNO_SIZE 4
#include "coff/external.h"
#define H8300MAGIC 0x8300
#define H8300HMAGIC 0x8301
#define H8300SMAGIC 0x8302
#define H8300HNMAGIC 0x8303
#define H8300SNMAGIC 0x8304
#define H8300BADMAG(x) (((x).f_magic != H8300MAGIC))
#define H8300HBADMAG(x) (((x).f_magic != H8300HMAGIC))
#define H8300SBADMAG(x) (((x).f_magic != H8300SMAGIC))
#define H8300HNBADMAG(x) (((x).f_magic != H8300HNMAGIC))
#define H8300SNBADMAG(x) (((x).f_magic != H8300SNMAGIC))
/* Relocation directives. */
/* The external reloc has an offset field, because some of the reloc
types on the h8 don't have room in the instruction for the entire
offset - eg the strange jump and high page addressing modes. */
struct external_reloc
{
char r_vaddr[4];
char r_symndx[4];
char r_offset[4];
char r_type[2];
char r_stuff[2];
};
#define RELOC struct external_reloc
#define RELSZ 16

View File

@ -1,3 +1,29 @@
2018-04-16 Alan Modra <amodra@gmail.com>
* Makefile.am: Remove h8300-coff support.
* configure.tgt: Likewise.
* testsuite/ld-h8300/h8300.exp: Likewise.
* emulparams/h8300.sh: Delete.
* emulparams/h8300h.sh: Delete.
* emulparams/h8300hn.sh: Delete.
* emulparams/h8300s.sh: Delete.
* emulparams/h8300sn.sh: Delete.
* emulparams/h8300sx.sh: Delete.
* emulparams/h8300sxn.sh: Delete.
* scripttempl/h8300.sc: Delete.
* scripttempl/h8300h.sc: Delete.
* scripttempl/h8300hn.sc: Delete.
* scripttempl/h8300s.sc: Delete.
* scripttempl/h8300sn.sc: Delete.
* scripttempl/h8300sx.sc: Delete.
* scripttempl/h8300sxn.sc: Delete.
* testsuite/ld-h8300/relax-3-coff.d: Delete.
* testsuite/ld-h8300/relax-4-coff.d: Delete.
* testsuite/ld-h8300/relax-5-coff.d: Delete.
* testsuite/ld-h8300/relax-6-coff.d: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 Alan Modra <amodra@gmail.com>
* ld.texinfo: Remove IEEE 695 support.

View File

@ -294,23 +294,16 @@ ALL_EMULATION_SOURCES = \
eelf_i386_vxworks.c \
eelf_iamcu.c \
eelf_s390.c \
eh8300.c \
eh8300elf.c \
eh8300elf_linux.c \
eh8300h.c \
eh8300helf.c \
eh8300helf_linux.c \
eh8300hn.c \
eh8300hnelf.c \
eh8300s.c \
eh8300self.c \
eh8300self_linux.c \
eh8300sn.c \
eh8300snelf.c \
eh8300sx.c \
eh8300sxelf.c \
eh8300sxelf_linux.c \
eh8300sxn.c \
eh8300sxnelf.c \
eh8500.c \
eh8500b.c \
@ -1359,18 +1352,12 @@ eelf_iamcu.c: $(srcdir)/emulparams/elf_iamcu.sh \
eelf_s390.c: $(srcdir)/emulparams/elf_s390.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300.c: $(srcdir)/emulparams/h8300.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300.sc ${GEN_DEPENDS}
eh8300elf.c: $(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300elf_linux.c: $(srcdir)/emulparams/h8300elf_linux.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300h.c: $(srcdir)/emulparams/h8300h.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300h.sc ${GEN_DEPENDS}
eh8300helf.c: $(srcdir)/emulparams/h8300helf.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@ -1379,16 +1366,10 @@ eh8300helf_linux.c: $(srcdir)/emulparams/h8300helf_linux.sh \
$(srcdir)/emulparams/h8300elf_linux.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300hn.c: $(srcdir)/emulparams/h8300hn.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300hn.sc ${GEN_DEPENDS}
eh8300hnelf.c: $(srcdir)/emulparams/h8300hnelf.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300s.c: $(srcdir)/emulparams/h8300s.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300s.sc ${GEN_DEPENDS}
eh8300self.c: $(srcdir)/emulparams/h8300self.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@ -1397,16 +1378,10 @@ eh8300self_linux.c: $(srcdir)/emulparams/h8300self_linux.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300sn.c: $(srcdir)/emulparams/h8300sn.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sn.sc ${GEN_DEPENDS}
eh8300snelf.c: $(srcdir)/emulparams/h8300snelf.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300sx.c: $(srcdir)/emulparams/h8300sx.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sx.sc ${GEN_DEPENDS}
eh8300sxelf.c: $(srcdir)/emulparams/h8300sxelf.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@ -1415,9 +1390,6 @@ eh8300sxelf_linux.c: $(srcdir)/emulparams/h8300sxelf_linux.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300sxn.c: $(srcdir)/emulparams/h8300sxn.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sxn.sc ${GEN_DEPENDS}
eh8300sxnelf.c: $(srcdir)/emulparams/h8300sxnelf.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}

View File

@ -663,23 +663,16 @@ ALL_EMULATION_SOURCES = \
eelf_i386_vxworks.c \
eelf_iamcu.c \
eelf_s390.c \
eh8300.c \
eh8300elf.c \
eh8300elf_linux.c \
eh8300h.c \
eh8300helf.c \
eh8300helf_linux.c \
eh8300hn.c \
eh8300hnelf.c \
eh8300s.c \
eh8300self.c \
eh8300self_linux.c \
eh8300sn.c \
eh8300snelf.c \
eh8300sx.c \
eh8300sxelf.c \
eh8300sxelf_linux.c \
eh8300sxn.c \
eh8300sxnelf.c \
eh8500.c \
eh8500b.c \
@ -1320,23 +1313,16 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_x86_64_fbsd.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_x86_64_nacl.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eelf_x86_64_sol2.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300elf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300elf_linux.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300h.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300helf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300helf_linux.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300hn.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300hnelf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300s.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300self.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300self_linux.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sn.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300snelf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sx.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sxelf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sxelf_linux.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sxn.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8300sxnelf.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8500.Po@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/eh8500b.Po@am__quote@
@ -2913,18 +2899,12 @@ eelf_iamcu.c: $(srcdir)/emulparams/elf_iamcu.sh \
eelf_s390.c: $(srcdir)/emulparams/elf_s390.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300.c: $(srcdir)/emulparams/h8300.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300.sc ${GEN_DEPENDS}
eh8300elf.c: $(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300elf_linux.c: $(srcdir)/emulparams/h8300elf_linux.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300h.c: $(srcdir)/emulparams/h8300h.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300h.sc ${GEN_DEPENDS}
eh8300helf.c: $(srcdir)/emulparams/h8300helf.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@ -2933,16 +2913,10 @@ eh8300helf_linux.c: $(srcdir)/emulparams/h8300helf_linux.sh \
$(srcdir)/emulparams/h8300elf_linux.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300hn.c: $(srcdir)/emulparams/h8300hn.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300hn.sc ${GEN_DEPENDS}
eh8300hnelf.c: $(srcdir)/emulparams/h8300hnelf.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300s.c: $(srcdir)/emulparams/h8300s.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300s.sc ${GEN_DEPENDS}
eh8300self.c: $(srcdir)/emulparams/h8300self.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@ -2951,16 +2925,10 @@ eh8300self_linux.c: $(srcdir)/emulparams/h8300self_linux.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300sn.c: $(srcdir)/emulparams/h8300sn.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sn.sc ${GEN_DEPENDS}
eh8300snelf.c: $(srcdir)/emulparams/h8300snelf.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300sx.c: $(srcdir)/emulparams/h8300sx.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sx.sc ${GEN_DEPENDS}
eh8300sxelf.c: $(srcdir)/emulparams/h8300sxelf.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
@ -2969,9 +2937,6 @@ eh8300sxelf_linux.c: $(srcdir)/emulparams/h8300sxelf_linux.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
eh8300sxn.c: $(srcdir)/emulparams/h8300sxn.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/h8300sxn.sc ${GEN_DEPENDS}
eh8300sxnelf.c: $(srcdir)/emulparams/h8300sxnelf.sh \
$(srcdir)/emulparams/h8300elf.sh \
$(ELF_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}

View File

@ -218,8 +218,6 @@ moxie-*-moxiebox*) targ_emul=moxiebox
;;
moxie-*-*) targ_emul=elf32moxie
;;
h8300-*-hms* | h8300-*-coff*)
targ_emul=h8300; targ_extra_emuls="h8300h h8300s h8300hn h8300sn h8300sx h8300sxn" ;;
h8300-*-elf* | h8300-*-rtems*)
targ_emul=h8300elf;
targ_extra_emuls="h8300helf h8300self h8300hnelf h8300snelf h8300sxelf h8300sxnelf" ;;

View File

@ -1,18 +0,0 @@
SCRIPT_NAME=h8300
OUTPUT_FORMAT="coff-h8300"
TEXT_START_ADDR=0x8000
TARGET_PAGE_SIZE=128
ARCH=h8300
TINY_READONLY_SECTION=".tinyrodata :
{
*(.tinyrodata)
} =0"
TINY_DATA_SECTION=".tinydata 0xff8000 :
{
*(.tinydata)
${RELOCATING+ _tinydata = .; }
}"
TINY_BSS_SECTION=".tinybss : AT (_tinydata)
{
*(.tinybss)
}"

View File

@ -1,5 +0,0 @@
SCRIPT_NAME=h8300h
OUTPUT_FORMAT="coff-h8300"
TEXT_START_ADDR=0x8000
TARGET_PAGE_SIZE=128
ARCH=h8300

View File

@ -1,5 +0,0 @@
SCRIPT_NAME=h8300hn
OUTPUT_FORMAT="coff-h8300"
TEXT_START_ADDR=0x8000
TARGET_PAGE_SIZE=128
ARCH=h8300

View File

@ -1,5 +0,0 @@
SCRIPT_NAME=h8300s
OUTPUT_FORMAT="coff-h8300"
TEXT_START_ADDR=0x8000
TARGET_PAGE_SIZE=128
ARCH=h8300

View File

@ -1,5 +0,0 @@
SCRIPT_NAME=h8300sn
OUTPUT_FORMAT="coff-h8300"
TEXT_START_ADDR=0x8000
TARGET_PAGE_SIZE=128
ARCH=h8300

View File

@ -1,5 +0,0 @@
SCRIPT_NAME=h8300sx
OUTPUT_FORMAT="coff-h8300"
TEXT_START_ADDR=0x8000
TARGET_PAGE_SIZE=128
ARCH=h8300

View File

@ -1,5 +0,0 @@
SCRIPT_NAME=h8300sxn
OUTPUT_FORMAT="coff-h8300"
TEXT_START_ADDR=0x8000
TARGET_PAGE_SIZE=128
ARCH=h8300

View File

@ -208,23 +208,16 @@ eelf_x86_64_cloudabi.c
eelf_x86_64_fbsd.c
eelf_x86_64_nacl.c
eelf_x86_64_sol2.c
eh8300.c
eh8300elf.c
eh8300elf_linux.c
eh8300h.c
eh8300helf.c
eh8300helf_linux.c
eh8300hn.c
eh8300hnelf.c
eh8300s.c
eh8300self.c
eh8300self_linux.c
eh8300sn.c
eh8300snelf.c
eh8300sx.c
eh8300sxelf.c
eh8300sxelf_linux.c
eh8300sxn.c
eh8300sxnelf.c
eh8500.c
eh8500b.c

View File

@ -1,106 +0,0 @@
# Copyright (C) 2014-2018 Free Software Foundation, Inc.
#
# Copying and distribution of this file, with or without modification,
# are permitted in any medium without royalty provided the copyright
# notice and this notice are preserved.
TORS=".tors :
{
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram"
cat <<EOF
/* Copyright (C) 2014-2018 Free Software Foundation, Inc.
Copying and distribution of this script, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. */
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(${ARCH})
${RELOCATING+ENTRY ("_start")}
MEMORY
{
/* 0xc4 is a magic entry. We should have the linker just
skip over it one day... */
vectors : o = 0x0000, l = 0xc4
magicvectors : o = 0xc4, l = 0x3c
ram : o = 0x0100, l = 0xfdfc
/* The stack starts at the top of main ram. */
topram : o = 0xfefc, l = 0x4
/* At the very top of the address space is the 8-bit area. */
eight : o = 0xff00, l = 0x100
}
SECTIONS
{
.vectors :
{
/* Use something like this to place a specific
function's address into the vector table.
SHORT (ABSOLUTE (_foobar)). */
*(.vectors)
} ${RELOCATING+ > vectors}
.init :
{
*(.init)
} ${RELOCATING+ > ram}
.text :
{
*(.rodata)
*(.text)
*(.text.*)
*(.strings)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > ram}
${CONSTRUCTING+${TORS}}
.data :
{
*(.data)
*(.data.*)
*(.tiny)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > ram}
.bss :
{
${RELOCATING+ _bss_start = . ;}
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ >ram}
.stack :
{
${RELOCATING+ _stack = . ; }
*(.stack)
} ${RELOCATING+ > topram}
.eight :
{
*(.eight)
} ${RELOCATING+ > eight}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
}
EOF

View File

@ -1,109 +0,0 @@
# Copyright (C) 2014-2018 Free Software Foundation, Inc.
#
# Copying and distribution of this file, with or without modification,
# are permitted in any medium without royalty provided the copyright
# notice and this notice are preserved.
TORS=".tors :
{
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram"
cat <<EOF
/* Copyright (C) 2014-2018 Free Software Foundation, Inc.
Copying and distribution of this script, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. */
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(h8300h)
${RELOCATING+ENTRY ("_start")}
/* The memory size is 256KB to coincide with the simulator.
Don't change either without considering the other. */
MEMORY
{
/* 0xc4 is a magic entry. We should have the linker just
skip over it one day... */
vectors : o = 0x0000, l = 0xc4
magicvectors : o = 0xc4, l = 0x3c
/* We still only use 256k as the main ram size. */
ram : o = 0x0100, l = 0x3fefc
/* The stack starts at the top of main ram. */
topram : o = 0x3fffc, l = 0x4
/* This holds variables in the "tiny" sections. */
tiny : o = 0xff8000, l = 0x7f00
/* At the very top of the address space is the 8-bit area. */
eight : o = 0xffff00, l = 0x100
}
SECTIONS
{
.vectors :
{
/* Use something like this to place a specific
function's address into the vector table.
LONG (ABSOLUTE (_foobar)). */
*(.vectors)
} ${RELOCATING+ > vectors}
.text :
{
*(.rodata)
*(.text)
*(.strings)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > ram}
${CONSTRUCTING+${TORS}}
.data :
{
*(.data)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > ram}
.bss :
{
${RELOCATING+ _bss_start = . ;}
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ >ram}
.stack :
{
${RELOCATING+ _stack = . ; }
*(.stack)
} ${RELOCATING+ > topram}
.tiny :
{
*(.tiny)
} ${RELOCATING+ > tiny}
.eight :
{
*(.eight)
} ${RELOCATING+ > eight}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
}
EOF

View File

@ -1,99 +0,0 @@
# Copyright (C) 2014-2018 Free Software Foundation, Inc.
#
# Copying and distribution of this file, with or without modification,
# are permitted in any medium without royalty provided the copyright
# notice and this notice are preserved.
TORS=".tors :
{
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram"
cat <<EOF
/* Copyright (C) 2014-2018 Free Software Foundation, Inc.
Copying and distribution of this script, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. */
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(h8300hn)
${RELOCATING+ENTRY ("_start")}
MEMORY
{
/* 0xc4 is a magic entry. We should have the linker just
skip over it one day... */
vectors : o = 0x0000, l = 0xc4
magicvectors : o = 0xc4, l = 0x3c
ram : o = 0x0100, l = 0xfdfc
/* The stack starts at the top of main ram. */
topram : o = 0xfefc, l = 0x4
/* At the very top of the address space is the 8-bit area. */
eight : o = 0xff00, l = 0x100
}
SECTIONS
{
.vectors :
{
/* Use something like this to place a specific
function's address into the vector table.
SHORT (ABSOLUTE (_foobar)). */
*(.vectors)
} ${RELOCATING+ > vectors}
.text :
{
*(.rodata)
*(.text)
*(.strings)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > ram}
${CONSTRUCTING+${TORS}}
.data :
{
*(.data)
*(.tiny)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > ram}
.bss :
{
${RELOCATING+ _bss_start = . ;}
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ >ram}
.stack :
{
${RELOCATING+ _stack = . ; }
*(.stack)
} ${RELOCATING+ > topram}
.eight :
{
*(.eight)
} ${RELOCATING+ > eight}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
}
EOF

View File

@ -1,109 +0,0 @@
# Copyright (C) 2014-2018 Free Software Foundation, Inc.
#
# Copying and distribution of this file, with or without modification,
# are permitted in any medium without royalty provided the copyright
# notice and this notice are preserved.
TORS=".tors :
{
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram"
cat <<EOF
/* Copyright (C) 2014-2018 Free Software Foundation, Inc.
Copying and distribution of this script, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. */
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(h8300s)
${RELOCATING+ENTRY ("_start")}
/* The memory size is 256KB to coincide with the simulator.
Don't change either without considering the other. */
MEMORY
{
/* 0xc4 is a magic entry. We should have the linker just
skip over it one day... */
vectors : o = 0x0000, l = 0xc4
magicvectors : o = 0xc4, l = 0x3c
/* We still only use 256k as the main ram size. */
ram : o = 0x0100, l = 0x3fefc
/* The stack starts at the top of main ram. */
topram : o = 0x3fffc, l = 0x4
/* This holds variables in the "tiny" sections. */
tiny : o = 0xff8000, l = 0x7f00
/* At the very top of the address space is the 8-bit area. */
eight : o = 0xffff00, l = 0x100
}
SECTIONS
{
.vectors :
{
/* Use something like this to place a specific
function's address into the vector table.
LONG (ABSOLUTE (_foobar)). */
*(.vectors)
} ${RELOCATING+ > vectors}
.text :
{
*(.rodata)
*(.text)
*(.strings)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > ram}
${CONSTRUCTING+${TORS}}
.data :
{
*(.data)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > ram}
.bss :
{
${RELOCATING+ _bss_start = . ;}
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ >ram}
.stack :
{
${RELOCATING+ _stack = . ; }
*(.stack)
} ${RELOCATING+ > topram}
.tiny :
{
*(.tiny)
} ${RELOCATING+ > tiny}
.eight :
{
*(.eight)
} ${RELOCATING+ > eight}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
}
EOF

View File

@ -1,99 +0,0 @@
# Copyright (C) 2014-2018 Free Software Foundation, Inc.
#
# Copying and distribution of this file, with or without modification,
# are permitted in any medium without royalty provided the copyright
# notice and this notice are preserved.
TORS=".tors :
{
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram"
cat <<EOF
/* Copyright (C) 2014-2018 Free Software Foundation, Inc.
Copying and distribution of this script, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. */
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(h8300sn)
${RELOCATING+ENTRY ("_start")}
MEMORY
{
/* 0xc4 is a magic entry. We should have the linker just
skip over it one day... */
vectors : o = 0x0000, l = 0xc4
magicvectors : o = 0xc4, l = 0x3c
ram : o = 0x0100, l = 0xfdfc
/* The stack starts at the top of main ram. */
topram : o = 0xfefc, l = 0x4
/* At the very top of the address space is the 8-bit area. */
eight : o = 0xff00, l = 0x100
}
SECTIONS
{
.vectors :
{
/* Use something like this to place a specific
function's address into the vector table.
SHORT (ABSOLUTE (_foobar)). */
*(.vectors)
} ${RELOCATING+ > vectors}
.text :
{
*(.rodata)
*(.text)
*(.strings)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > ram}
${CONSTRUCTING+${TORS}}
.data :
{
*(.data)
*(.tiny)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > ram}
.bss :
{
${RELOCATING+ _bss_start = . ;}
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ >ram}
.stack :
{
${RELOCATING+ _stack = . ; }
*(.stack)
} ${RELOCATING+ > topram}
.eight :
{
*(.eight)
} ${RELOCATING+ > eight}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
}
EOF

View File

@ -1,109 +0,0 @@
# Copyright (C) 2014-2018 Free Software Foundation, Inc.
#
# Copying and distribution of this file, with or without modification,
# are permitted in any medium without royalty provided the copyright
# notice and this notice are preserved.
TORS=".tors :
{
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram"
cat <<EOF
/* Copyright (C) 2014-2018 Free Software Foundation, Inc.
Copying and distribution of this script, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. */
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(h8300sx)
${RELOCATING+ENTRY ("_start")}
/* The memory size is 256KB to coincide with the simulator.
Don't change either without considering the other. */
MEMORY
{
/* 0xc4 is a magic entry. We should have the linker just
skip over it one day... */
vectors : o = 0x0000, l = 0xc4
magicvectors : o = 0xc4, l = 0x3c
/* We still only use 256k as the main ram size. */
ram : o = 0x0100, l = 0x3fefc
/* The stack starts at the top of main ram. */
topram : o = 0x3fffc, l = 0x4
/* This holds variables in the "tiny" sections. */
tiny : o = 0xff8000, l = 0x7f00
/* At the very top of the address space is the 8-bit area. */
eight : o = 0xffff00, l = 0x100
}
SECTIONS
{
.vectors :
{
/* Use something like this to place a specific
function's address into the vector table.
LONG (ABSOLUTE (_foobar)). */
*(.vectors)
} ${RELOCATING+ > vectors}
.text :
{
*(.rodata)
*(.text)
*(.strings)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > ram}
${CONSTRUCTING+${TORS}}
.data :
{
*(.data)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > ram}
.bss :
{
${RELOCATING+ _bss_start = . ;}
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ >ram}
.stack :
{
${RELOCATING+ _stack = . ; }
*(.stack)
} ${RELOCATING+ > topram}
.tiny :
{
*(.tiny)
} ${RELOCATING+ > tiny}
.eight :
{
*(.eight)
} ${RELOCATING+ > eight}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
}
EOF

View File

@ -1,99 +0,0 @@
# Copyright (C) 2014-2018 Free Software Foundation, Inc.
#
# Copying and distribution of this file, with or without modification,
# are permitted in any medium without royalty provided the copyright
# notice and this notice are preserved.
TORS=".tors :
{
___ctors = . ;
*(.ctors)
___ctors_end = . ;
___dtors = . ;
*(.dtors)
___dtors_end = . ;
} > ram"
cat <<EOF
/* Copyright (C) 2014-2018 Free Software Foundation, Inc.
Copying and distribution of this script, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. */
OUTPUT_FORMAT("${OUTPUT_FORMAT}")
OUTPUT_ARCH(h8300sxn)
${RELOCATING+ENTRY ("_start")}
MEMORY
{
/* 0xc4 is a magic entry. We should have the linker just
skip over it one day... */
vectors : o = 0x0000, l = 0xc4
magicvectors : o = 0xc4, l = 0x3c
ram : o = 0x0100, l = 0xfdfc
/* The stack starts at the top of main ram. */
topram : o = 0xfefc, l = 0x4
/* At the very top of the address space is the 8-bit area. */
eight : o = 0xff00, l = 0x100
}
SECTIONS
{
.vectors :
{
/* Use something like this to place a specific
function's address into the vector table.
SHORT (ABSOLUTE (_foobar)). */
*(.vectors)
} ${RELOCATING+ > vectors}
.text :
{
*(.rodata)
*(.text)
*(.strings)
${RELOCATING+ _etext = . ; }
} ${RELOCATING+ > ram}
${CONSTRUCTING+${TORS}}
.data :
{
*(.data)
*(.tiny)
${RELOCATING+ _edata = . ; }
} ${RELOCATING+ > ram}
.bss :
{
${RELOCATING+ _bss_start = . ;}
*(.bss)
*(COMMON)
${RELOCATING+ _end = . ; }
} ${RELOCATING+ >ram}
.stack :
{
${RELOCATING+ _stack = . ; }
*(.stack)
} ${RELOCATING+ > topram}
.eight :
{
*(.eight)
} ${RELOCATING+ > eight}
.stab 0 ${RELOCATING+(NOLOAD)} :
{
[ .stab ]
}
.stabstr 0 ${RELOCATING+(NOLOAD)} :
{
[ .stabstr ]
}
}
EOF

View File

@ -28,18 +28,10 @@ if ![istarget h8300-*-*] {
}
run_dump_test relax
if [is_elf_format] {
run_dump_test relax-2
run_dump_test relax-3
run_dump_test relax-4
run_dump_test relax-5
run_dump_test relax-6
run_dump_test relax-7
run_dump_test gcsection
} else {
run_dump_test relax-3-coff
run_dump_test relax-4-coff
run_dump_test relax-5-coff
run_dump_test relax-6-coff
}
run_dump_test relax-2
run_dump_test relax-3
run_dump_test relax-4
run_dump_test relax-5
run_dump_test relax-6
run_dump_test relax-7
run_dump_test gcsection

View File

@ -1,36 +0,0 @@
# name: H8300 Relaxation Test 3 (for COFF)
# source: relax-3.s
# ld: --relax -m h8300s
# objdump: -d
.*: file format .*-h8300
Disassembly of section .text:
00000100 <_start>:
#
# Relaxation of aa:16
#
.*: 6a 08 00 00.*mov.b @0x0:16,r0l
.*: 6a 08 7f ff.*mov.b @0x7fff:16,r0l
.*: 6a 08 80 00.*mov.b @0x8000:16,r0l
.*: 6a 08 fe ff.*mov.b @0xfeff:16,r0l
.*: 28 00 .*mov.b @0x0:8,r0l
.*: 28 ff .*mov.b @0xff:8,r0l
#
# Relaxation of aa:32
#
.*: 6a 08 00 00.*mov.b @0x0:16,r0l
.*: 6a 08 7f ff.*mov.b @0x7fff:16,r0l
.*: 6a 28 00 00.*mov.b @0x8000:32,r0l
.*: 80 00
.*: 6a 28 00 00.*mov.b @0xff00:32,r0l
.*: ff 00
.*: 6a 28 00 ff.*mov.b @0xffff00:32,r0l
.*: ff 00
.*: 6a 28 ff ff.*mov.b @0xffff7fff:32,r0l
.*: 7f ff
.*: 6a 08 80 00.*mov.b @0x8000:16,r0l
.*: 6a 08 fe ff.*mov.b @0xfeff:16,r0l
.*: 28 00 .*mov.b @0x0:8,r0l
.*: 28 ff .*mov.b @0xff:8,r0l

View File

@ -1,76 +0,0 @@
# name: H8300 Relaxation Test 4 (for COFF)
# source: relax-4.s
# ld: --relax -m h8300s
# objdump: -d
.*: file format .*-h8300
Disassembly of section .text:
00000100 <_start>:
100: f8 03.*mov.b #0x3,r0l
102: fa 05.*mov.b #0x5,r2l
104: 7f ff 60 80.*bset r0l,@0xff:8
108: 7f 00 60 a0.*bset r2l,@0x0:8
10c: 7e ff 63 a0.*btst r2l,@0xff:8
110: 7e 00 63 80.*btst r0l,@0x0:8
114: 6a 18 00 00.*bset #0x5,@0x0:16
118: 70 50
11a: 6a 18 7f ff.*bset #0x5,@0x7fff:16
11e: 70 50
120: 6a 18 80 00.*bset #0x5,@0x8000:16
124: 70 50
126: 6a 18 fe ff.*bset #0x5,@0xfeff:16
12a: 70 50
12c: 7f 00 70 50.*bset #0x5,@0x0:8
130: 7f ff 70 50.*bset #0x5,@0xff:8
134: 6a 10 00 00.*band #0x5,@0x0:16
138: 76 50
13a: 6a 10 7f ff.*band #0x5,@0x7fff:16
13e: 76 50
140: 6a 10 80 00.*band #0x5,@0x8000:16
144: 76 50
146: 6a 10 fe ff.*band #0x5,@0xfeff:16
14a: 76 50
14c: 7e 00 76 50.*band #0x5,@0x0:8
150: 7e ff 76 50.*band #0x5,@0xff:8
154: 7f ff 60 a0.*bset r2l,@0xff:8
158: 7f 00 60 80.*bset r0l,@0x0:8
15c: 7e ff 63 80.*btst r0l,@0xff:8
160: 7e 00 63 a0.*btst r2l,@0x0:8
164: 6a 18 00 00.*bset #0x6,@0x0:16
168: 70 60
16a: 6a 18 7f ff.*bset #0x6,@0x7fff:16
16e: 70 60
170: 6a 38 00 00.*bset #0x6,@0x8000:32
174: 80 00 70 60
178: 6a 38 00 00.*bset #0x6,@0xff00:32
17c: ff 00 70 60
180: 6a 38 00 ff.*bset #0x6,@0xffff00:32
184: ff 00 70 60
188: 6a 38 ff ff.*bset #0x6,@0xffff7fff:32
18c: 7f ff 70 60
190: 6a 18 80 00.*bset #0x6,@0x8000:16
194: 70 60
196: 6a 18 fe ff.*bset #0x6,@0xfeff:16
19a: 70 60
19c: 7f 00 70 60.*bset #0x6,@0x0:8
1a0: 7f ff 70 60.*bset #0x6,@0xff:8
1a4: 6a 10 00 00.*band #0x6,@0x0:16
1a8: 76 60
1aa: 6a 10 7f ff.*band #0x6,@0x7fff:16
1ae: 76 60
1b0: 6a 30 00 00.*band #0x6,@0x8000:32
1b4: 80 00 76 60
1b8: 6a 30 00 00.*band #0x6,@0xff00:32
1bc: ff 00 76 60
1c0: 6a 30 00 ff.*band #0x6,@0xffff00:32
1c4: ff 00 76 60
1c8: 6a 30 ff ff.*band #0x6,@0xffff7fff:32
1cc: 7f ff 76 60
1d0: 6a 10 80 00.*band #0x6,@0x8000:16
1d4: 76 60
1d6: 6a 10 fe ff.*band #0x6,@0xfeff:16
1da: 76 60
1dc: 7e 00 76 60.*band #0x6,@0x0:8
1e0: 7e ff 76 60.*band #0x6,@0xff:8

View File

@ -1,50 +0,0 @@
# name: H8300 Relaxation Test 5 (for COFF)
# source: relax-5.s
# ld: --relax -m h8300s
# objdump: -d --no-show-raw-insn
.*: file format .*-h8300
Disassembly of section .text:
00000100 <_start>:
100:.*ldc @0x0:16,ccr
106:.*ldc @0x7fff:16,ccr
10c:.*ldc @0x8000:32,ccr
114:.*ldc @0xff00:32,ccr
11c:.*ldc @0xffff00:32,ccr
124:.*ldc @0xffff7fff:32,ccr
12c:.*ldc @0x8000:16,ccr
132:.*ldc @0xfeff:16,ccr
138:.*ldc @0xff00:16,ccr
13e:.*ldc @0xffff:16,ccr
144:.*stc ccr,@0x0:16
14a:.*stc ccr,@0x7fff:16
150:.*stc ccr,@0x8000:32
158:.*stc ccr,@0xff00:32
160:.*stc ccr,@0xffff00:32
168:.*stc ccr,@0xffff7fff:32
170:.*stc ccr,@0x8000:16
176:.*stc ccr,@0xfeff:16
17c:.*stc ccr,@0xff00:16
182:.*stc ccr,@0xffff:16
188:.*ldc @0x0:16,exr
18e:.*ldc @0x7fff:16,exr
194:.*ldc @0x8000:32,exr
19c:.*ldc @0xff00:32,exr
1a4:.*ldc @0xffff00:32,exr
1ac:.*ldc @0xffff7fff:32,exr
1b4:.*ldc @0x8000:16,exr
1ba:.*ldc @0xfeff:16,exr
1c0:.*ldc @0xff00:16,exr
1c6:.*ldc @0xffff:16,exr
1cc:.*stc exr,@0x0:16
1d2:.*stc exr,@0x7fff:16
1d8:.*stc exr,@0x8000:32
1e0:.*stc exr,@0xff00:32
1e8:.*stc exr,@0xffff00:32
1f0:.*stc exr,@0xffff7fff:32
1f8:.*stc exr,@0x8000:16
1fe:.*stc exr,@0xfeff:16
204:.*stc exr,@0xff00:16
20a:.*stc exr,@0xffff:16

View File

@ -1,11 +0,0 @@
# name: H8300 Relaxation Test 6
# source: relax-6.s
# ld: --relax -m h8300s
# objdump: -d --no-show-raw-insn
.*: file format .*-h8300
Disassembly of section .text:
00000100 <_start>:
100: mov.b r2l,@0xbd:8
102: rts