This patch adds support to objdump for disassembly of NFP (Netronome Flow Processor) ELF files (.nffw) as well as some basic readelf support.
bfd * Makefile.am: Added NFP files to build. * archures.c: Added bfd_arch_nfp * config.bfd: Added NFP support. * configure.ac: Added NFP support. * cpu-nfp.c: New, for NFP support. * elf-bfd.h: Added elf_section_info() * elf64-nfp.c: New, for NFP support. * po/SRC-POTFILES.in: Added NFP source files. * targets.c: Added nfp_elf64_vec * bfd-in2.h: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. binutils* readelf.c: Very basic support for EM_NFP and its section types. * testsuite/binutils-all/nfp: New directory. * testsuite/binutils-all/nfp/objdump.exp: New file. Run new tests. * testsuite/binutils-all/nfp/test2_ctx8.d: New file. * testsuite/binutils-all/nfp/test2_no-pc_ctx4.d: New file. * testsuite/binutils-all/nfp/test1.d: New file. * testsuite/binutils-all/nfp/nfp6000.nffw: New file. * testsuite/binutils-all/nfp/test2_nfp6000.nffw: New file. * NEWS: Mention the new support. include * dis-asm.h: Added print_nfp_disassembler_options prototype. * elf/common.h: Added EM_NFP, officially assigned. See Google Group Generic System V Application Binary Interface. * elf/nfp.h: New, for NFP support. * opcode/nfp.h: New, for NFP support. opcodes Makefile.am: Added nfp-dis.c. configure.ac: Added bfd_nfp_arch. disassemble.h: Added print_insn_nfp prototype. disassemble.c: Added ARCH_nfp and call to print_insn_nfp nfp-dis.c: New, for NFP support. po/POTFILES.in: Added nfp-dis.c to the list. Makefile.in: Regenerate. configure: Regenerate.
This commit is contained in:
Francois H. Theron
Nick Clifton
parent
d33bc52e51
commit
fe944acf8f
@ -1,3 +1,18 @@
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2018-04-30 Francois H. Theron <francois.theron@netronome.com>
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* Makefile.am: Added NFP files to build.
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* archures.c: Added bfd_arch_nfp
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* config.bfd: Added NFP support.
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* configure.ac: Added NFP support.
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* cpu-nfp.c: New, for NFP support.
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* elf-bfd.h: Added elf_section_info()
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* elf64-nfp.c: New, for NFP support.
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* po/SRC-POTFILES.in: Added NFP source files.
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* targets.c: Added nfp_elf64_vec
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* bfd-in2.h: Regenerate.
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* Makefile.in: Regenerate.
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* configure: Regenerate.
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2018-04-27 Alan Modra <amodra@gmail.com>
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* bfd-in2.h: Regenerate.
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@ -135,6 +135,7 @@ ALL_MACHINES = \
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cpu-msp430.lo \
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cpu-mt.lo \
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cpu-nds32.lo \
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cpu-nfp.lo \
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cpu-nios2.lo \
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cpu-ns32k.lo \
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cpu-or1k.lo \
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@ -218,6 +219,7 @@ ALL_MACHINES_CFILES = \
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cpu-msp430.c \
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cpu-mt.c \
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cpu-nds32.c \
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cpu-nfp.c \
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cpu-ns32k.c \
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cpu-nios2.c \
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cpu-or1k.c \
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@ -555,6 +557,7 @@ BFD64_BACKENDS = \
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elf64-mips.lo \
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elfxx-mips.lo \
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elf64-mmix.lo \
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elf64-nfp.lo \
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elf64-ppc.lo \
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elf32-riscv.lo \
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elf64-riscv.lo \
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@ -590,6 +593,7 @@ BFD64_BACKENDS_CFILES = \
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elf64-ia64-vms.c \
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elf64-mips.c \
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elf64-mmix.c \
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elf64-nfp.c \
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elf64-ppc.c \
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elf64-s390.c \
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elf64-sparc.c \
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@ -468,6 +468,7 @@ ALL_MACHINES = \
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cpu-msp430.lo \
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cpu-mt.lo \
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cpu-nds32.lo \
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cpu-nfp.lo \
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cpu-nios2.lo \
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cpu-ns32k.lo \
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cpu-or1k.lo \
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@ -551,6 +552,7 @@ ALL_MACHINES_CFILES = \
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cpu-msp430.c \
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cpu-mt.c \
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cpu-nds32.c \
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cpu-nfp.c \
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cpu-ns32k.c \
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cpu-nios2.c \
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cpu-or1k.c \
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@ -890,6 +892,7 @@ BFD64_BACKENDS = \
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elf64-mips.lo \
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elfxx-mips.lo \
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elf64-mmix.lo \
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elf64-nfp.lo \
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elf64-ppc.lo \
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elf32-riscv.lo \
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elf64-riscv.lo \
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@ -925,6 +928,7 @@ BFD64_BACKENDS_CFILES = \
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elf64-ia64-vms.c \
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elf64-mips.c \
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elf64-mmix.c \
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elf64-nfp.c \
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elf64-ppc.c \
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elf64-s390.c \
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elf64-sparc.c \
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@ -1259,6 +1263,7 @@ distclean-compile:
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-msp430.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-mt.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-nds32.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-nfp.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-nios2.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-ns32k.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-or1k.Plo@am__quote@
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@ -1382,6 +1387,7 @@ distclean-compile:
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ia64.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mips.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-mmix.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-nfp.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-ppc.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-riscv.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf64-s390.Plo@am__quote@
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@ -511,6 +511,9 @@ DESCRIPTION
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.#define bfd_mach_wasm32 1
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. bfd_arch_pru, {* PRU. *}
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.#define bfd_mach_pru 0
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. bfd_arch_nfp, {* Netronome Flow Processor *}
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.#define bfd_mach_nfp3200 0x3200
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.#define bfd_mach_nfp6000 0x6000
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. bfd_arch_last
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. };
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*/
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@ -601,6 +604,7 @@ extern const bfd_arch_info_type bfd_ft32_arch;
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extern const bfd_arch_info_type bfd_msp430_arch;
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extern const bfd_arch_info_type bfd_mt_arch;
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extern const bfd_arch_info_type bfd_nds32_arch;
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extern const bfd_arch_info_type bfd_nfp_arch;
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extern const bfd_arch_info_type bfd_nios2_arch;
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extern const bfd_arch_info_type bfd_ns32k_arch;
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extern const bfd_arch_info_type bfd_or1k_arch;
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@ -689,6 +693,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
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&bfd_msp430_arch,
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&bfd_mt_arch,
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&bfd_nds32_arch,
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&bfd_nfp_arch,
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&bfd_nios2_arch,
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&bfd_ns32k_arch,
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&bfd_or1k_arch,
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@ -2381,6 +2381,9 @@ enum bfd_architecture
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#define bfd_mach_wasm32 1
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bfd_arch_pru, /* PRU. */
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#define bfd_mach_pru 0
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bfd_arch_nfp, /* Netronome Flow Processor */
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#define bfd_mach_nfp3200 0x3200
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#define bfd_mach_nfp6000 0x6000
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bfd_arch_last
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};
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@ -182,6 +182,7 @@ m68*) targ_archs=bfd_m68k_arch ;;
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microblaze*) targ_archs=bfd_microblaze_arch ;;
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mips*) targ_archs=bfd_mips_arch ;;
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nds32*) targ_archs=bfd_nds32_arch ;;
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nfp) targ_archs=bfd_nfp_arch ;;
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nios2*) targ_archs=bfd_nios2_arch ;;
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or1k*|or1knd*) targ_archs=bfd_or1k_arch ;;
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pdp11*) targ_archs=bfd_pdp11_arch ;;
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@ -992,6 +993,12 @@ case "${targ}" in
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targ_selvecs=nds32_elf32_le_vec
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;;
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#ifdef BFD64
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nfp-*-*)
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targ_defvec=nfp_elf64_vec
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;;
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#endif
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ns32k-pc532-mach* | ns32k-pc532-ux*)
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targ_defvec=ns32k_aout_pc532mach_vec
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targ_underscore=yes
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1
bfd/configure
vendored
1
bfd/configure
vendored
@ -14482,6 +14482,7 @@ do
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nds32_elf32_le_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
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nds32_elf32_linux_be_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
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nds32_elf32_linux_le_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
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nfp_elf64_vec) tb="$tb elf64-nfp.lo elf64.lo $elf" ;;
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nios2_elf32_be_vec) tb="$tb elf32-nios2.lo elf32.lo $elf" ;;
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nios2_elf32_le_vec) tb="$tb elf32-nios2.lo elf32.lo $elf" ;;
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ns32k_aout_pc532mach_vec) tb="$tb pc532-mach.lo aout-ns32k.lo" ;;
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@ -559,6 +559,7 @@ do
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nds32_elf32_le_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
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nds32_elf32_linux_be_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
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nds32_elf32_linux_le_vec) tb="$tb elf32-nds32.lo elf32.lo $elf" ;;
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nfp_elf64_vec) tb="$tb elf64-nfp.lo elf64.lo $elf" ;;
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nios2_elf32_be_vec) tb="$tb elf32-nios2.lo elf32.lo $elf" ;;
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nios2_elf32_le_vec) tb="$tb elf32-nios2.lo elf32.lo $elf" ;;
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ns32k_aout_pc532mach_vec) tb="$tb pc532-mach.lo aout-ns32k.lo" ;;
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62
bfd/cpu-nfp.c
Normal file
62
bfd/cpu-nfp.c
Normal file
@ -0,0 +1,62 @@
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/* BFD library support routines for the NFP.
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Copyright (C) 2017 Free Software Foundation, Inc.
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Contributed by Francois H. Theron <francois.theron@netronome.com>
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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static const bfd_arch_info_type *
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bfd_nfp_compatible (const bfd_arch_info_type * a,
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const bfd_arch_info_type * b)
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{
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if (a->arch != b->arch)
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return NULL;
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if (a->mach != b->mach)
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return NULL;
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return a;
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}
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#define N(machine, print, default, next) \
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{ \
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32, \
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64, \
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8, \
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bfd_arch_nfp, \
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machine, \
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"nfp", \
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print, \
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3, \
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default, \
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bfd_nfp_compatible, \
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bfd_default_scan, \
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bfd_arch_default_fill, \
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next \
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}
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static const bfd_arch_info_type arch_info_struct[] =
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{
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N (bfd_mach_nfp3200, "NFP-32xx", FALSE, NULL)
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};
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const bfd_arch_info_type bfd_nfp_arch =
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N (bfd_mach_nfp6000, "NFP-6xxx", TRUE, &arch_info_struct[0]);
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@ -1671,6 +1671,7 @@ struct bfd_elf_section_data
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#define elf_linked_to_section(sec) (elf_section_data(sec)->linked_to)
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#define elf_section_type(sec) (elf_section_data(sec)->this_hdr.sh_type)
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#define elf_section_flags(sec) (elf_section_data(sec)->this_hdr.sh_flags)
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#define elf_section_info(sec) (elf_section_data(sec)->this_hdr.sh_info)
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#define elf_group_name(sec) (elf_section_data(sec)->group.name)
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#define elf_group_id(sec) (elf_section_data(sec)->group.id)
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#define elf_next_in_group(sec) (elf_section_data(sec)->next_in_group)
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276
bfd/elf64-nfp.c
Executable file
276
bfd/elf64-nfp.c
Executable file
@ -0,0 +1,276 @@
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/* NFP-specific support for 64-bit ELF
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Copyright (C) 2017-2018 Free Software Foundation, Inc.
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Contributed by Francois H. Theron <francois.theron@netronome.com>
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
|
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the Free Software Foundation; either version 3 of the License, or
|
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(at your option) any later version.
|
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|
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This program is distributed in the hope that it will be useful,
|
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but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin Street - Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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#include "elf-bfd.h"
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#include "elf/nfp.h"
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#include "bfd_stdint.h"
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static bfd_reloc_status_type
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elf64_nfp_reloc (bfd * abfd ATTRIBUTE_UNUSED,
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arelent * reloc_entry,
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asymbol * symbol,
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void *data ATTRIBUTE_UNUSED,
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asection * input_section,
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bfd * output_bfd,
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char **error_message ATTRIBUTE_UNUSED);
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/* We don't actually apply any relocations in this toolset
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so we make them all do nothing, but at least display useful
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names.
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Most of these are mainly used by the NFP toolchain to resolve things
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before the final ELF file is created. */
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static reloc_howto_type elf_nfp_howto_table[] =
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{
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HOWTO (R_NFP_NOTYPE, /* Type. */
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0, /* Rightshift. */
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3, /* Size. */
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0, /* Bitsize. */
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FALSE, /* PC_relative. */
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0, /* Bitpos. */
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complain_overflow_dont,/* Complain_on_overflow. */
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elf64_nfp_reloc, /* Special_function. */
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"R_NFP_NOTYPE", /* Name. */
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FALSE, /* Partial_inplace. */
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0, /* Src_mask. */
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0, /* Dst_mask. */
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FALSE), /* PCrel_offset. */
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HOWTO (R_NFP_W32LE, 0, 3, 0, FALSE, 0,
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complain_overflow_dont, elf64_nfp_reloc,
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"R_NFP_W32LE",
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FALSE, 0, 0, FALSE),
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HOWTO (R_NFP_SRC8_A, 0, 3, 0, FALSE, 0,
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complain_overflow_dont, elf64_nfp_reloc,
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"R_NFP_SRC8_A",
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FALSE, 0, 0, FALSE),
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HOWTO (R_NFP_SRC8_B, 0, 3, 0, FALSE, 0,
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complain_overflow_dont, elf64_nfp_reloc,
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"R_NFP_SRC8_B",
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FALSE, 0, 0, FALSE),
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HOWTO (R_NFP_IMMED8_I, 0, 3, 0, FALSE, 0,
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complain_overflow_dont, elf64_nfp_reloc,
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"R_NFP_IMMED8_I",
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FALSE, 0, 0, FALSE),
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HOWTO (R_NFP_SC, 0, 3, 0, FALSE, 0,
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complain_overflow_dont, elf64_nfp_reloc,
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"R_NFP_SC",
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FALSE, 0, 0, FALSE),
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HOWTO (R_NFP_IMMED_LO16_I_A, 0, 3, 0, FALSE, 0,
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complain_overflow_dont, elf64_nfp_reloc,
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"R_NFP_IMMED_LO16_I_A",
|
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FALSE, 0, 0, FALSE),
|
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HOWTO (R_NFP_IMMED_LO16_I_B, 0, 3, 0, FALSE, 0,
|
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complain_overflow_dont, elf64_nfp_reloc,
|
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"R_NFP_IMMED_LO16_I_B",
|
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TRUE, 0, 0, FALSE),
|
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HOWTO (R_NFP_SRC7_B, 0, 3, 0, FALSE, 0,
|
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complain_overflow_dont, elf64_nfp_reloc,
|
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"R_NFP_SRC7_B",
|
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FALSE, 0, 0, FALSE),
|
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HOWTO (R_NFP_SRC7_A, 0, 3, 0, FALSE, 0,
|
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complain_overflow_dont, elf64_nfp_reloc,
|
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"R_NFP_SRC7_A",
|
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FALSE, 0, 0, FALSE),
|
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HOWTO (R_NFP_SRC8_I_B, 0, 3, 0, FALSE, 0,
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complain_overflow_dont, elf64_nfp_reloc,
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"R_NFP_SRC8_I_B",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_SRC8_I_A, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_SRC8_I_A",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_IMMED_HI16_I_A, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_IMMED_HI16_I_A",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_IMMED_HI16_I_B, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_IMMED_HI16_I_B",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W64LE, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W64LE",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_SH_INFO, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_SH_INFO",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W32BE, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W32BE",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W64BE, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W64BE",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W32_29_24, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W32_29_24",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W32LE_AND, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W32LE_AND",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W32BE_AND, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W32BE_AND",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W32LE_OR, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W32LE_OR",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W32BE_OR, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W32BE_OR",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W64LE_AND, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W64LE_AND",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W64BE_AND, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W64BE_AND",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W64LE_OR, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W64LE_OR",
|
||||
FALSE, 0, 0, FALSE),
|
||||
HOWTO (R_NFP_W64BE_OR, 0, 3, 0, FALSE, 0,
|
||||
complain_overflow_dont, elf64_nfp_reloc,
|
||||
"R_NFP_W64BE_OR",
|
||||
FALSE, 0, 0, FALSE)
|
||||
};
|
||||
|
||||
static bfd_boolean
|
||||
elf64_nfp_object_p (bfd * abfd)
|
||||
{
|
||||
/* If the e_machine value is one of the unofficial ones, we convert
|
||||
it first and set e_flags accordingly for later consistency. */
|
||||
if (elf_elfheader (abfd)->e_machine == E_NFP_MACH_3200)
|
||||
{
|
||||
elf_elfheader (abfd)->e_machine = EM_NFP;
|
||||
elf_elfheader (abfd)->e_flags &= ~EF_NFP_SET_MACH (~0);
|
||||
elf_elfheader (abfd)->e_flags |= EF_NFP_SET_MACH (E_NFP_MACH_3200);
|
||||
}
|
||||
else if (elf_elfheader (abfd)->e_machine == E_NFP_MACH_6000)
|
||||
{
|
||||
elf_elfheader (abfd)->e_machine = EM_NFP;
|
||||
elf_elfheader (abfd)->e_flags &= ~EF_NFP_SET_MACH (~0);
|
||||
elf_elfheader (abfd)->e_flags |= EF_NFP_SET_MACH (E_NFP_MACH_6000);
|
||||
}
|
||||
|
||||
if (elf_elfheader (abfd)->e_machine == EM_NFP)
|
||||
{
|
||||
int e_mach = EF_NFP_MACH (elf_elfheader (abfd)->e_flags);
|
||||
|
||||
switch (e_mach)
|
||||
{
|
||||
case E_NFP_MACH_3200:
|
||||
case E_NFP_MACH_6000:
|
||||
if (!bfd_default_set_arch_mach (abfd, bfd_arch_nfp, e_mach))
|
||||
return FALSE;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
static bfd_boolean
|
||||
elf64_nfp_section_from_shdr (bfd * abfd,
|
||||
Elf_Internal_Shdr * hdr,
|
||||
const char *name, int shindex)
|
||||
{
|
||||
switch (hdr->sh_type)
|
||||
{
|
||||
case SHT_NFP_INITREG:
|
||||
case SHT_NFP_MECONFIG:
|
||||
case SHT_NFP_UDEBUG:
|
||||
return _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex);
|
||||
default:
|
||||
return FALSE;
|
||||
}
|
||||
}
|
||||
|
||||
bfd_reloc_status_type
|
||||
elf64_nfp_reloc (bfd * abfd ATTRIBUTE_UNUSED,
|
||||
arelent * reloc_entry ATTRIBUTE_UNUSED,
|
||||
asymbol * symbol ATTRIBUTE_UNUSED,
|
||||
void *data ATTRIBUTE_UNUSED,
|
||||
asection * input_section ATTRIBUTE_UNUSED,
|
||||
bfd * output_bfd ATTRIBUTE_UNUSED,
|
||||
char **error_message ATTRIBUTE_UNUSED)
|
||||
{
|
||||
return bfd_reloc_ok;
|
||||
}
|
||||
|
||||
static bfd_boolean
|
||||
elf64_nfp_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED,
|
||||
arelent * cache_ptr, Elf_Internal_Rela * dst)
|
||||
{
|
||||
unsigned int r_type;
|
||||
|
||||
r_type = ELF64_R_TYPE (dst->r_info);
|
||||
if (r_type >= R_NFP_MAX)
|
||||
{
|
||||
/* xgettext:c-format */
|
||||
_bfd_error_handler (_("%pB: unsupported relocation type %#x"),
|
||||
abfd, r_type);
|
||||
bfd_set_error (bfd_error_bad_value);
|
||||
return FALSE;
|
||||
}
|
||||
cache_ptr->howto = &elf_nfp_howto_table[r_type];
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
static reloc_howto_type *
|
||||
elf64_nfp_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
|
||||
bfd_reloc_code_real_type code ATTRIBUTE_UNUSED)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static reloc_howto_type *
|
||||
elf64_nfp_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED,
|
||||
const char *r_name ATTRIBUTE_UNUSED)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
|
||||
#define ELF_ARCH bfd_arch_nfp
|
||||
#define ELF_MACHINE_CODE EM_NFP
|
||||
#define ELF_MACHINE_ALT1 E_NFP_MACH_6000
|
||||
#define ELF_MACHINE_ALT2 E_NFP_MACH_3200
|
||||
#define ELF_MAXPAGESIZE 1
|
||||
#define TARGET_LITTLE_NAME "elf64-nfp"
|
||||
#define TARGET_LITTLE_SYM nfp_elf64_vec
|
||||
|
||||
#define elf_backend_object_p elf64_nfp_object_p
|
||||
#define elf_backend_section_from_shdr elf64_nfp_section_from_shdr
|
||||
#define elf_info_to_howto elf64_nfp_info_to_howto
|
||||
#define bfd_elf64_bfd_reloc_type_lookup elf64_nfp_reloc_type_lookup
|
||||
#define bfd_elf64_bfd_reloc_name_lookup elf64_nfp_reloc_name_lookup
|
||||
|
||||
#include "elf64-target.h"
|
||||
@ -85,6 +85,7 @@ cpu-moxie.c
|
||||
cpu-msp430.c
|
||||
cpu-mt.c
|
||||
cpu-nds32.c
|
||||
cpu-nfp.c
|
||||
cpu-nios2.c
|
||||
cpu-ns32k.c
|
||||
cpu-or1k.c
|
||||
@ -209,6 +210,7 @@ elf64-hppa.h
|
||||
elf64-ia64-vms.c
|
||||
elf64-mips.c
|
||||
elf64-mmix.c
|
||||
elf64-nfp.c
|
||||
elf64-ppc.c
|
||||
elf64-s390.c
|
||||
elf64-sparc.c
|
||||
|
||||
602
bfd/po/bfd.pot
602
bfd/po/bfd.pot
File diff suppressed because it is too large
Load Diff
@ -734,6 +734,7 @@ extern const bfd_target nds32_elf32_be_vec;
|
||||
extern const bfd_target nds32_elf32_le_vec;
|
||||
extern const bfd_target nds32_elf32_linux_be_vec;
|
||||
extern const bfd_target nds32_elf32_linux_le_vec;
|
||||
extern const bfd_target nfp_elf64_vec;
|
||||
extern const bfd_target nios2_elf32_be_vec;
|
||||
extern const bfd_target nios2_elf32_le_vec;
|
||||
extern const bfd_target ns32k_aout_pc532mach_vec;
|
||||
@ -1107,6 +1108,8 @@ static const bfd_target * const _bfd_target_vector[] =
|
||||
&nds32_elf32_linux_be_vec,
|
||||
&nds32_elf32_linux_le_vec,
|
||||
|
||||
&nfp_elf64_vec,
|
||||
|
||||
&nios2_elf32_be_vec,
|
||||
&nios2_elf32_le_vec,
|
||||
|
||||
|
||||
@ -1,3 +1,16 @@
|
||||
2018-04-30 Francois H. Theron <francois.theron@netronome.com>
|
||||
|
||||
* readelf.c: Very basic support for EM_NFP and its section types.
|
||||
* testsuite/binutils-all/nfp: New directory.
|
||||
* testsuite/binutils-all/nfp/objdump.exp: New file. Run new
|
||||
tests.
|
||||
* testsuite/binutils-all/nfp/test2_ctx8.d: New file.
|
||||
* testsuite/binutils-all/nfp/test2_no-pc_ctx4.d: New file.
|
||||
* testsuite/binutils-all/nfp/test1.d: New file.
|
||||
* testsuite/binutils-all/nfp/nfp6000.nffw: New file.
|
||||
* testsuite/binutils-all/nfp/test2_nfp6000.nffw: New file.
|
||||
* NEWS: Mention the new support.
|
||||
|
||||
2018-04-27 Maciej W. Rozycki <macro@mips.com>
|
||||
|
||||
* testsuite/lib/binutils-common.exp (match_target): New procedure.
|
||||
|
||||
@ -1,5 +1,7 @@
|
||||
-*- text -*-
|
||||
|
||||
* Add support for disassembling netronome Flow Processor (NFP) firmware files.
|
||||
|
||||
Changes in 2.30:
|
||||
|
||||
* Add --debug-dump=links option to readelf and --dwarf=links option to objdump
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -131,6 +131,7 @@
|
||||
#include "elf/mt.h"
|
||||
#include "elf/msp430.h"
|
||||
#include "elf/nds32.h"
|
||||
#include "elf/nfp.h"
|
||||
#include "elf/nios2.h"
|
||||
#include "elf/or1k.h"
|
||||
#include "elf/pj.h"
|
||||
@ -776,6 +777,7 @@ guess_is_rela (unsigned int e_machine)
|
||||
case EM_CYGNUS_M32R:
|
||||
case EM_SCORE:
|
||||
case EM_XGATE:
|
||||
case EM_NFP:
|
||||
return FALSE;
|
||||
|
||||
/* Targets that use RELA relocations. */
|
||||
@ -1560,6 +1562,13 @@ dump_relocations (Filedata * filedata,
|
||||
case EM_TI_PRU:
|
||||
rtype = elf_pru_reloc_type (type);
|
||||
break;
|
||||
|
||||
case EM_NFP:
|
||||
if (EF_NFP_MACH (filedata->file_header.e_flags) == E_NFP_MACH_3200)
|
||||
rtype = elf_nfp3200_reloc_type (type);
|
||||
else
|
||||
rtype = elf_nfp_reloc_type (type);
|
||||
break;
|
||||
}
|
||||
|
||||
if (rtype == NULL)
|
||||
@ -2472,6 +2481,7 @@ get_machine_name (unsigned e_machine)
|
||||
case EM_RISCV: return "RISC-V";
|
||||
case EM_LANAI: return "Lanai 32-bit processor";
|
||||
case EM_BPF: return "Linux BPF";
|
||||
case EM_NFP: return "Netronome Flow Processor";
|
||||
|
||||
/* Large numbers... */
|
||||
case EM_MT: return "Morpho Techologies MT processor";
|
||||
@ -3440,6 +3450,18 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine)
|
||||
decode_NDS32_machine_flags (e_flags, buf, sizeof buf);
|
||||
break;
|
||||
|
||||
case EM_NFP:
|
||||
switch (EF_NFP_MACH (e_flags))
|
||||
{
|
||||
case E_NFP_MACH_3200:
|
||||
strcat (buf, ", NFP-32xx");
|
||||
break;
|
||||
case E_NFP_MACH_6000:
|
||||
strcat (buf, ", NFP-6xxx");
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case EM_RISCV:
|
||||
if (e_flags & EF_RISCV_RVC)
|
||||
strcat (buf, ", RVC");
|
||||
@ -4135,6 +4157,18 @@ get_msp430x_section_type_name (unsigned int sh_type)
|
||||
}
|
||||
}
|
||||
|
||||
static const char *
|
||||
get_nfp_section_type_name (unsigned int sh_type)
|
||||
{
|
||||
switch (sh_type)
|
||||
{
|
||||
case SHT_NFP_MECONFIG: return "NFP_MECONFIG";
|
||||
case SHT_NFP_INITREG: return "NFP_INITREG";
|
||||
case SHT_NFP_UDEBUG: return "NFP_UDEBUG";
|
||||
default: return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
static const char *
|
||||
get_v850_section_type_name (unsigned int sh_type)
|
||||
{
|
||||
@ -4221,6 +4255,9 @@ get_section_type_name (Filedata * filedata, unsigned int sh_type)
|
||||
case EM_MSP430:
|
||||
result = get_msp430x_section_type_name (sh_type);
|
||||
break;
|
||||
case EM_NFP:
|
||||
result = get_nfp_section_type_name (sh_type);
|
||||
break;
|
||||
case EM_V800:
|
||||
case EM_V850:
|
||||
case EM_CYGNUS_V850:
|
||||
|
||||
52
binutils/testsuite/binutils-all/nfp/objdump.exp
Normal file
52
binutils/testsuite/binutils-all/nfp/objdump.exp
Normal file
@ -0,0 +1,52 @@
|
||||
# Copyright (C) 2004-2018 Free Software Foundation, Inc.
|
||||
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 3 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
|
||||
|
||||
if {![istarget nfp*-*-*]} {
|
||||
return
|
||||
}
|
||||
|
||||
if {![is_remote host] && [which $OBJDUMP] == 0} then {
|
||||
perror "$OBJDUMP does not exist"
|
||||
return
|
||||
}
|
||||
|
||||
send_user "Version [binutil_version $OBJDUMP]"
|
||||
|
||||
set outfile "tmpdir/dump.out"
|
||||
|
||||
set testname "NFP dissasembler NFP-6xxx instructions"
|
||||
set dumpfile "$srcdir/$subdir/test1.d"
|
||||
remote_exec host "${OBJDUMP} -d $srcdir/$subdir/test1_nfp6000.nffw" "" "/dev/null" "$outfile"
|
||||
if { [regexp_diff "${outfile}" "${dumpfile}"] } then {
|
||||
fail $testname
|
||||
return
|
||||
}
|
||||
|
||||
set testname "NFP dissasembler options: no-pc,ctx4"
|
||||
set dumpfile "$srcdir/$subdir/test2_no-pc_ctx4.d"
|
||||
remote_exec host "${OBJDUMP} -M no-pc,ctx4 -d $srcdir/$subdir/test2_nfp6000.nffw" "" "/dev/null" "$outfile"
|
||||
if { [regexp_diff "${outfile}" "${dumpfile}"] } then {
|
||||
fail $testname
|
||||
return
|
||||
}
|
||||
|
||||
set testname "NFP dissasembler options: ctx8"
|
||||
set dumpfile "$srcdir/$subdir/test2_ctx8.d"
|
||||
remote_exec host "${OBJDUMP} -M ctx8 -d $srcdir/$subdir/test2_nfp6000.nffw" "" "/dev/null" "$outfile"
|
||||
if { [regexp_diff "${outfile}" "${dumpfile}"] } then {
|
||||
fail $testname
|
||||
return
|
||||
}
|
||||
973
binutils/testsuite/binutils-all/nfp/test1.d
Normal file
973
binutils/testsuite/binutils-all/nfp/test1.d
Normal file
@ -0,0 +1,973 @@
|
||||
|
||||
.*: file format elf64-nfp
|
||||
|
||||
|
||||
Disassembly of section \.text\.i32\.me0:
|
||||
|
||||
0000000000000000 <\.text\.i32\.me0>:
|
||||
0: 000540f0012cd000 \.0 immed\[gprA_0, 0x1234\]
|
||||
8: 0002c0f0012cd280 \.1 immed\[n\$reg_0, 0x1234\]
|
||||
10: 000220f0012cd281 \.2 immed\[n\$reg_1, 0x1234\]
|
||||
18: 000660f0012cd200 \.3 immed\[\*l\$index0, 0x1234\]
|
||||
20: 0007c0f0012cd220 \.4 immed\[\*l\$index1, 0x1234\]
|
||||
28: 000fa0f0012cd230 \.5 immed\[\*l\$index1\+\+, 0x1234\]
|
||||
30: 000f40f0012cd231 \.6 immed\[\*l\$index1--, 0x1234\]
|
||||
38: 0008c8f0012cd200 \.7 immed\[\*l\$index2, 0x1234\]
|
||||
40: 0000a8f0012cd210 \.8 immed\[\*l\$index2\+\+, 0x1234\]
|
||||
48: 000048f0012cd211 \.9 immed\[\*l\$index2--, 0x1234\]
|
||||
50: 000968f0012cd220 \.10 immed\[\*l\$index3, 0x1234\]
|
||||
58: 0007e0f0012cd203 \.11 immed\[\*l\$index0\[3\], 0x1234\]
|
||||
60: 000540f0012cd225 \.12 immed\[\*l\$index1\[5\], 0x1234\]
|
||||
68: 000b28f0012cd207 \.13 immed\[\*l\$index2\[7\], 0x1234\]
|
||||
70: 000de8f0012cd229 \.14 immed\[\*l\$index3\[9\], 0x1234\]
|
||||
78: 000000f00ff003ff \.15 immed\[gprB_0, 0xffff\]
|
||||
80: 000d60f220000bff \.16 immed_b1\[gprB_2, 0xff\]
|
||||
88: 000f60f6200007ff \.17 immed_b3\[gprB_1, 0xff\]
|
||||
90: 000080f080000f00 \.18 immed\[gprB_3, 0xffffffff\]
|
||||
98: 000100f086600f77 \.19 immed\[gprB_3, 0xffff9988\]
|
||||
a0: 000940f0012cd180 \.20 immed\[\$xfer_0, 0x1234\]
|
||||
a8: 000a00f0043c8581 \.21 immed\[\$xfer_1, 0x4321\]
|
||||
b0: 000180f0056de1ce \.22 immed\[\$xfer_30, 0x5678\]
|
||||
b8: 0007c0f0400e8401 \.23 immed_w0\[gprA_1, 0xa1\]
|
||||
c0: 000440f4400e8802 \.24 immed_w1\[gprA_2, 0xa2\]
|
||||
c8: 000d00f4000e8c03 \.25 immed\[gprA_3, 0xa3, <<16\]
|
||||
d0: 000520f001200334 \.26 immed\[gprB_0, 0x1234\]
|
||||
d8: 000fa0f0400007b1 \.27 immed_w0\[gprB_1, 0xb1\]
|
||||
e0: 000c20f440000bb2 \.28 immed_w1\[gprB_2, 0xb2\]
|
||||
e8: 000560f400000fb3 \.29 immed\[gprB_3, 0xb3, <<16\]
|
||||
f0: 000660f200000fb3 \.30 immed\[gprB_3, 0xb3, <<8\]
|
||||
f8: 0001b0f200000fb3 \.31 immed\[gprB_3, 0xb3, <<8\], predicate_cc
|
||||
100: 0001c2f200000fb3 \.32 immed\[gprB_3, 0xb3, <<8\], gpr_wrboth
|
||||
108: 000ba0a0300c2f00 \.33 alu\[--, --, B, 0xb\]
|
||||
110: 0005a081f200da00 \.34 alu_shf\[--, --, B, 0x16, <<1\]
|
||||
118: 000be081d2018600 \.35 alu_shf\[--, --, B, 0x21, <<3\]
|
||||
120: 000240801201b200 \.36 alu_shf\[--, --, B, 0x2c, <<31\]
|
||||
128: 000fa081f800da00 \.37 alu_shf\[\$xfer_0, --, B, 0x16, <<1\]
|
||||
130: 0009e081f840da00 \.38 alu_shf\[\$xfer_4, --, B, 0x16, <<1\]
|
||||
138: 00006081fc80da00 \.39 alu_shf\[\$xfer_24, --, B, 0x16, <<1\]
|
||||
140: 000a2081fcf0da00 \.40 alu_shf\[\$xfer_31, --, B, 0x16, <<1\]
|
||||
148: 0004a0a0280c2f00 \.41 alu\[n\$reg_0, --, B, 0xb\]
|
||||
150: 0001e0a0281c2f00 \.42 alu\[n\$reg_1, --, B, 0xb\]
|
||||
158: 000880a0a00c2400 \.43 alu\[\*l\$index0, gprA_0, \+, 0x9\]
|
||||
160: 000100a0a43c2400 \.44 alu\[\*n\$index\+\+, gprA_0, \+, 0x9\]
|
||||
168: 000b208bc500a600 \.45 alu_shf\[\*l\$index0, gprA_0, OR, 0x9, <<4\]
|
||||
170: 000b00a0a20c2400 \.46 alu\[\*l\$index1, gprA_0, \+, 0x9\]
|
||||
178: 000740a0a30c2400 \.47 alu\[\*l\$index1\+\+, gprA_0, \+, 0x9\]
|
||||
180: 000200a0a31c2400 \.48 alu\[\*l\$index1--, gprA_0, \+, 0x9\]
|
||||
188: 000628a0a00c2400 \.49 alu\[\*l\$index2, gprA_0, \+, 0x9\]
|
||||
190: 000988aa210c2400 \.50 alu\[\*l\$index2\+\+, gprA_0, OR, 0x9\]
|
||||
198: 000f28a0a11c2400 \.51 alu\[\*l\$index2--, gprA_0, \+, 0x9\]
|
||||
1a0: 0005a8a0a20c2400 \.52 alu\[\*l\$index3, gprA_0, \+, 0x9\]
|
||||
1a8: 000480a0a03c2400 \.53 alu\[\*l\$index0\[3\], gprA_0, \+, 0x9\]
|
||||
1b0: 000800a0a25c2400 \.54 alu\[\*l\$index1\[5\], gprA_0, \+, 0x9\]
|
||||
1b8: 000c68a0a07c2400 \.55 alu\[\*l\$index2\[7\], gprA_0, \+, 0x9\]
|
||||
1c0: 000aa8a0a29c2400 \.56 alu\[\*l\$index3\[9\], gprA_0, \+, 0x9\]
|
||||
1c8: 000cc4b0c008a400 \.57 alu\[gprB_0, \*l\$index3\[9\], \+, gprA_0\]
|
||||
1d0: 000fe4b0c008c000 \.58 alu\[gprB_0, \*l\$index3\+\+, \+, gprA_0\]
|
||||
1d8: 000ac4b0c008c400 \.59 alu\[gprB_0, \*l\$index3--, \+, gprA_0\]
|
||||
1e0: 000bc4b080000229 \.60 alu\[gprB_0, \*l\$index3\[9\], \+, gprB_0\]
|
||||
1e8: 000724b080000230 \.61 alu\[gprB_0, \*l\$index3\+\+, \+, gprB_0\]
|
||||
1f0: 0007c4b080000231 \.62 alu\[gprB_0, \*l\$index3--, \+, gprB_0\]
|
||||
1f8: 000664b080000211 \.63 alu\[gprB_0, \*l\$index2--, \+, gprB_0\]
|
||||
200: 000a60b080000231 \.64 alu\[gprB_0, \*l\$index1--, \+, gprB_0\]
|
||||
208: 000bc0b080000211 \.65 alu\[gprB_0, \*l\$index0--, \+, gprB_0\]
|
||||
210: 000340b080000200 \.66 alu\[gprB_0, \*l\$index0, \+, gprB_0\]
|
||||
218: 000ee4b080000200 \.67 alu\[gprB_0, \*l\$index2, \+, gprB_0\]
|
||||
220: 000100b080000241 \.68 alu\[gprB_0, \*n\$index, \+, gprB_0\]
|
||||
228: 0004809bf0000241 \.69 alu_shf\[gprB_0, \*n\$index, OR, gprB_0, <<1\]
|
||||
230: 000f20a0001fff00 \.70 alu\[gprA_1, --, B, 0xff\]
|
||||
238: 0005c0b0002fff00 \.71 alu\[gprB_2, --, B, 0xff\]
|
||||
240: 000940a0000d6f00 \.72 alu\[gprA_0, --, B, 0x5b\]
|
||||
248: 000440a2000d6f00 \.73 alu\[gprA_0, --, ~B, 0x5b\]
|
||||
250: 000de081f032f200 \.74 alu_shf\[gprA_3, --, B, 0x5c, <<1\]
|
||||
258: 000de091d012f600 \.75 alu_shf\[gprB_1, --, B, 0x5d, <<3\]
|
||||
260: 000d60901022fa00 \.76 alu_shf\[gprB_2, --, B, 0x5e, <<31\]
|
||||
268: 000e40a0c0000402 \.77 alu\[gprA_0, gprB_1, \+, gprA_2\]
|
||||
270: 000340a2c0000402 \.78 alu\[gprA_0, gprB_1, \+16, gprA_2\]
|
||||
278: 000040a4c0000402 \.79 alu\[gprA_0, gprB_1, \+8, gprA_2\]
|
||||
280: 0007a0a8c0000402 \.80 alu\[gprA_0, gprB_1, \+carry, gprA_2\]
|
||||
288: 000d40a6c0000402 \.81 alu\[gprA_0, gprB_1, -carry, gprA_2\]
|
||||
290: 000aa0aac0000402 \.82 alu\[gprA_0, gprB_1, -, gprA_2\]
|
||||
298: 0009a0acc0000402 \.83 alu\[gprA_0, gprB_1, B-A, gprA_2\]
|
||||
2a0: 000da0aa40000402 \.84 alu\[gprA_0, gprB_1, OR, gprA_2\]
|
||||
2a8: 000740a440000402 \.85 alu\[gprA_0, gprB_1, AND, gprA_2\]
|
||||
2b0: 000a40a640000402 \.86 alu\[gprA_0, gprB_1, ~AND, gprA_2\]
|
||||
2b8: 0000a0a840000402 \.87 alu\[gprA_0, gprB_1, AND~, gprA_2\]
|
||||
2c0: 000ea0ac40000402 \.88 alu\[gprA_0, gprB_1, XOR, gprA_2\]
|
||||
2c8: 000321a0c0000402 \.89 alu\[gprA_0, gprB_1, \+, gprA_2\], no_cc
|
||||
2d0: 000990a0c0000402 \.90 alu\[gprA_0, gprB_1, \+, gprA_2\], predicate_cc
|
||||
2d8: 0009e2a0c0000402 \.91 alu\[gprA_0, gprB_1, \+, gprA_2\], gpr_wrboth
|
||||
2e0: 000353a0c0000402 \.92 alu\[gprA_0, gprB_1, \+, gprA_2\], no_cc, gpr_wrboth, predicate_cc
|
||||
2e8: 000d418b70080602 \.93 alu_shf\[gprA_0, gprB_1, OR, gprA_2, <<9\], no_cc
|
||||
2f0: 0006708a90080502 \.94 alu_shf\[gprA_0, gprB_1, OR, gprA_2, >>9\], predicate_cc
|
||||
2f8: 000ea28a90080402 \.95 alu_shf\[gprA_0, gprB_1, OR, gprA_2, >>rot9\], gpr_wrboth
|
||||
300: 000e138b70080402 \.96 alu_shf\[gprA_0, gprB_1, OR, gprA_2, >>rot23\], no_cc, gpr_wrboth, predicate_cc
|
||||
308: 000ba08a00080602 \.97 alu_shf\[gprA_0, gprB_1, OR, gprA_2, <<indirect\]
|
||||
310: 0000208a00080502 \.98 alu_shf\[gprA_0, gprB_1, OR, gprA_2, >>indirect\]
|
||||
318: 000ba0a0300c2f00 \.99 alu\[--, --, B, 0xb\]
|
||||
320: 000ae09d40380101 \.100 asr\[gprB_3, gprA_1, >>20\]
|
||||
328: 000ba0a0300c2f00 \.101 alu\[--, --, B, 0xb\]
|
||||
330: 000ea09d40310500 \.102 asr\[gprB_3, \*n\$index, >>20\]
|
||||
338: 000ba0a0300c2f00 \.103 alu\[--, --, B, 0xb\]
|
||||
340: 0007a09d40314100 \.104 asr\[gprB_3, \*l\$index0, >>20\]
|
||||
348: 000ba0a0300c2f00 \.105 alu\[--, --, B, 0xb\]
|
||||
350: 0000249d40316100 \.106 asr\[gprB_3, \*l\$index3, >>20\]
|
||||
358: 000ba0a0300c2f00 \.107 alu\[--, --, B, 0xb\]
|
||||
360: 000a049d40314100 \.108 asr\[gprB_3, \*l\$index2, >>20\]
|
||||
368: 000ba0a0300c2f00 \.109 alu\[--, --, B, 0xb\]
|
||||
370: 0004a08d45010d00 \.110 asr\[\*l\$index0, \*n\$index\+\+, >>20\]
|
||||
378: 000ba0a0300c2f00 \.111 alu\[--, --, B, 0xb\]
|
||||
380: 000ee08d45810d00 \.112 asr\[\*l\$index1, \*n\$index\+\+, >>20\]
|
||||
388: 000ba0a0300c2f00 \.113 alu\[--, --, B, 0xb\]
|
||||
390: 000a088d45010d00 \.114 asr\[\*l\$index2, \*n\$index\+\+, >>20\]
|
||||
398: 000ba0a0300c2f00 \.115 alu\[--, --, B, 0xb\]
|
||||
3a0: 0007819d40380101 \.116 asr\[gprB_3, gprA_1, >>20\], no_cc
|
||||
3a8: 000ba0a0300c2f00 \.117 alu\[--, --, B, 0xb\]
|
||||
3b0: 000d309d40380101 \.118 asr\[gprB_3, gprA_1, >>20\], predicate_cc
|
||||
3b8: 000ba0a0300c2f00 \.119 alu\[--, --, B, 0xb\]
|
||||
3c0: 000ba28d40380101 \.120 asr\[gprA_3, gprA_1, >>20\], gpr_wrboth
|
||||
3c8: 0008c0d818c08120 \.121 beq\[\.99\]
|
||||
3d0: 000d00d877c08120 \.122 beq\[\.479\]
|
||||
3d8: 000440d877e08120 \.123 beq\[\.479\], defer\[2\]
|
||||
3e0: 000000f0000c0300 \.124 nop
|
||||
3e8: 000000f0000c0300 \.125 nop
|
||||
3f0: 000540d877c08021 \.126 bne\[\.479\]
|
||||
3f8: 0004c0d877c08022 \.127 bmi\[\.479\]
|
||||
400: 000420d877c08023 \.128 bpl\[\.479\]
|
||||
408: 0007c0d877c08024 \.129 bcs\[\.479\]
|
||||
410: 0007c0d877c08024 \.130 bcs\[\.479\]
|
||||
418: 000720d877c08025 \.131 bcc\[\.479\]
|
||||
420: 000720d877c08025 \.132 bcc\[\.479\]
|
||||
428: 0006a0d877c08026 \.133 bvs\[\.479\]
|
||||
430: 000640d877c08027 \.134 bvc\[\.479\]
|
||||
438: 0001c0d877c08028 \.135 bge\[\.479\]
|
||||
440: 000120d877c08029 \.136 blt\[\.479\]
|
||||
448: 000040d877c0802b \.137 bgt\[\.479\]
|
||||
450: 0000a0d877c0802a \.138 ble\[\.479\]
|
||||
458: 000c60d818c08038 \.139 br\[\.99\]
|
||||
460: 000920d818d08038 \.140 br\[\.99\], defer\[1\]
|
||||
468: 000000f0000c0300 \.141 nop
|
||||
470: 000bc0d077c09000 \.142 br_bclr\[gprA_0, 3, \.479\]
|
||||
478: 000980d077c0e004 \.143 br_bclr\[gprA_4, 23, \.479\]
|
||||
480: 0002a0d077c0082c \.144 br_bclr\[gprB_2, 11, \.479\]
|
||||
488: 000300d077c02423 \.145 br_bclr\[gprB_9, 2, \.479\]
|
||||
490: 000260d077c02421 \.146 br_bclr\[gprB_9, 0, \.479\]
|
||||
498: 000280d077c02420 \.147 br_bclr\[gprB_9, 31, \.479\]
|
||||
4a0: 000f00d077f02423 \.148 br_bclr\[gprB_9, 2, \.479\], defer\[3\]
|
||||
4a8: 000000f0000c0300 \.149 nop
|
||||
4b0: 000000f0000c0300 \.150 nop
|
||||
4b8: 000000f0000c0300 \.151 nop
|
||||
4c0: 000680d077c42c2b \.152 br_bset\[gprB_11, 10, \.479\]
|
||||
4c8: 0006e0d077c4ac0b \.153 br_bset\[gprA_11, 10, \.479\]
|
||||
4d0: 0002a0c877d81020 \.154 br=byte\[gprB_4, 0, 0x0, \.479\], defer\[1\]
|
||||
4d8: 000000f0000c0300 \.155 nop
|
||||
4e0: 000a60c877c81520 \.156 br=byte\[gprB_5, 1, 0x0, \.479\]
|
||||
4e8: 0001e0c877c81620 \.157 br=byte\[gprB_5, 2, 0x0, \.479\]
|
||||
4f0: 0001a4c877c94220 \.158 br=byte\[\*l\$index2, 2, 0x0, \.479\]
|
||||
4f8: 000620c877c96220 \.159 br=byte\[\*l\$index1, 2, 0x0, \.479\]
|
||||
500: 000540c877c81b20 \.160 br=byte\[gprB_6, 3, 0x0, \.479\]
|
||||
508: 0000c0c877cc16ff \.161 br=byte\[gprB_5, 2, 0xff, \.479\]
|
||||
510: 000420c877c816a2 \.162 br=byte\[gprB_5, 2, 0x42, \.479\]
|
||||
518: 000380c877c416ff \.163 br!=byte\[gprB_5, 2, 0xff, \.479\]
|
||||
520: 0002a0c877c01620 \.164 br!=byte\[gprB_5, 2, 0x0, \.479\]
|
||||
528: 000c20d877c00236 \.165 br_cls_state\[cls_ring0_status, \.479\]
|
||||
530: 0001a0d877e20236 \.166 br_cls_state\[cls_ring8_status, \.479\], defer\[2\]
|
||||
538: 000000f0000c0300 \.167 nop
|
||||
540: 000000f0000c0300 \.168 nop
|
||||
548: 000be0d877c38236 \.169 br_cls_state\[cls_ring14_status, \.479\]
|
||||
550: 0007c0d877c3c236 \.170 br_cls_state\[cls_ring15_status, \.479\]
|
||||
558: 000720d877c3c237 \.171 br_!cls_state\[cls_ring15_status, \.479\]
|
||||
560: 000cc0d877c00237 \.172 br_!cls_state\[cls_ring0_status, \.479\]
|
||||
568: 000c00d877c00030 \.173 br=ctx\[0, \.479\]
|
||||
570: 000dc0d877c08030 \.174 br=ctx\[2, \.479\]
|
||||
578: 000f00d877c18030 \.175 br=ctx\[6, \.479\]
|
||||
580: 000a40d877d18030 \.176 br=ctx\[6, \.479\], defer\[1\]
|
||||
588: 000000f0000c0300 \.177 nop
|
||||
590: 000d40d877c00234 \.178 br_inp_state\[nn_empty, \.479\]
|
||||
598: 000160d877c04234 \.179 br_inp_state\[nn_full, \.479\]
|
||||
5a0: 000c80d877c08234 \.180 br_inp_state\[ctm_ring0_status, \.479\]
|
||||
5a8: 000100d877e28234 \.181 br_inp_state\[ctm_ring8_status, \.479\], defer\[2\]
|
||||
5b0: 000000f0000c0300 \.182 nop
|
||||
5b8: 000000f0000c0300 \.183 nop
|
||||
5c0: 000a80d877c38234 \.184 br_inp_state\[ctm_ring12_status, \.479\]
|
||||
5c8: 0006a0d877c3c234 \.185 br_inp_state\[ctm_ring13_status, \.479\]
|
||||
5d0: 000640d877c3c235 \.186 br_!inp_state\[ctm_ring13_status, \.479\]
|
||||
5d8: 000c60d877c08235 \.187 br_!inp_state\[ctm_ring0_status, \.479\]
|
||||
5e0: 000260d877c04232 \.188 br_signal\[1, \.479\]
|
||||
5e8: 000f80d877c08232 \.189 br_signal\[2, \.479\]
|
||||
5f0: 0005a0d877c3c232 \.190 br_signal\[15, \.479\]
|
||||
5f8: 000540d877c3c233 \.191 br_!signal\[15, \.479\]
|
||||
600: 000b60d877f2c232 \.192 br_signal\[11, \.479\], defer\[3\]
|
||||
608: 000000f0000c0300 \.193 nop
|
||||
610: 000000f0000c0300 \.194 nop
|
||||
618: 000000f0000c0300 \.195 nop
|
||||
620: 000e40a0c0000402 \.196 alu\[gprA_0, gprB_1, \+, gprA_2\]
|
||||
628: 0004408e02081200 \.197 byte_align_le\[--, gprB_4\]
|
||||
630: 0008c08e00981200 \.198 byte_align_le\[gprA_9, gprB_4\]
|
||||
638: 0004c08e00a81200 \.199 byte_align_le\[gprA_10, gprB_4\]
|
||||
640: 0001808e00b81200 \.200 byte_align_le\[gprA_11, gprB_4\]
|
||||
648: 000e40a0c0000402 \.201 alu\[gprA_0, gprB_1, \+, gprA_2\]
|
||||
650: 000c808e02001100 \.202 byte_align_be\[--, gprB_4\]
|
||||
658: 0000008e00901100 \.203 byte_align_be\[gprA_9, gprB_4\]
|
||||
660: 000c008e00a01100 \.204 byte_align_be\[gprA_10, gprB_4\]
|
||||
668: 0009408e00b01100 \.205 byte_align_be\[gprA_11, gprB_4\]
|
||||
670: 000d80a0300c0300 \.206 alu\[--, --, B, 0x0\]
|
||||
678: 000400a5b00c0000 \.207 cam_clear
|
||||
680: 000360bb80900007 \.208 cam_lookup\[gprB_9, gprA_7\]
|
||||
688: 0003a0bb80900200 \.209 cam_lookup\[gprB_9, \*l\$index0\]
|
||||
690: 000e04bb80900200 \.210 cam_lookup\[gprB_9, \*l\$index2\]
|
||||
698: 000f84bb80900203 \.211 cam_lookup\[gprB_9, \*l\$index2\[3\]\]
|
||||
6a0: 000bc0bb80900210 \.212 cam_lookup\[gprB_9, \*l\$index0\+\+\]
|
||||
6a8: 000280aba0000241 \.213 cam_lookup\[\*l\$index0, \*n\$index\]
|
||||
6b0: 000ec0aba1000241 \.214 cam_lookup\[\*l\$index0\+\+, \*n\$index\]
|
||||
6b8: 000288aba3000243 \.215 cam_lookup\[\*l\$index3\+\+, \*n\$index\+\+\]
|
||||
6c0: 000aa0aba0200243 \.216 cam_lookup\[\*l\$index0\[2\], \*n\$index\+\+\]
|
||||
6c8: 000060bb80901407 \.217 cam_lookup\[gprB_9, gprA_7\], lm_addr0\[1\]
|
||||
6d0: 000060bb80902807 \.218 cam_lookup\[gprB_9, gprA_7\], lm_addr1\[2\]
|
||||
6d8: 000660bb80907407 \.219 cam_lookup\[gprB_9, gprA_7\], lm_addr2\[3\]
|
||||
6e0: 000660bb80904807 \.220 cam_lookup\[gprB_9, gprA_7\], lm_addr3\[0\]
|
||||
6e8: 000222ab80900007 \.221 cam_lookup\[gprA_9, gprA_7\], gpr_wrboth
|
||||
6f0: 0004b0bb80900007 \.222 cam_lookup\[gprB_9, gprA_7\], predicate_cc
|
||||
6f8: 000a00a7809c0000 \.223 cam_read_tag\[gprA_9, 0x0\]
|
||||
700: 000da2a7809c0000 \.224 cam_read_tag\[gprA_9, 0x0\], gpr_wrboth
|
||||
708: 000dd0a7809c0000 \.225 cam_read_tag\[gprA_9, 0x0\], predicate_cc
|
||||
710: 000900a7809c2800 \.226 cam_read_tag\[gprA_9, 0xa\]
|
||||
718: 000a00a7809c3c00 \.227 cam_read_tag\[gprA_9, 0xf\]
|
||||
720: 0003e0af809c0000 \.228 cam_read_state\[gprA_9, 0x0\]
|
||||
728: 000442af809c0000 \.229 cam_read_state\[gprA_9, 0x0\], gpr_wrboth
|
||||
730: 000392af809c0000 \.230 cam_read_state\[gprA_9, 0x0\], gpr_wrboth, predicate_cc
|
||||
738: 0000e0af809c2800 \.231 cam_read_state\[gprA_9, 0xa\]
|
||||
740: 0003e0af809c3c00 \.232 cam_read_state\[gprA_9, 0xf\]
|
||||
748: 000920a9f0101700 \.233 cam_write\[0x0, gprB_5, 1\]
|
||||
750: 000da0a9f01a0300 \.234 cam_write\[0x0, n\$reg_0, 1\]
|
||||
758: 000e80a9f0190700 \.235 cam_write\[0x0, \*n\$index, 1\]
|
||||
760: 0004c4a9f0180300 \.236 cam_write\[0x0, \*l\$index2, 1\]
|
||||
768: 0008e4a9f0184300 \.237 cam_write\[0x0, \*l\$index2\+\+, 1\]
|
||||
770: 000dc4a9f0184700 \.238 cam_write\[0x0, \*l\$index2--, 1\]
|
||||
778: 000840a9f0b01704 \.239 cam_write\[0x4, gprB_5, 11\]
|
||||
780: 000be0a9f0f0170f \.240 cam_write\[0xf, gprB_5, 15\]
|
||||
788: 0008a0adb01c0000 \.241 cam_write_state\[0x0, 1\]
|
||||
790: 000d80adb0bc1000 \.242 cam_write_state\[0x4, 11\]
|
||||
798: 000de0adb0fc3c00 \.243 cam_write_state\[0xf, 15\]
|
||||
7a0: 0000c0fc142c000d \.244 local_csr_wr\[CRCRemainder, gprA_13\]
|
||||
7a8: 000d20a918060348 \.245 crc_le\[crc_ccitt, \$xfer_0, \$xfer_0\]
|
||||
7b0: 000000f0000c0300 \.246 nop
|
||||
7b8: 000d40a918160748 \.247 crc_le\[crc_ccitt, \$xfer_1, \$xfer_1\]
|
||||
7c0: 000000f0000c0300 \.248 nop
|
||||
7c8: 000d40a918260b48 \.249 crc_le\[crc_ccitt, \$xfer_2, \$xfer_2\]
|
||||
7d0: 000000f0000c0300 \.250 nop
|
||||
7d8: 000d20a918360f48 \.251 crc_le\[crc_ccitt, \$xfer_3, \$xfer_3\]
|
||||
7e0: 000000f0000c0300 \.252 nop
|
||||
7e8: 000000f0000c0300 \.253 nop
|
||||
7f0: 000000f0000c0300 \.254 nop
|
||||
7f8: 000000f0000c0300 \.255 nop
|
||||
800: 000000f0000c0300 \.256 nop
|
||||
808: 000f60fc140c0000 \.257 local_csr_rd\[CRCRemainder\]
|
||||
810: 000ce0f0000c000e \.258 immed\[gprA_14, 0x0\]
|
||||
818: 000940a918060340 \.259 crc_be\[crc_ccitt, \$xfer_0, \$xfer_0\]
|
||||
820: 000000f0000c0300 \.260 nop
|
||||
828: 000920a918461340 \.261 crc_be\[crc_ccitt, \$xfer_4, \$xfer_4\]
|
||||
830: 000000f0000c0300 \.262 nop
|
||||
838: 000060a900061340 \.263 crc_be\[crc_ccitt, gprA_0, \$xfer_4\]
|
||||
840: 000000f0000c0300 \.264 nop
|
||||
848: 000c60a900001340 \.265 crc_be\[crc_ccitt, gprA_0, gprB_4\]
|
||||
850: 000000f0000c0300 \.266 nop
|
||||
858: 000000f0000c0300 \.267 nop
|
||||
860: 000000f0000c0300 \.268 nop
|
||||
868: 000000f0000c0300 \.269 nop
|
||||
870: 000000f0000c0300 \.270 nop
|
||||
878: 000600a918260380 \.271 crc_be\[crc_32, \$xfer_2, \$xfer_0\]
|
||||
880: 000000f0000c0300 \.272 nop
|
||||
888: 0004c0a9183613a0 \.273 crc_be\[crc_iscsi, \$xfer_3, \$xfer_4\]
|
||||
890: 000000f0000c0300 \.274 nop
|
||||
898: 0004c0a9000613c0 \.275 crc_be\[crc_10, gprA_0, \$xfer_4\]
|
||||
8a0: 000000f0000c0300 \.276 nop
|
||||
8a8: 000960a9000013e0 \.277 crc_be\[crc_5, gprA_0, gprB_4\]
|
||||
8b0: 000000f0000c0300 \.278 nop
|
||||
8b8: 000ea0a918862700 \.279 crc_be\[--, \$xfer_8, \$xfer_9\]
|
||||
8c0: 000000f0000c0300 \.280 nop
|
||||
8c8: 000240a918760784 \.281 crc_be\[crc_32, \$xfer_7, \$xfer_1\], bytes_0_2
|
||||
8d0: 000000f0000c0300 \.282 nop
|
||||
8d8: 0002a0a918760785 \.283 crc_be\[crc_32, \$xfer_7, \$xfer_1\], bytes_0_1
|
||||
8e0: 000000f0000c0300 \.284 nop
|
||||
8e8: 000320a918760786 \.285 crc_be\[crc_32, \$xfer_7, \$xfer_1\], byte_0
|
||||
8f0: 000000f0000c0300 \.286 nop
|
||||
8f8: 0000c0a918760781 \.287 crc_be\[crc_32, \$xfer_7, \$xfer_1\], bytes_1_3
|
||||
900: 000000f0000c0300 \.288 nop
|
||||
908: 000140a918760782 \.289 crc_be\[crc_32, \$xfer_7, \$xfer_1\], bytes_2_3
|
||||
910: 000000f0000c0300 \.290 nop
|
||||
918: 0001a0a918760783 \.291 crc_be\[crc_32, \$xfer_7, \$xfer_1\], byte_3
|
||||
920: 000000f0000c0300 \.292 nop
|
||||
928: 000782a900160780 \.293 crc_be\[crc_32, gprA_1, \$xfer_1\], gpr_wrboth
|
||||
930: 000000f0000c0300 \.294 nop
|
||||
938: 000ae3a900160780 \.295 crc_be\[crc_32, gprA_1, \$xfer_1\], no_cc, gpr_wrboth
|
||||
940: 000000f0000c0300 \.296 nop
|
||||
948: 000b73a900560780 \.297 crc_be\[crc_32, gprA_5, \$xfer_1\], no_cc, gpr_wrboth, predicate_cc
|
||||
950: 000000f0000c0300 \.298 nop
|
||||
958: 000122a900560781 \.299 crc_be\[crc_32, gprA_5, \$xfer_1\], bytes_1_3, gpr_wrboth
|
||||
960: 000000f0000c0300 \.300 nop
|
||||
968: 000000f0000c0300 \.301 nop
|
||||
970: 000000f0000c0300 \.302 nop
|
||||
978: 000000f0000c0300 \.303 nop
|
||||
980: 000000f0000c0300 \.304 nop
|
||||
988: 000000f0000c0300 \.305 nop
|
||||
990: 0005a0e000080000 \.306 ctx_arb\[--\]
|
||||
998: 000600e000000001 \.307 ctx_arb\[voluntary\]
|
||||
9a0: 000220e000020000 \.308 ctx_arb\[bpt\]
|
||||
9a8: 000460e000000220 \.309 ctx_arb\[sig5, sig9\]
|
||||
9b0: 000d20e000200220 \.310 ctx_arb\[sig5, sig9\], defer\[2\]
|
||||
9b8: 000180a0300c0f00 \.311 alu\[--, --, B, 0x3\]
|
||||
9c0: 0007a0a0300c1f00 \.312 alu\[--, --, B, 0x7\]
|
||||
9c8: 0006a0e000010220 \.313 ctx_arb\[sig5, sig9\], any
|
||||
9d0: 000a60e077c40220 \.314 ctx_arb\[sig5, sig9\], br\[\.479\]
|
||||
9d8: 0006409010500701 \.315 dbl_shf\[gprB_5, gprA_1, gprB_1, >>1\]
|
||||
9e0: 000d4090a0500701 \.316 dbl_shf\[gprB_5, gprA_1, gprB_1, >>10\]
|
||||
9e8: 000c4091f0500701 \.317 dbl_shf\[gprB_5, gprA_1, gprB_1, >>31\]
|
||||
9f0: 000740a440000402 \.318 alu\[gprA_0, gprB_1, AND, gprA_2\]
|
||||
9f8: 0000c09000500701 \.319 dbl_shf\[gprB_5, gprA_1, gprB_1, >>indirect\]
|
||||
a00: 000b219010500701 \.320 dbl_shf\[gprB_5, gprA_1, gprB_1, >>1\], no_cc
|
||||
a08: 000cf19010500701 \.321 dbl_shf\[gprB_5, gprA_1, gprB_1, >>1\], no_cc, predicate_cc
|
||||
a10: 0000d28010500701 \.322 dbl_shf\[gprA_5, gprA_1, gprB_1, >>1\], gpr_wrboth, predicate_cc
|
||||
a18: 000200a700f03f00 \.323 ffs\[gprA_15, gprB_15\]
|
||||
a20: 000fe0b740fc000f \.324 ffs\[gprB_15, gprA_15\]
|
||||
a28: 000ec0b700f61300 \.325 ffs\[gprB_15, \$xfer_4\]
|
||||
a30: 000660b700f88300 \.326 ffs\[gprB_15, \*l\$index1\]
|
||||
a38: 0007e4b700f8c300 \.327 ffs\[gprB_15, \*l\$index3\+\+\]
|
||||
a40: 0002c4b700f8c700 \.328 ffs\[gprB_15, \*l\$index3--\]
|
||||
a48: 0004c4b700f8a700 \.329 ffs\[gprB_15, \*l\$index3\[9\]\]
|
||||
a50: 000880a720000300 \.330 ffs\[\*l\$index0, gprB_0\]
|
||||
a58: 000108a722090700 \.331 ffs\[\*l\$index3, \*n\$index\]
|
||||
a60: 000128a723190f00 \.332 ffs\[\*l\$index3--, \*n\$index\+\+\]
|
||||
a68: 0003c3a740fc000f \.333 ffs\[gprA_15, gprA_15\], no_cc, gpr_wrboth
|
||||
a70: 000972a740fc000f \.334 ffs\[gprA_15, gprA_15\], gpr_wrboth, predicate_cc
|
||||
a78: 000320f0000c0803 \.335 immed\[gprA_3, 0x2\]
|
||||
a80: 000480e8004d4803 \.336 jump\[gprA_3, \.338\]
|
||||
a88: 0006a0d854408038 \.337 br\[\.337\]
|
||||
a90: 000460f000002701 \.338 immed\[gprB_9, 0x1\]
|
||||
a98: 0006a0d854408038 \.339 br\[\.337\]
|
||||
aa0: 0005e0f000002702 \.340 immed\[gprB_9, 0x2\]
|
||||
aa8: 0006a0d854408038 \.341 br\[\.337\]
|
||||
ab0: 000500f000002703 \.342 immed\[gprB_9, 0x3\]
|
||||
ab8: 0006a0d854408038 \.343 br\[\.337\]
|
||||
ac0: 000040c001000000 \.344 ld_field\[gprA_0, 0001, gprB_0\]
|
||||
ac8: 0007e2c001000000 \.345 ld_field\[gprA_0, 0001, gprB_0\], gpr_wrboth
|
||||
ad0: 000e40c401000000 \.346 ld_field\[gprA_0, 0001, gprB_0\], load_cc
|
||||
ad8: 000790c001000000 \.347 ld_field\[gprA_0, 0001, gprB_0\], predicate_cc
|
||||
ae0: 0005c0c005000000 \.348 ld_field\[gprA_0, 0101, gprB_0\]
|
||||
ae8: 000080c005100000 \.349 ld_field_w_clr\[gprA_0, 0101, gprB_0\]
|
||||
af0: 0002a2c001100000 \.350 ld_field_w_clr\[gprA_0, 0001, gprB_0\], gpr_wrboth
|
||||
af8: 000b00c401100000 \.351 ld_field_w_clr\[gprA_0, 0001, gprB_0\], load_cc
|
||||
b00: 0002d0c001100000 \.352 ld_field_w_clr\[gprA_0, 0001, gprB_0\], predicate_cc
|
||||
b08: 000fc0c00f000000 \.353 ld_field\[gprA_0, 1111, gprB_0\]
|
||||
b10: 0005e0c1fb000200 \.354 ld_field\[gprA_0, 1011, gprB_0, <<1\]
|
||||
b18: 000460c01b000100 \.355 ld_field\[gprA_0, 1011, gprB_0, >>1\]
|
||||
b20: 000e60c1fb000100 \.356 ld_field\[gprA_0, 1011, gprB_0, >>31\]
|
||||
b28: 000bc0c09b000000 \.357 ld_field\[gprA_0, 1011, gprB_0, >>rot9\]
|
||||
b30: 000e80c09b100000 \.358 ld_field_w_clr\[gprA_0, 1011, gprB_0, >>rot9\]
|
||||
b38: 0001c0c17b000000 \.359 ld_field\[gprA_0, 1011, gprB_0, >>rot23\]
|
||||
b40: 0002c0c41b000000 \.360 ld_field\[gprA_0, 1011, gprB_0, >>rot1\], load_cc
|
||||
b48: 000780c41b100000 \.361 ld_field_w_clr\[gprA_0, 1011, gprB_0, >>rot1\], load_cc
|
||||
b50: 000400f0001f7c01 \.362 immed\[gprA_1, 0x1df\]
|
||||
b58: 000200f0001007df \.363 immed\[gprB_1, 0x1df\]
|
||||
b60: 0005a2f0001007df \.364 immed\[gprB_1, 0x1df\], gpr_wrboth
|
||||
b68: 0005d0f0001007df \.365 immed\[gprB_1, 0x1df\], predicate_cc
|
||||
b70: 000020fc010c0000 \.366 local_csr_rd\[ALUOut\]
|
||||
b78: 000e60f0000c000b \.367 immed\[gprA_11, 0x0\]
|
||||
b80: 000ce0fc160c0000 \.368 local_csr_rd\[MiscControl\]
|
||||
b88: 000e60f0000c000b \.369 immed\[gprA_11, 0x0\]
|
||||
b90: 000ae0fc076c0b02 \.370 local_csr_wr\[XferIndex, 0x2\]
|
||||
b98: 0008a0fc076c0003 \.371 local_csr_wr\[XferIndex, gprA_3\]
|
||||
ba0: 000520fc07600f00 \.372 local_csr_wr\[XferIndex, gprB_3\]
|
||||
ba8: 000f20fc01a00f00 \.373 local_csr_wr\[CtxEnables, gprB_3\]
|
||||
bb0: 000480f800000c02 \.374 mul_step\[gprA_2, gprB_3\], start
|
||||
bb8: 000880f980000c02 \.375 mul_step\[gprA_2, gprB_3\], 32x32_step1
|
||||
bc0: 000dc0f980100c02 \.376 mul_step\[gprA_2, gprB_3\], 32x32_step2
|
||||
bc8: 0001c0f980200c02 \.377 mul_step\[gprA_2, gprB_3\], 32x32_step3
|
||||
bd0: 000480f980300c02 \.378 mul_step\[gprA_2, gprB_3\], 32x32_step4
|
||||
bd8: 000940f9804c0002 \.379 mul_step\[gprA_2, --\], 32x32_last
|
||||
be0: 000ce0f9805c0003 \.380 mul_step\[gprA_3, --\], 32x32_last2
|
||||
be8: 0001a0f800000802 \.381 mul_step\[gprA_2, gprB_2\], start
|
||||
bf0: 000aa0f900000802 \.382 mul_step\[gprA_2, gprB_2\], 16x16_step1
|
||||
bf8: 000fe0f900100802 \.383 mul_step\[gprA_2, gprB_2\], 16x16_step2
|
||||
c00: 000f20f9004c0000 \.384 mul_step\[gprA_0, --\], 16x16_last
|
||||
c08: 0001a0f800000802 \.385 mul_step\[gprA_2, gprB_2\], start
|
||||
c10: 0006a0f880000802 \.386 mul_step\[gprA_2, gprB_2\], 24x8_step1
|
||||
c18: 000320f8804c0000 \.387 mul_step\[gprA_0, --\], 24x8_last
|
||||
c20: 0001a0f800000802 \.388 mul_step\[gprA_2, gprB_2\], start
|
||||
c28: 0006a0f880000802 \.389 mul_step\[gprA_2, gprB_2\], 24x8_step1
|
||||
c30: 0004f0f8804c0000 \.390 mul_step\[gprA_0, --\], 24x8_last, predicate_cc
|
||||
c38: 0001a0f800000802 \.391 mul_step\[gprA_2, gprB_2\], start
|
||||
c40: 0006a0f880000802 \.392 mul_step\[gprA_2, gprB_2\], 24x8_step1
|
||||
c48: 0009e3f8804c0000 \.393 mul_step\[gprA_0, --\], 24x8_last, no_cc, gpr_wrboth
|
||||
c50: 000b80a330000000 \.394 pop_count1\[gprB_0\]
|
||||
c58: 000c80a3b0000000 \.395 pop_count2\[gprB_0\]
|
||||
c60: 000d80a180000000 \.396 pop_count3\[gprA_0, gprB_0\]
|
||||
c68: 000b80a330000000 \.397 pop_count1\[gprB_0\]
|
||||
c70: 000c80a3b0000000 \.398 pop_count2\[gprB_0\]
|
||||
c78: 000743a180000000 \.399 pop_count3\[gprA_0, gprB_0\], no_cc, gpr_wrboth
|
||||
c80: 0004a4a330088000 \.400 pop_count1\[\*l\$index3\]
|
||||
c88: 0003a4a3b0088000 \.401 pop_count2\[\*l\$index3\]
|
||||
c90: 0000e5a1a438c000 \.402 pop_count3\[\*n\$index\+\+, \*l\$index3\+\+\], no_cc
|
||||
c98: 000b80a330000000 \.403 pop_count1\[gprB_0\]
|
||||
ca0: 000c80a3b0000000 \.404 pop_count2\[gprB_0\]
|
||||
ca8: 000731a180000000 \.405 pop_count3\[gprA_0, gprB_0\], no_cc, predicate_cc
|
||||
cb0: 000480e8000c0000 \.406 rtn\[gprA_0\]
|
||||
cb8: 000620e8000a0700 \.407 rtn\[n\$reg_1\]
|
||||
cc0: 000600e800088300 \.408 rtn\[\*l\$index1\]
|
||||
cc8: 000a64e800080300 \.409 rtn\[\*l\$index2\]
|
||||
cd0: 000dc0e800200300 \.410 rtn\[gprB_0\], defer\[2\]
|
||||
cd8: 0008a0a0300c0700 \.411 alu\[--, --, B, 0x1\]
|
||||
ce0: 0004a0a0300c0b00 \.412 alu\[--, --, B, 0x2\]
|
||||
ce8: 000000f0000c0300 \.413 nop
|
||||
cf0: 000000f0000c0300 \.414 nop
|
||||
cf8: 000000f0000c0300 \.415 nop
|
||||
d00: 000000f0000c0300 \.416 nop
|
||||
d08: 0003501842300c09 \.417 arm\[read, \$xfer_3, gprA_9, gprB_3, 2\], ctx_swap\[sig4\]
|
||||
d10: 0005501842302403 \.418 arm\[read, \$xfer_3, gprA_3, gprB_9, 2\], ctx_swap\[sig4\]
|
||||
d18: 0004801842300c09 \.419 arm\[read, \$xfer_3, gprA_9, <<8, gprB_3, 2\], ctx_swap\[sig4\]
|
||||
d20: 000f241842302403 \.420 arm\[read, \$xfer_3, gprB_9, <<8, gprA_3, 2\], ctx_swap\[sig4\]
|
||||
d28: 0004a0a0300c0b00 \.421 alu\[--, --, B, 0x2\]
|
||||
d30: 0008861842302403 \.422 arm\[read, \$xfer_3, gprB_9, <<8, gprA_3, 2\], indirect_ref, ctx_swap\[sig4\]
|
||||
d38: 0004a0a0300c0b00 \.423 alu\[--, --, B, 0x2\]
|
||||
d40: 000e8618e2302703 \.424 arm\[read, \$xfer_3, gprB_9, <<8, gprA_3, 2\], indirect_ref, sig_done\[sig14\]
|
||||
d48: 0007841842302503 \.425 arm\[read, \$xfer_3, gprB_9, <<8, gprA_3, 2\], ctx_swap\[sig4\], defer\[1\]
|
||||
d50: 0008a0a0300c0700 \.426 alu\[--, --, B, 0x1\]
|
||||
d58: 000f101843c00c09 \.427 arm\[read, \$xfer_28, gprA_9, gprB_3, 2\], ctx_swap\[sig4\]
|
||||
d60: 000910184e800c09 \.428 arm\[read, \$xfer_8, gprA_9, gprB_3, 8\], ctx_swap\[sig4\]
|
||||
d68: 000a106440800c09 \.429 cls\[add, \$xfer_8, gprA_9, gprB_3, 1\], ctx_swap\[sig4\]
|
||||
d70: 0000f0664080a009 \.430 cls\[sub, \$xfer_8, gprA_9, 0x8, 1\], ctx_swap\[sig4\]
|
||||
d78: 000160644284a009 \.431 cls\[add64, \$xfer_8, gprA_9, <<8, 0x8, 2\], ctx_swap\[sig4\]
|
||||
d80: 000404664284a408 \.432 cls\[sub64, \$xfer_8, 0x9, <<8, gprA_8, 2\], ctx_swap\[sig4\]
|
||||
d88: 0008a0a0300c0700 \.433 alu\[--, --, B, 0x1\]
|
||||
d90: 00032c650340a708 \.434 cls\[add_imm, 0x14, 0x9, <<8, gprA_8, 2\]
|
||||
d98: 0007506040880c09 \.435 cls\[swap/test_compare_write, \$xfer_8, gprA_9, gprB_3, 1\], ctx_swap\[sig4\]
|
||||
da0: 00023c6500007f9a \.436 cls\[add_imm, 0x1f9a, --, 1\]
|
||||
da8: 000038653c583f14 \.437 cls\[add_imm, 0xf14, 0xf16\]
|
||||
db0: 000b54640013c30f \.438 cls\[add, \$xfer_1, 0xf00f, 1\]
|
||||
db8: 0002901c10a08000 \.439 ct\[xpb_read, \$xfer_10, gprA_0, 0x0, 1\], ctx_swap\[sig1\]
|
||||
dc0: 0007501e10a48000 \.440 ct\[reflect_read_sig_init, \$xfer_10, gprA_0, 0x0, 1\], ctx_swap\[sig1\]
|
||||
dc8: 000a501c10a48000 \.441 ct\[ring_get, \$xfer_10, gprA_0, 0x0, 1\], ctx_swap\[sig1\]
|
||||
dd0: 000000f0000c0300 \.442 nop
|
||||
dd8: 000cc0474a80a009 \.443 mem\[add64, \$xfer_8, gprA_9, <<8, 0x8, 6\], ctx_swap\[sig4\]
|
||||
de0: 000d40404280a009 \.444 mem\[read, \$xfer_8, gprA_9, <<8, 0x8, 2\], ctx_swap\[sig4\]
|
||||
de8: 000c405c4280a009 \.445 mem\[read32, \$xfer_8, gprA_9, <<8, 0x8, 2\], ctx_swap\[sig4\]
|
||||
df0: 000ea0554280a009 \.446 mem\[ctm\.pe_dma_to_memory_indirect/emem\.get/imem\.lb_bucket_read_local, \$xfer_8, gprA_9, <<8, 0x8, 2\], ctx_swap\[sig4\]
|
||||
df8: 0009204c408ca309 \.447 mem\[lock128/lock384, \$xfer_8, gprA_9, <<8, 0x8, 1\], sig_done\[sig4\]
|
||||
e00: 000f20e000000030 \.448 ctx_arb\[sig4, sig5\]
|
||||
e08: 0000a04c488ca309 \.449 mem\[lock256/lock512, \$xfer_8, gprA_9, <<8, 0x8, 5\], sig_done\[sig4\]
|
||||
e10: 000f20e000000030 \.450 ctx_arb\[sig4, sig5\]
|
||||
e18: 000ae04d4084a009 \.451 mem\[microq128_pop, \$xfer_8, gprA_9, <<8, 0x8, 1\], ctx_swap\[sig4\]
|
||||
e20: 0002204d4080a009 \.452 mem\[microq128_get, \$xfer_8, gprA_9, <<8, 0x8, 1\], ctx_swap\[sig4\]
|
||||
e28: 000ba04d4880a009 \.453 mem\[microq256_get, \$xfer_8, gprA_9, <<8, 0x8, 5\], ctx_swap\[sig4\]
|
||||
e30: 0003805700028309 \.454 mem\[ctm\.pe_dma_from_memory_buffer/emem\.fast_journal/imem\.lb_push_stats_local, \$xfer_0, gprA_9, <<8, 0x40, 1\]
|
||||
e38: 0005e04e4000a309 \.455 mem\[queue128_lock, \$xfer_0, gprA_9, <<8, 0x8, 1\], sig_done\[sig4\]
|
||||
e40: 000f20e000000030 \.456 ctx_arb\[sig4, sig5\]
|
||||
e48: 0001a04e0004a309 \.457 mem\[queue128_unlock, \$xfer_0, gprA_9, <<8, 0x8, 1\]
|
||||
e50: 000c604e4800a309 \.458 mem\[queue256_lock, \$xfer_0, gprA_9, <<8, 0x8, 5\], sig_done\[sig4\]
|
||||
e58: 000f20e000000030 \.459 ctx_arb\[sig4, sig5\]
|
||||
e60: 0008204e0804a309 \.460 mem\[queue256_unlock, \$xfer_0, gprA_9, <<8, 0x8, 5\]
|
||||
e68: 0008a05000001309 \.461 mem\[ctm\.packet_wait_packet_status/emem\.rd_qdesc/imem\.stats_log, \$xfer_0, gprA_9, <<8, gprB_4, 1\]
|
||||
e70: 000b840092200c02 \.462 ila\[read, \$xfer_2, gprB_3, <<8, gprA_2, 2\], ctx_swap\[sig9\]
|
||||
e78: 0005440182240f02 \.463 ila\[write_check_error, \$xfer_2, gprB_3, <<8, gprA_2, 2\], sig_done\[sig8\]
|
||||
e80: 000d60e000000300 \.464 ctx_arb\[sig8, sig9\]
|
||||
e88: 0007800410600000 \.465 nbi\[read, \$xfer_6, gprA_0, <<8, gprB_0, 1\], ctx_swap\[sig1\]
|
||||
e90: 0002600c62000000 \.466 pcie\[read, \$xfer_0, gprA_0, <<8, gprB_0, 2\], ctx_swap\[sig6\]
|
||||
e98: 0004c40d62000000 \.467 pcie\[write, \$xfer_0, gprB_0, <<8, gprA_0, 2\], ctx_swap\[sig6\]
|
||||
ea0: 000d601462000000 \.468 crypto\[read, \$xfer_0, gprA_0, <<8, gprB_0, 2\], ctx_swap\[sig6\]
|
||||
ea8: 0006601562000000 \.469 crypto\[write, \$xfer_0, gprA_0, <<8, gprB_0, 2\], ctx_swap\[sig6\]
|
||||
eb0: 0000601662000000 \.470 crypto\[write_fifo, \$xfer_0, gprA_0, <<8, gprB_0, 2\], ctx_swap\[sig6\]
|
||||
eb8: 000d840d60000050 \.471 pcie\[write, \$xfer_0, gprB_0, <<8, \*l\$index0, 1\], ctx_swap\[sig6\]
|
||||
ec0: 0009e40d60000058 \.472 pcie\[write, \$xfer_0, gprB_0, <<8, \*l\$index1, 1\], ctx_swap\[sig6\]
|
||||
ec8: 0009040d60000059 \.473 pcie\[write, \$xfer_0, gprB_0, <<8, \*l\$index1\[1\], 1\], ctx_swap\[sig6\]
|
||||
ed0: 000000f0000c0300 \.474 nop
|
||||
ed8: 000000f0000c0300 \.475 nop
|
||||
ee0: 000000f0000c0300 \.476 nop
|
||||
ee8: 000000f0000c0300 \.477 nop
|
||||
ef0: 000000f0000c0300 \.478 nop
|
||||
ef8: 000220e000020000 \.479 ctx_arb\[bpt\]
|
||||
f00: 000420e000010000 \.480 ctx_arb\[kill\]
|
||||
|
||||
Disassembly of section \.text\.i33\.me9:
|
||||
|
||||
0000000000000000 <\.text\.i33\.me9>:
|
||||
0: 000540f0012cd000 \.0 immed\[gprA_0, 0x1234\]
|
||||
8: 0002c0f0012cd280 \.1 immed\[n\$reg_0, 0x1234\]
|
||||
10: 000220f0012cd281 \.2 immed\[n\$reg_1, 0x1234\]
|
||||
18: 000660f0012cd200 \.3 immed\[\*l\$index0, 0x1234\]
|
||||
20: 0007c0f0012cd220 \.4 immed\[\*l\$index1, 0x1234\]
|
||||
28: 000fa0f0012cd230 \.5 immed\[\*l\$index1\+\+, 0x1234\]
|
||||
30: 000f40f0012cd231 \.6 immed\[\*l\$index1--, 0x1234\]
|
||||
38: 0008c8f0012cd200 \.7 immed\[\*l\$index2, 0x1234\]
|
||||
40: 0000a8f0012cd210 \.8 immed\[\*l\$index2\+\+, 0x1234\]
|
||||
48: 000048f0012cd211 \.9 immed\[\*l\$index2--, 0x1234\]
|
||||
50: 000968f0012cd220 \.10 immed\[\*l\$index3, 0x1234\]
|
||||
58: 0007e0f0012cd203 \.11 immed\[\*l\$index0\[3\], 0x1234\]
|
||||
60: 000540f0012cd225 \.12 immed\[\*l\$index1\[5\], 0x1234\]
|
||||
68: 000b28f0012cd207 \.13 immed\[\*l\$index2\[7\], 0x1234\]
|
||||
70: 000de8f0012cd229 \.14 immed\[\*l\$index3\[9\], 0x1234\]
|
||||
78: 000000f00ff003ff \.15 immed\[gprB_0, 0xffff\]
|
||||
80: 000d60f220000bff \.16 immed_b1\[gprB_2, 0xff\]
|
||||
88: 000f60f6200007ff \.17 immed_b3\[gprB_1, 0xff\]
|
||||
90: 000080f080000f00 \.18 immed\[gprB_3, 0xffffffff\]
|
||||
98: 000100f086600f77 \.19 immed\[gprB_3, 0xffff9988\]
|
||||
a0: 000940f0012cd180 \.20 immed\[\$xfer_0, 0x1234\]
|
||||
a8: 000a00f0043c8581 \.21 immed\[\$xfer_1, 0x4321\]
|
||||
b0: 000b40f0056de19e \.22 immed\[\$xfer_30, 0x5678\]
|
||||
b8: 0007c0f0400e8401 \.23 immed_w0\[gprA_1, 0xa1\]
|
||||
c0: 000440f4400e8802 \.24 immed_w1\[gprA_2, 0xa2\]
|
||||
c8: 000d00f4000e8c03 \.25 immed\[gprA_3, 0xa3, <<16\]
|
||||
d0: 000520f001200334 \.26 immed\[gprB_0, 0x1234\]
|
||||
d8: 000fa0f0400007b1 \.27 immed_w0\[gprB_1, 0xb1\]
|
||||
e0: 000c20f440000bb2 \.28 immed_w1\[gprB_2, 0xb2\]
|
||||
e8: 000560f400000fb3 \.29 immed\[gprB_3, 0xb3, <<16\]
|
||||
f0: 000660f200000fb3 \.30 immed\[gprB_3, 0xb3, <<8\]
|
||||
f8: 0001b0f200000fb3 \.31 immed\[gprB_3, 0xb3, <<8\], predicate_cc
|
||||
100: 0001c2f200000fb3 \.32 immed\[gprB_3, 0xb3, <<8\], gpr_wrboth
|
||||
108: 000ba0a0300c2f00 \.33 alu\[--, --, B, 0xb\]
|
||||
110: 0005a081f200da00 \.34 alu_shf\[--, --, B, 0x16, <<1\]
|
||||
118: 000be081d2018600 \.35 alu_shf\[--, --, B, 0x21, <<3\]
|
||||
120: 000240801201b200 \.36 alu_shf\[--, --, B, 0x2c, <<31\]
|
||||
128: 000fa081f800da00 \.37 alu_shf\[\$xfer_0, --, B, 0x16, <<1\]
|
||||
130: 0009e081f840da00 \.38 alu_shf\[\$xfer_4, --, B, 0x16, <<1\]
|
||||
138: 0009a081f980da00 \.39 alu_shf\[\$xfer_24, --, B, 0x16, <<1\]
|
||||
140: 0003e081f9f0da00 \.40 alu_shf\[\$xfer_31, --, B, 0x16, <<1\]
|
||||
148: 0004a0a0280c2f00 \.41 alu\[n\$reg_0, --, B, 0xb\]
|
||||
150: 0001e0a0281c2f00 \.42 alu\[n\$reg_1, --, B, 0xb\]
|
||||
158: 000880a0a00c2400 \.43 alu\[\*l\$index0, gprA_0, \+, 0x9\]
|
||||
160: 000100a0a43c2400 \.44 alu\[\*n\$index\+\+, gprA_0, \+, 0x9\]
|
||||
168: 000b208bc500a600 \.45 alu_shf\[\*l\$index0, gprA_0, OR, 0x9, <<4\]
|
||||
170: 000b00a0a20c2400 \.46 alu\[\*l\$index1, gprA_0, \+, 0x9\]
|
||||
178: 000740a0a30c2400 \.47 alu\[\*l\$index1\+\+, gprA_0, \+, 0x9\]
|
||||
180: 000200a0a31c2400 \.48 alu\[\*l\$index1--, gprA_0, \+, 0x9\]
|
||||
188: 000628a0a00c2400 \.49 alu\[\*l\$index2, gprA_0, \+, 0x9\]
|
||||
190: 000988aa210c2400 \.50 alu\[\*l\$index2\+\+, gprA_0, OR, 0x9\]
|
||||
198: 000f28a0a11c2400 \.51 alu\[\*l\$index2--, gprA_0, \+, 0x9\]
|
||||
1a0: 0005a8a0a20c2400 \.52 alu\[\*l\$index3, gprA_0, \+, 0x9\]
|
||||
1a8: 000480a0a03c2400 \.53 alu\[\*l\$index0\[3\], gprA_0, \+, 0x9\]
|
||||
1b0: 000800a0a25c2400 \.54 alu\[\*l\$index1\[5\], gprA_0, \+, 0x9\]
|
||||
1b8: 000c68a0a07c2400 \.55 alu\[\*l\$index2\[7\], gprA_0, \+, 0x9\]
|
||||
1c0: 000aa8a0a29c2400 \.56 alu\[\*l\$index3\[9\], gprA_0, \+, 0x9\]
|
||||
1c8: 000cc4b0c008a400 \.57 alu\[gprB_0, \*l\$index3\[9\], \+, gprA_0\]
|
||||
1d0: 000fe4b0c008c000 \.58 alu\[gprB_0, \*l\$index3\+\+, \+, gprA_0\]
|
||||
1d8: 000ac4b0c008c400 \.59 alu\[gprB_0, \*l\$index3--, \+, gprA_0\]
|
||||
1e0: 000bc4b080000229 \.60 alu\[gprB_0, \*l\$index3\[9\], \+, gprB_0\]
|
||||
1e8: 000724b080000230 \.61 alu\[gprB_0, \*l\$index3\+\+, \+, gprB_0\]
|
||||
1f0: 0007c4b080000231 \.62 alu\[gprB_0, \*l\$index3--, \+, gprB_0\]
|
||||
1f8: 000664b080000211 \.63 alu\[gprB_0, \*l\$index2--, \+, gprB_0\]
|
||||
200: 000a60b080000231 \.64 alu\[gprB_0, \*l\$index1--, \+, gprB_0\]
|
||||
208: 000bc0b080000211 \.65 alu\[gprB_0, \*l\$index0--, \+, gprB_0\]
|
||||
210: 000340b080000200 \.66 alu\[gprB_0, \*l\$index0, \+, gprB_0\]
|
||||
218: 000ee4b080000200 \.67 alu\[gprB_0, \*l\$index2, \+, gprB_0\]
|
||||
220: 000100b080000241 \.68 alu\[gprB_0, \*n\$index, \+, gprB_0\]
|
||||
228: 0004809bf0000241 \.69 alu_shf\[gprB_0, \*n\$index, OR, gprB_0, <<1\]
|
||||
230: 000f20a0001fff00 \.70 alu\[gprA_1, --, B, 0xff\]
|
||||
238: 0005c0b0002fff00 \.71 alu\[gprB_2, --, B, 0xff\]
|
||||
240: 000940a0000d6f00 \.72 alu\[gprA_0, --, B, 0x5b\]
|
||||
248: 000440a2000d6f00 \.73 alu\[gprA_0, --, ~B, 0x5b\]
|
||||
250: 000de081f032f200 \.74 alu_shf\[gprA_3, --, B, 0x5c, <<1\]
|
||||
258: 000de091d012f600 \.75 alu_shf\[gprB_1, --, B, 0x5d, <<3\]
|
||||
260: 000d60901022fa00 \.76 alu_shf\[gprB_2, --, B, 0x5e, <<31\]
|
||||
268: 000e40a0c0000402 \.77 alu\[gprA_0, gprB_1, \+, gprA_2\]
|
||||
270: 000340a2c0000402 \.78 alu\[gprA_0, gprB_1, \+16, gprA_2\]
|
||||
278: 000040a4c0000402 \.79 alu\[gprA_0, gprB_1, \+8, gprA_2\]
|
||||
280: 0007a0a8c0000402 \.80 alu\[gprA_0, gprB_1, \+carry, gprA_2\]
|
||||
288: 000d40a6c0000402 \.81 alu\[gprA_0, gprB_1, -carry, gprA_2\]
|
||||
290: 000aa0aac0000402 \.82 alu\[gprA_0, gprB_1, -, gprA_2\]
|
||||
298: 0009a0acc0000402 \.83 alu\[gprA_0, gprB_1, B-A, gprA_2\]
|
||||
2a0: 000da0aa40000402 \.84 alu\[gprA_0, gprB_1, OR, gprA_2\]
|
||||
2a8: 000740a440000402 \.85 alu\[gprA_0, gprB_1, AND, gprA_2\]
|
||||
2b0: 000a40a640000402 \.86 alu\[gprA_0, gprB_1, ~AND, gprA_2\]
|
||||
2b8: 0000a0a840000402 \.87 alu\[gprA_0, gprB_1, AND~, gprA_2\]
|
||||
2c0: 000ea0ac40000402 \.88 alu\[gprA_0, gprB_1, XOR, gprA_2\]
|
||||
2c8: 000321a0c0000402 \.89 alu\[gprA_0, gprB_1, \+, gprA_2\], no_cc
|
||||
2d0: 000990a0c0000402 \.90 alu\[gprA_0, gprB_1, \+, gprA_2\], predicate_cc
|
||||
2d8: 0009e2a0c0000402 \.91 alu\[gprA_0, gprB_1, \+, gprA_2\], gpr_wrboth
|
||||
2e0: 000353a0c0000402 \.92 alu\[gprA_0, gprB_1, \+, gprA_2\], no_cc, gpr_wrboth, predicate_cc
|
||||
2e8: 000d418b70080602 \.93 alu_shf\[gprA_0, gprB_1, OR, gprA_2, <<9\], no_cc
|
||||
2f0: 0006708a90080502 \.94 alu_shf\[gprA_0, gprB_1, OR, gprA_2, >>9\], predicate_cc
|
||||
2f8: 000ea28a90080402 \.95 alu_shf\[gprA_0, gprB_1, OR, gprA_2, >>rot9\], gpr_wrboth
|
||||
300: 000e138b70080402 \.96 alu_shf\[gprA_0, gprB_1, OR, gprA_2, >>rot23\], no_cc, gpr_wrboth, predicate_cc
|
||||
308: 000ba08a00080602 \.97 alu_shf\[gprA_0, gprB_1, OR, gprA_2, <<indirect\]
|
||||
310: 0000208a00080502 \.98 alu_shf\[gprA_0, gprB_1, OR, gprA_2, >>indirect\]
|
||||
318: 000ba0a0300c2f00 \.99 alu\[--, --, B, 0xb\]
|
||||
320: 000ae09d40380101 \.100 asr\[gprB_3, gprA_1, >>20\]
|
||||
328: 000ba0a0300c2f00 \.101 alu\[--, --, B, 0xb\]
|
||||
330: 000ea09d40310500 \.102 asr\[gprB_3, \*n\$index, >>20\]
|
||||
338: 000ba0a0300c2f00 \.103 alu\[--, --, B, 0xb\]
|
||||
340: 0007a09d40314100 \.104 asr\[gprB_3, \*l\$index0, >>20\]
|
||||
348: 000ba0a0300c2f00 \.105 alu\[--, --, B, 0xb\]
|
||||
350: 0000249d40316100 \.106 asr\[gprB_3, \*l\$index3, >>20\]
|
||||
358: 000ba0a0300c2f00 \.107 alu\[--, --, B, 0xb\]
|
||||
360: 000a049d40314100 \.108 asr\[gprB_3, \*l\$index2, >>20\]
|
||||
368: 000ba0a0300c2f00 \.109 alu\[--, --, B, 0xb\]
|
||||
370: 0004a08d45010d00 \.110 asr\[\*l\$index0, \*n\$index\+\+, >>20\]
|
||||
378: 000ba0a0300c2f00 \.111 alu\[--, --, B, 0xb\]
|
||||
380: 000ee08d45810d00 \.112 asr\[\*l\$index1, \*n\$index\+\+, >>20\]
|
||||
388: 000ba0a0300c2f00 \.113 alu\[--, --, B, 0xb\]
|
||||
390: 000a088d45010d00 \.114 asr\[\*l\$index2, \*n\$index\+\+, >>20\]
|
||||
398: 000ba0a0300c2f00 \.115 alu\[--, --, B, 0xb\]
|
||||
3a0: 0007819d40380101 \.116 asr\[gprB_3, gprA_1, >>20\], no_cc
|
||||
3a8: 000ba0a0300c2f00 \.117 alu\[--, --, B, 0xb\]
|
||||
3b0: 000d309d40380101 \.118 asr\[gprB_3, gprA_1, >>20\], predicate_cc
|
||||
3b8: 000ba0a0300c2f00 \.119 alu\[--, --, B, 0xb\]
|
||||
3c0: 000ba28d40380101 \.120 asr\[gprA_3, gprA_1, >>20\], gpr_wrboth
|
||||
3c8: 0008c0d818c08120 \.121 beq\[\.99\]
|
||||
3d0: 000d00d877c08120 \.122 beq\[\.479\]
|
||||
3d8: 000440d877e08120 \.123 beq\[\.479\], defer\[2\]
|
||||
3e0: 000000f0000c0300 \.124 nop
|
||||
3e8: 000000f0000c0300 \.125 nop
|
||||
3f0: 000540d877c08021 \.126 bne\[\.479\]
|
||||
3f8: 0004c0d877c08022 \.127 bmi\[\.479\]
|
||||
400: 000420d877c08023 \.128 bpl\[\.479\]
|
||||
408: 0007c0d877c08024 \.129 bcs\[\.479\]
|
||||
410: 0007c0d877c08024 \.130 bcs\[\.479\]
|
||||
418: 000720d877c08025 \.131 bcc\[\.479\]
|
||||
420: 000720d877c08025 \.132 bcc\[\.479\]
|
||||
428: 0006a0d877c08026 \.133 bvs\[\.479\]
|
||||
430: 000640d877c08027 \.134 bvc\[\.479\]
|
||||
438: 0001c0d877c08028 \.135 bge\[\.479\]
|
||||
440: 000120d877c08029 \.136 blt\[\.479\]
|
||||
448: 000040d877c0802b \.137 bgt\[\.479\]
|
||||
450: 0000a0d877c0802a \.138 ble\[\.479\]
|
||||
458: 000c60d818c08038 \.139 br\[\.99\]
|
||||
460: 000920d818d08038 \.140 br\[\.99\], defer\[1\]
|
||||
468: 000000f0000c0300 \.141 nop
|
||||
470: 000bc0d077c09000 \.142 br_bclr\[gprA_0, 3, \.479\]
|
||||
478: 000980d077c0e004 \.143 br_bclr\[gprA_4, 23, \.479\]
|
||||
480: 0002a0d077c0082c \.144 br_bclr\[gprB_2, 11, \.479\]
|
||||
488: 000300d077c02423 \.145 br_bclr\[gprB_9, 2, \.479\]
|
||||
490: 000260d077c02421 \.146 br_bclr\[gprB_9, 0, \.479\]
|
||||
498: 000280d077c02420 \.147 br_bclr\[gprB_9, 31, \.479\]
|
||||
4a0: 000f00d077f02423 \.148 br_bclr\[gprB_9, 2, \.479\], defer\[3\]
|
||||
4a8: 000000f0000c0300 \.149 nop
|
||||
4b0: 000000f0000c0300 \.150 nop
|
||||
4b8: 000000f0000c0300 \.151 nop
|
||||
4c0: 000680d077c42c2b \.152 br_bset\[gprB_11, 10, \.479\]
|
||||
4c8: 0006e0d077c4ac0b \.153 br_bset\[gprA_11, 10, \.479\]
|
||||
4d0: 0002a0c877d81020 \.154 br=byte\[gprB_4, 0, 0x0, \.479\], defer\[1\]
|
||||
4d8: 000000f0000c0300 \.155 nop
|
||||
4e0: 000a60c877c81520 \.156 br=byte\[gprB_5, 1, 0x0, \.479\]
|
||||
4e8: 0001e0c877c81620 \.157 br=byte\[gprB_5, 2, 0x0, \.479\]
|
||||
4f0: 0001a4c877c94220 \.158 br=byte\[\*l\$index2, 2, 0x0, \.479\]
|
||||
4f8: 000620c877c96220 \.159 br=byte\[\*l\$index1, 2, 0x0, \.479\]
|
||||
500: 000540c877c81b20 \.160 br=byte\[gprB_6, 3, 0x0, \.479\]
|
||||
508: 0000c0c877cc16ff \.161 br=byte\[gprB_5, 2, 0xff, \.479\]
|
||||
510: 000420c877c816a2 \.162 br=byte\[gprB_5, 2, 0x42, \.479\]
|
||||
518: 000380c877c416ff \.163 br!=byte\[gprB_5, 2, 0xff, \.479\]
|
||||
520: 0002a0c877c01620 \.164 br!=byte\[gprB_5, 2, 0x0, \.479\]
|
||||
528: 000c20d877c00236 \.165 br_cls_state\[cls_ring0_status, \.479\]
|
||||
530: 0001a0d877e20236 \.166 br_cls_state\[cls_ring8_status, \.479\], defer\[2\]
|
||||
538: 000000f0000c0300 \.167 nop
|
||||
540: 000000f0000c0300 \.168 nop
|
||||
548: 000be0d877c38236 \.169 br_cls_state\[cls_ring14_status, \.479\]
|
||||
550: 0007c0d877c3c236 \.170 br_cls_state\[cls_ring15_status, \.479\]
|
||||
558: 000720d877c3c237 \.171 br_!cls_state\[cls_ring15_status, \.479\]
|
||||
560: 000cc0d877c00237 \.172 br_!cls_state\[cls_ring0_status, \.479\]
|
||||
568: 000c00d877c00030 \.173 br=ctx\[0, \.479\]
|
||||
570: 000dc0d877c08030 \.174 br=ctx\[2, \.479\]
|
||||
578: 000f00d877c18030 \.175 br=ctx\[6, \.479\]
|
||||
580: 000a40d877d18030 \.176 br=ctx\[6, \.479\], defer\[1\]
|
||||
588: 000000f0000c0300 \.177 nop
|
||||
590: 000d40d877c00234 \.178 br_inp_state\[nn_empty, \.479\]
|
||||
598: 000160d877c04234 \.179 br_inp_state\[nn_full, \.479\]
|
||||
5a0: 000c80d877c08234 \.180 br_inp_state\[ctm_ring0_status, \.479\]
|
||||
5a8: 000100d877e28234 \.181 br_inp_state\[ctm_ring8_status, \.479\], defer\[2\]
|
||||
5b0: 000000f0000c0300 \.182 nop
|
||||
5b8: 000000f0000c0300 \.183 nop
|
||||
5c0: 000a80d877c38234 \.184 br_inp_state\[ctm_ring12_status, \.479\]
|
||||
5c8: 0006a0d877c3c234 \.185 br_inp_state\[ctm_ring13_status, \.479\]
|
||||
5d0: 000640d877c3c235 \.186 br_!inp_state\[ctm_ring13_status, \.479\]
|
||||
5d8: 000c60d877c08235 \.187 br_!inp_state\[ctm_ring0_status, \.479\]
|
||||
5e0: 000260d877c04232 \.188 br_signal\[1, \.479\]
|
||||
5e8: 000f80d877c08232 \.189 br_signal\[2, \.479\]
|
||||
5f0: 0005a0d877c3c232 \.190 br_signal\[15, \.479\]
|
||||
5f8: 000540d877c3c233 \.191 br_!signal\[15, \.479\]
|
||||
600: 000b60d877f2c232 \.192 br_signal\[11, \.479\], defer\[3\]
|
||||
608: 000000f0000c0300 \.193 nop
|
||||
610: 000000f0000c0300 \.194 nop
|
||||
618: 000000f0000c0300 \.195 nop
|
||||
620: 000e40a0c0000402 \.196 alu\[gprA_0, gprB_1, \+, gprA_2\]
|
||||
628: 0004408e02081200 \.197 byte_align_le\[--, gprB_4\]
|
||||
630: 0008c08e00981200 \.198 byte_align_le\[gprA_9, gprB_4\]
|
||||
638: 0004c08e00a81200 \.199 byte_align_le\[gprA_10, gprB_4\]
|
||||
640: 0001808e00b81200 \.200 byte_align_le\[gprA_11, gprB_4\]
|
||||
648: 000e40a0c0000402 \.201 alu\[gprA_0, gprB_1, \+, gprA_2\]
|
||||
650: 000c808e02001100 \.202 byte_align_be\[--, gprB_4\]
|
||||
658: 0000008e00901100 \.203 byte_align_be\[gprA_9, gprB_4\]
|
||||
660: 000c008e00a01100 \.204 byte_align_be\[gprA_10, gprB_4\]
|
||||
668: 0009408e00b01100 \.205 byte_align_be\[gprA_11, gprB_4\]
|
||||
670: 000d80a0300c0300 \.206 alu\[--, --, B, 0x0\]
|
||||
678: 000400a5b00c0000 \.207 cam_clear
|
||||
680: 000360bb80900007 \.208 cam_lookup\[gprB_9, gprA_7\]
|
||||
688: 0003a0bb80900200 \.209 cam_lookup\[gprB_9, \*l\$index0\]
|
||||
690: 000e04bb80900200 \.210 cam_lookup\[gprB_9, \*l\$index2\]
|
||||
698: 000f84bb80900203 \.211 cam_lookup\[gprB_9, \*l\$index2\[3\]\]
|
||||
6a0: 000bc0bb80900210 \.212 cam_lookup\[gprB_9, \*l\$index0\+\+\]
|
||||
6a8: 000280aba0000241 \.213 cam_lookup\[\*l\$index0, \*n\$index\]
|
||||
6b0: 000ec0aba1000241 \.214 cam_lookup\[\*l\$index0\+\+, \*n\$index\]
|
||||
6b8: 000288aba3000243 \.215 cam_lookup\[\*l\$index3\+\+, \*n\$index\+\+\]
|
||||
6c0: 000aa0aba0200243 \.216 cam_lookup\[\*l\$index0\[2\], \*n\$index\+\+\]
|
||||
6c8: 000060bb80901407 \.217 cam_lookup\[gprB_9, gprA_7\], lm_addr0\[1\]
|
||||
6d0: 000060bb80902807 \.218 cam_lookup\[gprB_9, gprA_7\], lm_addr1\[2\]
|
||||
6d8: 000660bb80907407 \.219 cam_lookup\[gprB_9, gprA_7\], lm_addr2\[3\]
|
||||
6e0: 000660bb80904807 \.220 cam_lookup\[gprB_9, gprA_7\], lm_addr3\[0\]
|
||||
6e8: 000222ab80900007 \.221 cam_lookup\[gprA_9, gprA_7\], gpr_wrboth
|
||||
6f0: 0004b0bb80900007 \.222 cam_lookup\[gprB_9, gprA_7\], predicate_cc
|
||||
6f8: 000a00a7809c0000 \.223 cam_read_tag\[gprA_9, 0x0\]
|
||||
700: 000da2a7809c0000 \.224 cam_read_tag\[gprA_9, 0x0\], gpr_wrboth
|
||||
708: 000dd0a7809c0000 \.225 cam_read_tag\[gprA_9, 0x0\], predicate_cc
|
||||
710: 000900a7809c2800 \.226 cam_read_tag\[gprA_9, 0xa\]
|
||||
718: 000a00a7809c3c00 \.227 cam_read_tag\[gprA_9, 0xf\]
|
||||
720: 0003e0af809c0000 \.228 cam_read_state\[gprA_9, 0x0\]
|
||||
728: 000442af809c0000 \.229 cam_read_state\[gprA_9, 0x0\], gpr_wrboth
|
||||
730: 000392af809c0000 \.230 cam_read_state\[gprA_9, 0x0\], gpr_wrboth, predicate_cc
|
||||
738: 0000e0af809c2800 \.231 cam_read_state\[gprA_9, 0xa\]
|
||||
740: 0003e0af809c3c00 \.232 cam_read_state\[gprA_9, 0xf\]
|
||||
748: 000920a9f0101700 \.233 cam_write\[0x0, gprB_5, 1\]
|
||||
750: 000da0a9f01a0300 \.234 cam_write\[0x0, n\$reg_0, 1\]
|
||||
758: 000e80a9f0190700 \.235 cam_write\[0x0, \*n\$index, 1\]
|
||||
760: 0004c4a9f0180300 \.236 cam_write\[0x0, \*l\$index2, 1\]
|
||||
768: 0008e4a9f0184300 \.237 cam_write\[0x0, \*l\$index2\+\+, 1\]
|
||||
770: 000dc4a9f0184700 \.238 cam_write\[0x0, \*l\$index2--, 1\]
|
||||
778: 000840a9f0b01704 \.239 cam_write\[0x4, gprB_5, 11\]
|
||||
780: 000be0a9f0f0170f \.240 cam_write\[0xf, gprB_5, 15\]
|
||||
788: 0008a0adb01c0000 \.241 cam_write_state\[0x0, 1\]
|
||||
790: 000d80adb0bc1000 \.242 cam_write_state\[0x4, 11\]
|
||||
798: 000de0adb0fc3c00 \.243 cam_write_state\[0xf, 15\]
|
||||
7a0: 0000c0fc142c000d \.244 local_csr_wr\[CRCRemainder, gprA_13\]
|
||||
7a8: 000d20a918060348 \.245 crc_le\[crc_ccitt, \$xfer_0, \$xfer_0\]
|
||||
7b0: 000000f0000c0300 \.246 nop
|
||||
7b8: 000d40a918160748 \.247 crc_le\[crc_ccitt, \$xfer_1, \$xfer_1\]
|
||||
7c0: 000000f0000c0300 \.248 nop
|
||||
7c8: 000d40a918260b48 \.249 crc_le\[crc_ccitt, \$xfer_2, \$xfer_2\]
|
||||
7d0: 000000f0000c0300 \.250 nop
|
||||
7d8: 000d20a918360f48 \.251 crc_le\[crc_ccitt, \$xfer_3, \$xfer_3\]
|
||||
7e0: 000000f0000c0300 \.252 nop
|
||||
7e8: 000000f0000c0300 \.253 nop
|
||||
7f0: 000000f0000c0300 \.254 nop
|
||||
7f8: 000000f0000c0300 \.255 nop
|
||||
800: 000000f0000c0300 \.256 nop
|
||||
808: 000f60fc140c0000 \.257 local_csr_rd\[CRCRemainder\]
|
||||
810: 000ce0f0000c000e \.258 immed\[gprA_14, 0x0\]
|
||||
818: 000940a918060340 \.259 crc_be\[crc_ccitt, \$xfer_0, \$xfer_0\]
|
||||
820: 000000f0000c0300 \.260 nop
|
||||
828: 000920a918461340 \.261 crc_be\[crc_ccitt, \$xfer_4, \$xfer_4\]
|
||||
830: 000000f0000c0300 \.262 nop
|
||||
838: 000060a900061340 \.263 crc_be\[crc_ccitt, gprA_0, \$xfer_4\]
|
||||
840: 000000f0000c0300 \.264 nop
|
||||
848: 000c60a900001340 \.265 crc_be\[crc_ccitt, gprA_0, gprB_4\]
|
||||
850: 000000f0000c0300 \.266 nop
|
||||
858: 000000f0000c0300 \.267 nop
|
||||
860: 000000f0000c0300 \.268 nop
|
||||
868: 000000f0000c0300 \.269 nop
|
||||
870: 000000f0000c0300 \.270 nop
|
||||
878: 000600a918260380 \.271 crc_be\[crc_32, \$xfer_2, \$xfer_0\]
|
||||
880: 000000f0000c0300 \.272 nop
|
||||
888: 0004c0a9183613a0 \.273 crc_be\[crc_iscsi, \$xfer_3, \$xfer_4\]
|
||||
890: 000000f0000c0300 \.274 nop
|
||||
898: 0004c0a9000613c0 \.275 crc_be\[crc_10, gprA_0, \$xfer_4\]
|
||||
8a0: 000000f0000c0300 \.276 nop
|
||||
8a8: 000960a9000013e0 \.277 crc_be\[crc_5, gprA_0, gprB_4\]
|
||||
8b0: 000000f0000c0300 \.278 nop
|
||||
8b8: 000ea0a918862700 \.279 crc_be\[--, \$xfer_8, \$xfer_9\]
|
||||
8c0: 000000f0000c0300 \.280 nop
|
||||
8c8: 000240a918760784 \.281 crc_be\[crc_32, \$xfer_7, \$xfer_1\], bytes_0_2
|
||||
8d0: 000000f0000c0300 \.282 nop
|
||||
8d8: 0002a0a918760785 \.283 crc_be\[crc_32, \$xfer_7, \$xfer_1\], bytes_0_1
|
||||
8e0: 000000f0000c0300 \.284 nop
|
||||
8e8: 000320a918760786 \.285 crc_be\[crc_32, \$xfer_7, \$xfer_1\], byte_0
|
||||
8f0: 000000f0000c0300 \.286 nop
|
||||
8f8: 0000c0a918760781 \.287 crc_be\[crc_32, \$xfer_7, \$xfer_1\], bytes_1_3
|
||||
900: 000000f0000c0300 \.288 nop
|
||||
908: 000140a918760782 \.289 crc_be\[crc_32, \$xfer_7, \$xfer_1\], bytes_2_3
|
||||
910: 000000f0000c0300 \.290 nop
|
||||
918: 0001a0a918760783 \.291 crc_be\[crc_32, \$xfer_7, \$xfer_1\], byte_3
|
||||
920: 000000f0000c0300 \.292 nop
|
||||
928: 000782a900160780 \.293 crc_be\[crc_32, gprA_1, \$xfer_1\], gpr_wrboth
|
||||
930: 000000f0000c0300 \.294 nop
|
||||
938: 000ae3a900160780 \.295 crc_be\[crc_32, gprA_1, \$xfer_1\], no_cc, gpr_wrboth
|
||||
940: 000000f0000c0300 \.296 nop
|
||||
948: 000b73a900560780 \.297 crc_be\[crc_32, gprA_5, \$xfer_1\], no_cc, gpr_wrboth, predicate_cc
|
||||
950: 000000f0000c0300 \.298 nop
|
||||
958: 000122a900560781 \.299 crc_be\[crc_32, gprA_5, \$xfer_1\], bytes_1_3, gpr_wrboth
|
||||
960: 000000f0000c0300 \.300 nop
|
||||
968: 000000f0000c0300 \.301 nop
|
||||
970: 000000f0000c0300 \.302 nop
|
||||
978: 000000f0000c0300 \.303 nop
|
||||
980: 000000f0000c0300 \.304 nop
|
||||
988: 000000f0000c0300 \.305 nop
|
||||
990: 0005a0e000080000 \.306 ctx_arb\[--\]
|
||||
998: 000600e000000001 \.307 ctx_arb\[voluntary\]
|
||||
9a0: 000220e000020000 \.308 ctx_arb\[bpt\]
|
||||
9a8: 000460e000000220 \.309 ctx_arb\[sig5, sig9\]
|
||||
9b0: 000d20e000200220 \.310 ctx_arb\[sig5, sig9\], defer\[2\]
|
||||
9b8: 000180a0300c0f00 \.311 alu\[--, --, B, 0x3\]
|
||||
9c0: 0007a0a0300c1f00 \.312 alu\[--, --, B, 0x7\]
|
||||
9c8: 0006a0e000010220 \.313 ctx_arb\[sig5, sig9\], any
|
||||
9d0: 000a60e077c40220 \.314 ctx_arb\[sig5, sig9\], br\[\.479\]
|
||||
9d8: 0006409010500701 \.315 dbl_shf\[gprB_5, gprA_1, gprB_1, >>1\]
|
||||
9e0: 000d4090a0500701 \.316 dbl_shf\[gprB_5, gprA_1, gprB_1, >>10\]
|
||||
9e8: 000c4091f0500701 \.317 dbl_shf\[gprB_5, gprA_1, gprB_1, >>31\]
|
||||
9f0: 000740a440000402 \.318 alu\[gprA_0, gprB_1, AND, gprA_2\]
|
||||
9f8: 0000c09000500701 \.319 dbl_shf\[gprB_5, gprA_1, gprB_1, >>indirect\]
|
||||
a00: 000b219010500701 \.320 dbl_shf\[gprB_5, gprA_1, gprB_1, >>1\], no_cc
|
||||
a08: 000cf19010500701 \.321 dbl_shf\[gprB_5, gprA_1, gprB_1, >>1\], no_cc, predicate_cc
|
||||
a10: 0000d28010500701 \.322 dbl_shf\[gprA_5, gprA_1, gprB_1, >>1\], gpr_wrboth, predicate_cc
|
||||
a18: 000200a700f03f00 \.323 ffs\[gprA_15, gprB_15\]
|
||||
a20: 000fe0b740fc000f \.324 ffs\[gprB_15, gprA_15\]
|
||||
a28: 000ec0b700f61300 \.325 ffs\[gprB_15, \$xfer_4\]
|
||||
a30: 000660b700f88300 \.326 ffs\[gprB_15, \*l\$index1\]
|
||||
a38: 0007e4b700f8c300 \.327 ffs\[gprB_15, \*l\$index3\+\+\]
|
||||
a40: 0002c4b700f8c700 \.328 ffs\[gprB_15, \*l\$index3--\]
|
||||
a48: 0004c4b700f8a700 \.329 ffs\[gprB_15, \*l\$index3\[9\]\]
|
||||
a50: 000880a720000300 \.330 ffs\[\*l\$index0, gprB_0\]
|
||||
a58: 000108a722090700 \.331 ffs\[\*l\$index3, \*n\$index\]
|
||||
a60: 000128a723190f00 \.332 ffs\[\*l\$index3--, \*n\$index\+\+\]
|
||||
a68: 0003c3a740fc000f \.333 ffs\[gprA_15, gprA_15\], no_cc, gpr_wrboth
|
||||
a70: 000972a740fc000f \.334 ffs\[gprA_15, gprA_15\], gpr_wrboth, predicate_cc
|
||||
a78: 000320f0000c0803 \.335 immed\[gprA_3, 0x2\]
|
||||
a80: 000480e8004d4803 \.336 jump\[gprA_3, \.338\]
|
||||
a88: 0006a0d854408038 \.337 br\[\.337\]
|
||||
a90: 000460f000002701 \.338 immed\[gprB_9, 0x1\]
|
||||
a98: 0006a0d854408038 \.339 br\[\.337\]
|
||||
aa0: 0005e0f000002702 \.340 immed\[gprB_9, 0x2\]
|
||||
aa8: 0006a0d854408038 \.341 br\[\.337\]
|
||||
ab0: 000500f000002703 \.342 immed\[gprB_9, 0x3\]
|
||||
ab8: 0006a0d854408038 \.343 br\[\.337\]
|
||||
ac0: 000040c001000000 \.344 ld_field\[gprA_0, 0001, gprB_0\]
|
||||
ac8: 0007e2c001000000 \.345 ld_field\[gprA_0, 0001, gprB_0\], gpr_wrboth
|
||||
ad0: 000e40c401000000 \.346 ld_field\[gprA_0, 0001, gprB_0\], load_cc
|
||||
ad8: 000790c001000000 \.347 ld_field\[gprA_0, 0001, gprB_0\], predicate_cc
|
||||
ae0: 0005c0c005000000 \.348 ld_field\[gprA_0, 0101, gprB_0\]
|
||||
ae8: 000080c005100000 \.349 ld_field_w_clr\[gprA_0, 0101, gprB_0\]
|
||||
af0: 0002a2c001100000 \.350 ld_field_w_clr\[gprA_0, 0001, gprB_0\], gpr_wrboth
|
||||
af8: 000b00c401100000 \.351 ld_field_w_clr\[gprA_0, 0001, gprB_0\], load_cc
|
||||
b00: 0002d0c001100000 \.352 ld_field_w_clr\[gprA_0, 0001, gprB_0\], predicate_cc
|
||||
b08: 000fc0c00f000000 \.353 ld_field\[gprA_0, 1111, gprB_0\]
|
||||
b10: 0005e0c1fb000200 \.354 ld_field\[gprA_0, 1011, gprB_0, <<1\]
|
||||
b18: 000460c01b000100 \.355 ld_field\[gprA_0, 1011, gprB_0, >>1\]
|
||||
b20: 000e60c1fb000100 \.356 ld_field\[gprA_0, 1011, gprB_0, >>31\]
|
||||
b28: 000bc0c09b000000 \.357 ld_field\[gprA_0, 1011, gprB_0, >>rot9\]
|
||||
b30: 000e80c09b100000 \.358 ld_field_w_clr\[gprA_0, 1011, gprB_0, >>rot9\]
|
||||
b38: 0001c0c17b000000 \.359 ld_field\[gprA_0, 1011, gprB_0, >>rot23\]
|
||||
b40: 0002c0c41b000000 \.360 ld_field\[gprA_0, 1011, gprB_0, >>rot1\], load_cc
|
||||
b48: 000780c41b100000 \.361 ld_field_w_clr\[gprA_0, 1011, gprB_0, >>rot1\], load_cc
|
||||
b50: 000400f0001f7c01 \.362 immed\[gprA_1, 0x1df\]
|
||||
b58: 000200f0001007df \.363 immed\[gprB_1, 0x1df\]
|
||||
b60: 0005a2f0001007df \.364 immed\[gprB_1, 0x1df\], gpr_wrboth
|
||||
b68: 0005d0f0001007df \.365 immed\[gprB_1, 0x1df\], predicate_cc
|
||||
b70: 000020fc010c0000 \.366 local_csr_rd\[ALUOut\]
|
||||
b78: 000e60f0000c000b \.367 immed\[gprA_11, 0x0\]
|
||||
b80: 000ce0fc160c0000 \.368 local_csr_rd\[MiscControl\]
|
||||
b88: 000e60f0000c000b \.369 immed\[gprA_11, 0x0\]
|
||||
b90: 000ae0fc076c0b02 \.370 local_csr_wr\[XferIndex, 0x2\]
|
||||
b98: 0008a0fc076c0003 \.371 local_csr_wr\[XferIndex, gprA_3\]
|
||||
ba0: 000520fc07600f00 \.372 local_csr_wr\[XferIndex, gprB_3\]
|
||||
ba8: 000f20fc01a00f00 \.373 local_csr_wr\[CtxEnables, gprB_3\]
|
||||
bb0: 000480f800000c02 \.374 mul_step\[gprA_2, gprB_3\], start
|
||||
bb8: 000880f980000c02 \.375 mul_step\[gprA_2, gprB_3\], 32x32_step1
|
||||
bc0: 000dc0f980100c02 \.376 mul_step\[gprA_2, gprB_3\], 32x32_step2
|
||||
bc8: 0001c0f980200c02 \.377 mul_step\[gprA_2, gprB_3\], 32x32_step3
|
||||
bd0: 000480f980300c02 \.378 mul_step\[gprA_2, gprB_3\], 32x32_step4
|
||||
bd8: 000940f9804c0002 \.379 mul_step\[gprA_2, --\], 32x32_last
|
||||
be0: 000ce0f9805c0003 \.380 mul_step\[gprA_3, --\], 32x32_last2
|
||||
be8: 0001a0f800000802 \.381 mul_step\[gprA_2, gprB_2\], start
|
||||
bf0: 000aa0f900000802 \.382 mul_step\[gprA_2, gprB_2\], 16x16_step1
|
||||
bf8: 000fe0f900100802 \.383 mul_step\[gprA_2, gprB_2\], 16x16_step2
|
||||
c00: 000f20f9004c0000 \.384 mul_step\[gprA_0, --\], 16x16_last
|
||||
c08: 0001a0f800000802 \.385 mul_step\[gprA_2, gprB_2\], start
|
||||
c10: 0006a0f880000802 \.386 mul_step\[gprA_2, gprB_2\], 24x8_step1
|
||||
c18: 000320f8804c0000 \.387 mul_step\[gprA_0, --\], 24x8_last
|
||||
c20: 0001a0f800000802 \.388 mul_step\[gprA_2, gprB_2\], start
|
||||
c28: 0006a0f880000802 \.389 mul_step\[gprA_2, gprB_2\], 24x8_step1
|
||||
c30: 0004f0f8804c0000 \.390 mul_step\[gprA_0, --\], 24x8_last, predicate_cc
|
||||
c38: 0001a0f800000802 \.391 mul_step\[gprA_2, gprB_2\], start
|
||||
c40: 0006a0f880000802 \.392 mul_step\[gprA_2, gprB_2\], 24x8_step1
|
||||
c48: 0009e3f8804c0000 \.393 mul_step\[gprA_0, --\], 24x8_last, no_cc, gpr_wrboth
|
||||
c50: 000b80a330000000 \.394 pop_count1\[gprB_0\]
|
||||
c58: 000c80a3b0000000 \.395 pop_count2\[gprB_0\]
|
||||
c60: 000d80a180000000 \.396 pop_count3\[gprA_0, gprB_0\]
|
||||
c68: 000b80a330000000 \.397 pop_count1\[gprB_0\]
|
||||
c70: 000c80a3b0000000 \.398 pop_count2\[gprB_0\]
|
||||
c78: 000743a180000000 \.399 pop_count3\[gprA_0, gprB_0\], no_cc, gpr_wrboth
|
||||
c80: 0004a4a330088000 \.400 pop_count1\[\*l\$index3\]
|
||||
c88: 0003a4a3b0088000 \.401 pop_count2\[\*l\$index3\]
|
||||
c90: 0000e5a1a438c000 \.402 pop_count3\[\*n\$index\+\+, \*l\$index3\+\+\], no_cc
|
||||
c98: 000b80a330000000 \.403 pop_count1\[gprB_0\]
|
||||
ca0: 000c80a3b0000000 \.404 pop_count2\[gprB_0\]
|
||||
ca8: 000731a180000000 \.405 pop_count3\[gprA_0, gprB_0\], no_cc, predicate_cc
|
||||
cb0: 000480e8000c0000 \.406 rtn\[gprA_0\]
|
||||
cb8: 000620e8000a0700 \.407 rtn\[n\$reg_1\]
|
||||
cc0: 000600e800088300 \.408 rtn\[\*l\$index1\]
|
||||
cc8: 000a64e800080300 \.409 rtn\[\*l\$index2\]
|
||||
cd0: 000dc0e800200300 \.410 rtn\[gprB_0\], defer\[2\]
|
||||
cd8: 0008a0a0300c0700 \.411 alu\[--, --, B, 0x1\]
|
||||
ce0: 0004a0a0300c0b00 \.412 alu\[--, --, B, 0x2\]
|
||||
ce8: 000000f0000c0300 \.413 nop
|
||||
cf0: 000000f0000c0300 \.414 nop
|
||||
cf8: 000000f0000c0300 \.415 nop
|
||||
d00: 000000f0000c0300 \.416 nop
|
||||
d08: 0003501842300c09 \.417 arm\[read, \$xfer_3, gprA_9, gprB_3, 2\], ctx_swap\[sig4\]
|
||||
d10: 0005501842302403 \.418 arm\[read, \$xfer_3, gprA_3, gprB_9, 2\], ctx_swap\[sig4\]
|
||||
d18: 0004801842300c09 \.419 arm\[read, \$xfer_3, gprA_9, <<8, gprB_3, 2\], ctx_swap\[sig4\]
|
||||
d20: 000f241842302403 \.420 arm\[read, \$xfer_3, gprB_9, <<8, gprA_3, 2\], ctx_swap\[sig4\]
|
||||
d28: 0004a0a0300c0b00 \.421 alu\[--, --, B, 0x2\]
|
||||
d30: 0008861842302403 \.422 arm\[read, \$xfer_3, gprB_9, <<8, gprA_3, 2\], indirect_ref, ctx_swap\[sig4\]
|
||||
d38: 0004a0a0300c0b00 \.423 alu\[--, --, B, 0x2\]
|
||||
d40: 000e8618e2302703 \.424 arm\[read, \$xfer_3, gprB_9, <<8, gprA_3, 2\], indirect_ref, sig_done\[sig14\]
|
||||
d48: 0007841842302503 \.425 arm\[read, \$xfer_3, gprB_9, <<8, gprA_3, 2\], ctx_swap\[sig4\], defer\[1\]
|
||||
d50: 0008a0a0300c0700 \.426 alu\[--, --, B, 0x1\]
|
||||
d58: 000f101843c00c09 \.427 arm\[read, \$xfer_28, gprA_9, gprB_3, 2\], ctx_swap\[sig4\]
|
||||
d60: 000910184e800c09 \.428 arm\[read, \$xfer_8, gprA_9, gprB_3, 8\], ctx_swap\[sig4\]
|
||||
d68: 000a106440800c09 \.429 cls\[add, \$xfer_8, gprA_9, gprB_3, 1\], ctx_swap\[sig4\]
|
||||
d70: 0000f0664080a009 \.430 cls\[sub, \$xfer_8, gprA_9, 0x8, 1\], ctx_swap\[sig4\]
|
||||
d78: 000160644284a009 \.431 cls\[add64, \$xfer_8, gprA_9, <<8, 0x8, 2\], ctx_swap\[sig4\]
|
||||
d80: 000404664284a408 \.432 cls\[sub64, \$xfer_8, 0x9, <<8, gprA_8, 2\], ctx_swap\[sig4\]
|
||||
d88: 0008a0a0300c0700 \.433 alu\[--, --, B, 0x1\]
|
||||
d90: 00032c650340a708 \.434 cls\[add_imm, 0x14, 0x9, <<8, gprA_8, 2\]
|
||||
d98: 0007506040880c09 \.435 cls\[swap/test_compare_write, \$xfer_8, gprA_9, gprB_3, 1\], ctx_swap\[sig4\]
|
||||
da0: 00023c6500007f9a \.436 cls\[add_imm, 0x1f9a, --, 1\]
|
||||
da8: 000038653c583f14 \.437 cls\[add_imm, 0xf14, 0xf16\]
|
||||
db0: 000b54640013c30f \.438 cls\[add, \$xfer_1, 0xf00f, 1\]
|
||||
db8: 0002901c10a08000 \.439 ct\[xpb_read, \$xfer_10, gprA_0, 0x0, 1\], ctx_swap\[sig1\]
|
||||
dc0: 0007501e10a48000 \.440 ct\[reflect_read_sig_init, \$xfer_10, gprA_0, 0x0, 1\], ctx_swap\[sig1\]
|
||||
dc8: 000a501c10a48000 \.441 ct\[ring_get, \$xfer_10, gprA_0, 0x0, 1\], ctx_swap\[sig1\]
|
||||
dd0: 000000f0000c0300 \.442 nop
|
||||
dd8: 000cc0474a80a009 \.443 mem\[add64, \$xfer_8, gprA_9, <<8, 0x8, 6\], ctx_swap\[sig4\]
|
||||
de0: 000d40404280a009 \.444 mem\[read, \$xfer_8, gprA_9, <<8, 0x8, 2\], ctx_swap\[sig4\]
|
||||
de8: 000c405c4280a009 \.445 mem\[read32, \$xfer_8, gprA_9, <<8, 0x8, 2\], ctx_swap\[sig4\]
|
||||
df0: 000ea0554280a009 \.446 mem\[ctm\.pe_dma_to_memory_indirect/emem\.get/imem\.lb_bucket_read_local, \$xfer_8, gprA_9, <<8, 0x8, 2\], ctx_swap\[sig4\]
|
||||
df8: 0009204c408ca309 \.447 mem\[lock128/lock384, \$xfer_8, gprA_9, <<8, 0x8, 1\], sig_done\[sig4\]
|
||||
e00: 000f20e000000030 \.448 ctx_arb\[sig4, sig5\]
|
||||
e08: 0000a04c488ca309 \.449 mem\[lock256/lock512, \$xfer_8, gprA_9, <<8, 0x8, 5\], sig_done\[sig4\]
|
||||
e10: 000f20e000000030 \.450 ctx_arb\[sig4, sig5\]
|
||||
e18: 000ae04d4084a009 \.451 mem\[microq128_pop, \$xfer_8, gprA_9, <<8, 0x8, 1\], ctx_swap\[sig4\]
|
||||
e20: 0002204d4080a009 \.452 mem\[microq128_get, \$xfer_8, gprA_9, <<8, 0x8, 1\], ctx_swap\[sig4\]
|
||||
e28: 000ba04d4880a009 \.453 mem\[microq256_get, \$xfer_8, gprA_9, <<8, 0x8, 5\], ctx_swap\[sig4\]
|
||||
e30: 0003805700028309 \.454 mem\[ctm\.pe_dma_from_memory_buffer/emem\.fast_journal/imem\.lb_push_stats_local, \$xfer_0, gprA_9, <<8, 0x40, 1\]
|
||||
e38: 0005e04e4000a309 \.455 mem\[queue128_lock, \$xfer_0, gprA_9, <<8, 0x8, 1\], sig_done\[sig4\]
|
||||
e40: 000f20e000000030 \.456 ctx_arb\[sig4, sig5\]
|
||||
e48: 0001a04e0004a309 \.457 mem\[queue128_unlock, \$xfer_0, gprA_9, <<8, 0x8, 1\]
|
||||
e50: 000c604e4800a309 \.458 mem\[queue256_lock, \$xfer_0, gprA_9, <<8, 0x8, 5\], sig_done\[sig4\]
|
||||
e58: 000f20e000000030 \.459 ctx_arb\[sig4, sig5\]
|
||||
e60: 0008204e0804a309 \.460 mem\[queue256_unlock, \$xfer_0, gprA_9, <<8, 0x8, 5\]
|
||||
e68: 0008a05000001309 \.461 mem\[ctm\.packet_wait_packet_status/emem\.rd_qdesc/imem\.stats_log, \$xfer_0, gprA_9, <<8, gprB_4, 1\]
|
||||
e70: 000b840092200c02 \.462 ila\[read, \$xfer_2, gprB_3, <<8, gprA_2, 2\], ctx_swap\[sig9\]
|
||||
e78: 0005440182240f02 \.463 ila\[write_check_error, \$xfer_2, gprB_3, <<8, gprA_2, 2\], sig_done\[sig8\]
|
||||
e80: 000d60e000000300 \.464 ctx_arb\[sig8, sig9\]
|
||||
e88: 0007800410600000 \.465 nbi\[read, \$xfer_6, gprA_0, <<8, gprB_0, 1\], ctx_swap\[sig1\]
|
||||
e90: 0002600c62000000 \.466 pcie\[read, \$xfer_0, gprA_0, <<8, gprB_0, 2\], ctx_swap\[sig6\]
|
||||
e98: 0004c40d62000000 \.467 pcie\[write, \$xfer_0, gprB_0, <<8, gprA_0, 2\], ctx_swap\[sig6\]
|
||||
ea0: 000d601462000000 \.468 crypto\[read, \$xfer_0, gprA_0, <<8, gprB_0, 2\], ctx_swap\[sig6\]
|
||||
ea8: 0006601562000000 \.469 crypto\[write, \$xfer_0, gprA_0, <<8, gprB_0, 2\], ctx_swap\[sig6\]
|
||||
eb0: 0000601662000000 \.470 crypto\[write_fifo, \$xfer_0, gprA_0, <<8, gprB_0, 2\], ctx_swap\[sig6\]
|
||||
eb8: 000d840d60000050 \.471 pcie\[write, \$xfer_0, gprB_0, <<8, \*l\$index0, 1\], ctx_swap\[sig6\]
|
||||
ec0: 0009e40d60000058 \.472 pcie\[write, \$xfer_0, gprB_0, <<8, \*l\$index1, 1\], ctx_swap\[sig6\]
|
||||
ec8: 0009040d60000059 \.473 pcie\[write, \$xfer_0, gprB_0, <<8, \*l\$index1\[1\], 1\], ctx_swap\[sig6\]
|
||||
ed0: 000000f0000c0300 \.474 nop
|
||||
ed8: 000000f0000c0300 \.475 nop
|
||||
ee0: 000000f0000c0300 \.476 nop
|
||||
ee8: 000000f0000c0300 \.477 nop
|
||||
ef0: 000000f0000c0300 \.478 nop
|
||||
ef8: 000220e000020000 \.479 ctx_arb\[bpt\]
|
||||
f00: 000420e000010000 \.480 ctx_arb\[kill\]
|
||||
BIN
binutils/testsuite/binutils-all/nfp/test1_nfp6000.nffw
Normal file
BIN
binutils/testsuite/binutils-all/nfp/test1_nfp6000.nffw
Normal file
Binary file not shown.
16
binutils/testsuite/binutils-all/nfp/test2_ctx8.d
Normal file
16
binutils/testsuite/binutils-all/nfp/test2_ctx8.d
Normal file
@ -0,0 +1,16 @@
|
||||
|
||||
.*: file format elf64-nfp
|
||||
|
||||
|
||||
Disassembly of section \.text\.i32\.me0:
|
||||
|
||||
0000000000000000 <\.text\.i32\.me0>:
|
||||
0: 000d80a0300c0300 \.0 alu\[--, --, B, 0x0\]
|
||||
8: 0008a0a0300c0700 \.1 alu\[--, --, B, 0x1\]
|
||||
10: 0004a0a0300c0b00 \.2 alu\[--, --, B, 0x2\]
|
||||
18: 000180a0300c0f00 \.3 alu\[--, --, B, 0x3\]
|
||||
20: 0004a0a018cc1300 \.4 alu\[\$xfer_12, --, B, 0x4\]
|
||||
28: 0001c0a019fc1700 \.5 alu\[\$xfer_15, --, B, 0x5\]
|
||||
30: 000400a0b00c198c \.6 alu\[--, \$xfer_12, \+, 0x6\]
|
||||
38: 0008c0a0b00c1d9f \.7 alu\[--, \$xfer_15, \+, 0x7\]
|
||||
40: 000220e000020000 \.8 ctx_arb\[bpt\]
|
||||
BIN
binutils/testsuite/binutils-all/nfp/test2_nfp6000.nffw
Normal file
BIN
binutils/testsuite/binutils-all/nfp/test2_nfp6000.nffw
Normal file
Binary file not shown.
16
binutils/testsuite/binutils-all/nfp/test2_no-pc_ctx4.d
Normal file
16
binutils/testsuite/binutils-all/nfp/test2_no-pc_ctx4.d
Normal file
@ -0,0 +1,16 @@
|
||||
|
||||
.*: file format elf64-nfp
|
||||
|
||||
|
||||
Disassembly of section \.text\.i32\.me0:
|
||||
|
||||
0000000000000000 <\.text\.i32\.me0>:
|
||||
0: 000d80a0300c0300 alu\[--, --, B, 0x0\]
|
||||
8: 0008a0a0300c0700 alu\[--, --, B, 0x1\]
|
||||
10: 0004a0a0300c0b00 alu\[--, --, B, 0x2\]
|
||||
18: 000180a0300c0f00 alu\[--, --, B, 0x3\]
|
||||
20: 0004a0a018cc1300 alu\[\$xfer_12, --, B, 0x4\]
|
||||
28: 0001c0a019fc1700 alu\[\$xfer_31, --, B, 0x5\]
|
||||
30: 000400a0b00c198c alu\[--, \$xfer_12, \+, 0x6\]
|
||||
38: 0008c0a0b00c1d9f alu\[--, \$xfer_31, \+, 0x7\]
|
||||
40: 000220e000020000 ctx_arb\[bpt\]
|
||||
@ -1,3 +1,11 @@
|
||||
2018-04-30 Francois H. Theron <francois.theron@netronome.com>
|
||||
|
||||
* dis-asm.h: Added print_nfp_disassembler_options prototype.
|
||||
* elf/common.h: Added EM_NFP, officially assigned. See Google Group
|
||||
Generic System V Application Binary Interface.
|
||||
* elf/nfp.h: New, for NFP support.
|
||||
* opcode/nfp.h: New, for NFP support.
|
||||
|
||||
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
|
||||
Mickaël Guêné <mickael.guene@st.com>
|
||||
|
||||
|
||||
@ -254,6 +254,7 @@ extern disassembler_ftype cris_get_disassembler (bfd *);
|
||||
extern void print_aarch64_disassembler_options (FILE *);
|
||||
extern void print_i386_disassembler_options (FILE *);
|
||||
extern void print_mips_disassembler_options (FILE *);
|
||||
extern void print_nfp_disassembler_options (FILE *);
|
||||
extern void print_ppc_disassembler_options (FILE *);
|
||||
extern void print_riscv_disassembler_options (FILE *);
|
||||
extern void print_arm_disassembler_options (FILE *);
|
||||
|
||||
@ -339,6 +339,7 @@
|
||||
#define EM_RISCV 243 /* RISC-V */
|
||||
#define EM_LANAI 244 /* Lanai 32-bit processor. */
|
||||
#define EM_BPF 247 /* Linux BPF – in-kernel virtual machine. */
|
||||
#define EM_NFP 250 /* Netronome Flow Processor. */
|
||||
|
||||
/* If it is necessary to assign new unofficial EM_* values, please pick large
|
||||
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
|
||||
|
||||
292
include/elf/nfp.h
Executable file
292
include/elf/nfp.h
Executable file
@ -0,0 +1,292 @@
|
||||
/* NFP ELF support for BFD.
|
||||
Copyright (C) 2017-2018 Free Software Foundation, Inc.
|
||||
Contributed by Francois H. Theron <francois.theron@netronome.com>
|
||||
|
||||
This file is part of BFD, the Binary File Descriptor library.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software Foundation,
|
||||
Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
|
||||
|
||||
#ifndef _ELF_NFP_H
|
||||
#define _ELF_NFP_H
|
||||
|
||||
#include "bfd.h"
|
||||
#include "elf/common.h"
|
||||
#include "elf/reloc-macros.h"
|
||||
#include "bfd_stdint.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#define ET_NFP_PARTIAL_REL (ET_LOPROC + ET_REL)
|
||||
#define ET_NFP_PARTIAL_EXEC (ET_LOPROC + ET_EXEC)
|
||||
|
||||
/* NFP e_flags - chip family
|
||||
Valid values for FAMILY are:
|
||||
0x3200 - NFP-32xx
|
||||
0x6000 - NFP-6xxx/NFP-4xxx. */
|
||||
#define EF_NFP_MACH(ef_nfp) (((ef_nfp) >> 8) & 0xFFFF)
|
||||
#define EF_NFP_SET_MACH(nfp_fam) (((nfp_fam) & 0xFFFF) << 8)
|
||||
|
||||
#define E_NFP_MACH_3200 0x3200
|
||||
#define E_NFP_MACH_6000 0x6000
|
||||
|
||||
#define NFP_3200_CPPTGT_MSF0 1
|
||||
#define NFP_3200_CPPTGT_QDR 2
|
||||
#define NFP_3200_CPPTGT_MSF1 3
|
||||
#define NFP_3200_CPPTGT_HASH 4
|
||||
#define NFP_3200_CPPTGT_MU 7
|
||||
#define NFP_3200_CPPTGT_GS 8
|
||||
#define NFP_3200_CPPTGT_PCIE 9
|
||||
#define NFP_3200_CPPTGT_ARM 10
|
||||
#define NFP_3200_CPPTGT_CRYPTO 12
|
||||
#define NFP_3200_CPPTGT_CAP 13
|
||||
#define NFP_3200_CPPTGT_CT 14
|
||||
#define NFP_3200_CPPTGT_CLS 15
|
||||
|
||||
#define NFP_6000_CPPTGT_NBI 1
|
||||
#define NFP_6000_CPPTGT_VQDR 2
|
||||
#define NFP_6000_CPPTGT_ILA 6
|
||||
#define NFP_6000_CPPTGT_MU 7
|
||||
#define NFP_6000_CPPTGT_PCIE 9
|
||||
#define NFP_6000_CPPTGT_ARM 10
|
||||
#define NFP_6000_CPPTGT_CRYPTO 12
|
||||
#define NFP_6000_CPPTGT_CTXPB 14
|
||||
#define NFP_6000_CPPTGT_CLS 15
|
||||
|
||||
/* NFP Section types
|
||||
MECONFIG - NFP-32xx only, ME CSR configurations
|
||||
INITREG - A generic register initialisation section (chip or ME CSRs/GPRs)
|
||||
UDEBUG - Legacy-style debug data section. */
|
||||
#define SHT_NFP_MECONFIG (SHT_LOPROC + 1)
|
||||
#define SHT_NFP_INITREG (SHT_LOPROC + 2)
|
||||
#define SHT_NFP_UDEBUG SHT_LOUSER
|
||||
|
||||
/* NFP SECTION flags
|
||||
ELF-64 sh_flags is 64-bit, but there is no info on what the upper 32 bits
|
||||
are expected to be used for, it is not marked reserved either.
|
||||
We'll use them for NFP-specific flags since we don't use ELF-32.
|
||||
|
||||
INIT - Sections that are loaded and executed before the final text
|
||||
microcode. Non-code INIT sections are loaded first, then other
|
||||
memory secions, then INIT2 sections, then INIT-code sections.
|
||||
INIT2 - Sections that are loaded before INIT-code sections, used for
|
||||
transient configuration before executing INIT-code section
|
||||
microcode.
|
||||
SCS - The number of additional ME codestores being shared with the group's
|
||||
base ME of the section, e.g. 0 for no SCS, 1 for dual and 3 for
|
||||
quad. If this is 0 it is possible that stagger-style SCS codestore
|
||||
sections are being used. For stagger-style each section is simply
|
||||
loaded directly to the ME it is assigned to. If these flags are
|
||||
used, virtual address space loading will be used - one large section
|
||||
loaded to the group's base ME will be packed across shared MEs by
|
||||
hardware. This is not available on all ME versions.
|
||||
|
||||
NFP_ELF_SHF_GET_SCS (val) returns the number of additional codestores
|
||||
being shared with the group's base ME, e.g. 0 for no SCS,
|
||||
1 for dual SCS, 3 for quad SCS. */
|
||||
|
||||
#define SHF_NFP_INIT 0x80000000
|
||||
#define SHF_NFP_INIT2 0x40000000
|
||||
#define SHF_NFP_SCS(shf) (((shf) >> 32) & 0xFF)
|
||||
#define SHF_NFP_SET_SCS(v) (((BFD_HOST_U_64_BIT)((v) & 0xFF)) << 32)
|
||||
|
||||
/* NFP Section Info
|
||||
For PROGBITS and NOBITS sections:
|
||||
MEMTYPE - the memory type
|
||||
DOMAIN - The island ID and ME number where the data will be loaded.
|
||||
For NFP-32xx, this is an island number or linear ME number.
|
||||
For NFP-6xxx, DOMAIN<15:8> == island ID, DOMAIN<7:0> is 0 based
|
||||
ME number (if applicable).
|
||||
For INITREG sections:
|
||||
ISLAND - island ID (if it's a ME target, ME numbers are in the
|
||||
section data)
|
||||
CPPTGT - CPP Target ID
|
||||
CPPACTRD - CPP Read Action
|
||||
CPPTOKRD - CPP Read Token
|
||||
CPPACTWR - CPP Write Action
|
||||
CPPTOKWR - CPP Write Token
|
||||
ORDER - Controls the order in which the loader processes sections with
|
||||
the same info fields. */
|
||||
|
||||
#define SHI_NFP_DOMAIN(shi) (((shi) >> 16) & 0xFFFF)
|
||||
#define SHI_NFP_MEMTYPE(shi) ( (shi) & 0xFFFF)
|
||||
#define SHI_NFP_SET_DOMAIN(v) (((v) & 0xFFFF) << 16)
|
||||
#define SHI_NFP_SET_MEMTYPE(v) ( (v) & 0xFFFF)
|
||||
|
||||
#define SHI_NFP_IREG_ISLAND(shi) (((shi) >> 26) & 0x3F)
|
||||
#define SHI_NFP_IREG_CPPTGT(shi) (((shi) >> 22) & 0xF)
|
||||
#define SHI_NFP_IREG_CPPACTRD(shi) (((shi) >> 17) & 0x1F)
|
||||
#define SHI_NFP_IREG_CPPTOKRD(shi) (((shi) >> 15) & 0x3)
|
||||
#define SHI_NFP_IREG_CPPACTWR(shi) (((shi) >> 10) & 0x1F)
|
||||
#define SHI_NFP_IREG_CPPTOKWR(shi) (((shi) >> 8) & 0x3)
|
||||
#define SHI_NFP_IREG_ORDER(shi) ( (shi) & 0xFF)
|
||||
#define SHI_NFP_SET_IREG_ISLAND(v) (((v) & 0x3F) << 26)
|
||||
#define SHI_NFP_SET_IREG_CPPTGT(v) (((v) & 0xF) << 22)
|
||||
#define SHI_NFP_SET_IREG_CPPACTRD(v) (((v) & 0x1F) << 17)
|
||||
#define SHI_NFP_SET_IREG_CPPTOKRD(v) (((v) & 0x3) << 15)
|
||||
#define SHI_NFP_SET_IREG_CPPACTWR(v) (((v) & 0x1F) << 10)
|
||||
#define SHI_NFP_SET_IREG_CPPTOKWR(v) (((v) & 0x3) << 8)
|
||||
#define SHI_NFP_SET_IREG_ORDER(v) ( (v) & 0xFF)
|
||||
|
||||
/* CtXpb/reflect_read_sig_init/reflect_write_sig_init
|
||||
identifies Init-CSR sections for ME CSRs. */
|
||||
#define SHI_NFP_6000_IS_IREG_MECSR(shi) ( \
|
||||
SHI_NFP_IREG_CPPTGT (shi) == NFP_6000_CPPTGT_CTXPB \
|
||||
&& SHI_NFP_IREG_CPPACTRD (shi) == 2 \
|
||||
&& SHI_NFP_IREG_CPPTOKRD (shi) == 1 \
|
||||
&& SHI_NFP_IREG_CPPACTWR (shi) == 3 \
|
||||
&& SHI_NFP_IREG_CPPTOKWR (shi) == 1 \
|
||||
)
|
||||
|
||||
/* Transient INITREG sections will be validated against the target
|
||||
but will not be kept - validate, write or read and discard.
|
||||
They will still be handled last (in order). */
|
||||
#define SHI_NFP_IREG_ORDER_TRANSIENT 0xFF
|
||||
|
||||
/* Below are some extra macros to translate SHI fields in more specific
|
||||
contexts.
|
||||
|
||||
For NFP-32xx, DOMAIN is set to a global linear ME number (0 to 39).
|
||||
An NFP-32xx has 8 MEs per island and up to 5 islands. */
|
||||
|
||||
#define SHI_NFP_3200_ISLAND(shi) ((SHI_NFP_DOMAIN (shi) >> 3) & 0x7)
|
||||
#define SHI_NFP_3200_MENUM(shi) ( SHI_NFP_DOMAIN (shi) & 0x7)
|
||||
#define SHI_NFP_SET_3200_ISLAND(v) SHI_NFP_SET_DOMAIN (((v) & 0x7) << 3)
|
||||
#define SHI_NFP_SET_3200_MENUM(v) SHI_NFP_SET_DOMAIN ( (v) & 0x7)
|
||||
|
||||
#define SHI_NFP_ISLAND(shi) ((SHI_NFP_DOMAIN (shi) >> 8) & 0xFF)
|
||||
#define SHI_NFP_MENUM(shi) ( SHI_NFP_DOMAIN (shi) & 0xFF)
|
||||
#define SHI_NFP_SET_ISLAND(shi) SHI_NFP_SET_DOMAIN (((shi) & 0xFF) << 8)
|
||||
#define SHI_NFP_SET_MENUM(shi) SHI_NFP_SET_DOMAIN ( (shi) & 0xFF)
|
||||
|
||||
#define SHI_NFP_MEMTYPE_NONE 0
|
||||
#define SHI_NFP_MEMTYPE_USTORE 1
|
||||
#define SHI_NFP_MEMTYPE_LMEM 2
|
||||
#define SHI_NFP_MEMTYPE_CLS 3
|
||||
#define SHI_NFP_MEMTYPE_DRAM 4
|
||||
#define SHI_NFP_MEMTYPE_MU 4
|
||||
#define SHI_NFP_MEMTYPE_SRAM 5
|
||||
#define SHI_NFP_MEMTYPE_GS 6
|
||||
#define SHI_NFP_MEMTYPE_PPC_LMEM 7
|
||||
#define SHI_NFP_MEMTYPE_PPC_SMEM 8
|
||||
#define SHI_NFP_MEMTYPE_EMU_CACHE 9
|
||||
|
||||
/* VTP_FORCE is for use by the NFP Linker+Loader only. */
|
||||
#define NFP_IREG_VTP_FORCE 0
|
||||
#define NFP_IREG_VTP_CONST 1
|
||||
#define NFP_IREG_VTP_REQUIRED 2
|
||||
#define NFP_IREG_VTP_VOLATILE_INIT 3
|
||||
#define NFP_IREG_VTP_VOLATILE_NOINIT 4
|
||||
#define NFP_IREG_VTP_INVALID 5
|
||||
|
||||
/* Init-CSR entry w0 fields:
|
||||
NLW - Not Last Word
|
||||
CTX - ME context number (if applicable)
|
||||
VTP - Value type
|
||||
COH - CPP Offset High 8 bits. */
|
||||
#define NFP_IREG_ENTRY_WO_NLW(w0) (((w0) >> 31) & 0x1)
|
||||
#define NFP_IREG_ENTRY_WO_CTX(w0) (((w0) >> 28) & 0x7)
|
||||
#define NFP_IREG_ENTRY_WO_VTP(w0) (((w0) >> 25) & 0x7)
|
||||
#define NFP_IREG_ENTRY_WO_COH(w0) (((w0) >> 0) & 0xFF)
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t w0;
|
||||
uint32_t cpp_offset_lo;
|
||||
uint32_t val;
|
||||
uint32_t mask;
|
||||
} Elf_Nfp_InitRegEntry;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t ctx_enables;
|
||||
uint32_t entry;
|
||||
uint32_t misc_control;
|
||||
uint32_t reserved;
|
||||
} Elf_Nfp_MeConfig;
|
||||
|
||||
/* Relocations. */
|
||||
START_RELOC_NUMBERS (elf_nfp3200_reloc_type)
|
||||
RELOC_NUMBER (R_NFP3200_NOTYPE, 0)
|
||||
RELOC_NUMBER (R_NFP3200_W32LE, 1)
|
||||
RELOC_NUMBER (R_NFP3200_SRC8_A, 2)
|
||||
RELOC_NUMBER (R_NFP3200_SRC8_B, 3)
|
||||
RELOC_NUMBER (R_NFP3200_IMMED8_I, 4)
|
||||
RELOC_NUMBER (R_NFP3200_SC, 5)
|
||||
RELOC_NUMBER (R_NFP3200_IMMED_LO16_I_A, 6)
|
||||
RELOC_NUMBER (R_NFP3200_IMMED_LO16_I_B, 7)
|
||||
RELOC_NUMBER (R_NFP3200_SRC7_B, 8)
|
||||
RELOC_NUMBER (R_NFP3200_SRC7_A, 9)
|
||||
RELOC_NUMBER (R_NFP3200_SRC8_I_B, 10)
|
||||
RELOC_NUMBER (R_NFP3200_SRC8_I_A, 11)
|
||||
RELOC_NUMBER (R_NFP3200_IMMED_HI16_I_A, 12)
|
||||
RELOC_NUMBER (R_NFP3200_IMMED_HI16_I_B, 13)
|
||||
RELOC_NUMBER (R_NFP3200_RSVD_0, 14)
|
||||
RELOC_NUMBER (R_NFP3200_RSVD_1, 15)
|
||||
RELOC_NUMBER (R_NFP3200_RSVD_2, 16)
|
||||
RELOC_NUMBER (R_NFP3200_RSVD_3, 17)
|
||||
RELOC_NUMBER (R_NFP3200_RSVD_4, 18)
|
||||
RELOC_NUMBER (R_NFP3200_RSVD_5, 19)
|
||||
RELOC_NUMBER (R_NFP3200_RSVD_6, 20)
|
||||
RELOC_NUMBER (R_NFP3200_W64LE, 21)
|
||||
RELOC_NUMBER (R_NFP3200_W32BE, 22)
|
||||
RELOC_NUMBER (R_NFP3200_W64BE, 23)
|
||||
RELOC_NUMBER (R_NFP3200_W32LE_AND, 24)
|
||||
RELOC_NUMBER (R_NFP3200_W32BE_AND, 25)
|
||||
RELOC_NUMBER (R_NFP3200_W32LE_OR, 26)
|
||||
RELOC_NUMBER (R_NFP3200_W32BE_OR, 27)
|
||||
RELOC_NUMBER (R_NFP3200_W64LE_AND, 28)
|
||||
RELOC_NUMBER (R_NFP3200_W64BE_AND, 29)
|
||||
RELOC_NUMBER (R_NFP3200_W64LE_OR, 30)
|
||||
RELOC_NUMBER (R_NFP3200_W64BE_OR, 31)
|
||||
END_RELOC_NUMBERS (R_NFP3200_MAX)
|
||||
|
||||
START_RELOC_NUMBERS (elf_nfp_reloc_type)
|
||||
RELOC_NUMBER (R_NFP_NOTYPE, 0)
|
||||
RELOC_NUMBER (R_NFP_W32LE, 1)
|
||||
RELOC_NUMBER (R_NFP_SRC8_A, 2)
|
||||
RELOC_NUMBER (R_NFP_SRC8_B, 3)
|
||||
RELOC_NUMBER (R_NFP_IMMED8_I, 4)
|
||||
RELOC_NUMBER (R_NFP_SC, 5)
|
||||
RELOC_NUMBER (R_NFP_IMMED_LO16_I_A, 6)
|
||||
RELOC_NUMBER (R_NFP_IMMED_LO16_I_B, 7)
|
||||
RELOC_NUMBER (R_NFP_SRC7_B, 8)
|
||||
RELOC_NUMBER (R_NFP_SRC7_A, 9)
|
||||
RELOC_NUMBER (R_NFP_SRC8_I_B, 10)
|
||||
RELOC_NUMBER (R_NFP_SRC8_I_A, 11)
|
||||
RELOC_NUMBER (R_NFP_IMMED_HI16_I_A, 12)
|
||||
RELOC_NUMBER (R_NFP_IMMED_HI16_I_B, 13)
|
||||
RELOC_NUMBER (R_NFP_W64LE, 14)
|
||||
RELOC_NUMBER (R_NFP_SH_INFO, 15)
|
||||
RELOC_NUMBER (R_NFP_W32BE, 16)
|
||||
RELOC_NUMBER (R_NFP_W64BE, 17)
|
||||
RELOC_NUMBER (R_NFP_W32_29_24, 18)
|
||||
RELOC_NUMBER (R_NFP_W32LE_AND, 19)
|
||||
RELOC_NUMBER (R_NFP_W32BE_AND, 20)
|
||||
RELOC_NUMBER (R_NFP_W32LE_OR, 21)
|
||||
RELOC_NUMBER (R_NFP_W32BE_OR, 22)
|
||||
RELOC_NUMBER (R_NFP_W64LE_AND, 23)
|
||||
RELOC_NUMBER (R_NFP_W64BE_AND, 24)
|
||||
RELOC_NUMBER (R_NFP_W64LE_OR, 25)
|
||||
RELOC_NUMBER (R_NFP_W64BE_OR, 26)
|
||||
END_RELOC_NUMBERS (R_NFP_MAX)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _ELF_NFP_H */
|
||||
180
include/opcode/nfp.h
Normal file
180
include/opcode/nfp.h
Normal file
@ -0,0 +1,180 @@
|
||||
/* nfp.h. NFP opcode list.
|
||||
Copyright (C) 2017-2018 Free Software Foundation, Inc.
|
||||
Contributed by Francois H. Theron <francois.theron@netronome.com>
|
||||
|
||||
This file is part of the GNU opcodes library.
|
||||
|
||||
GDB, GAS, and the GNU binutils are free software; you can redistribute
|
||||
them and/or modify them under the terms of the GNU General Public
|
||||
License as published by the Free Software Foundation; either version 3,
|
||||
or (at your option) any later version.
|
||||
|
||||
GDB, GAS, and the GNU binutils are distributed in the hope that they
|
||||
will be useful, but WITHOUT ANY WARRANTY; without even the implied
|
||||
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
|
||||
the GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this file; see the file COPYING3. If not, write to the Free
|
||||
Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
|
||||
MA 02110-1301, USA. */
|
||||
|
||||
#ifndef _NFP_H_
|
||||
#define _NFP_H_
|
||||
|
||||
#include "bfd.h"
|
||||
#include "elf/nfp.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/* The bfd_vma type has the description below, so we use that and BFD_VMA_FMT
|
||||
instead of uint64_t or bfd_uint64_t.
|
||||
"Represent a target address. Also used as a generic unsigned type
|
||||
which is guaranteed to be big enough to hold any arithmetic types
|
||||
we need to deal with."
|
||||
|
||||
We use ME versions for most of this rather than NFP family and revision
|
||||
numbers. The version numbers are currently 2.7 and 2.8 and to avoid long
|
||||
names with many underscores we'll just use 27 and 28 until some feature
|
||||
number makes it necessary to do something different. */
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_CMD ((bfd_vma) 0x008000000000)
|
||||
#define NFP_ME27_INSTR_CMD ((bfd_vma) 0x000000000000)
|
||||
#define NFP_ME27_INSTR_IS_CMD(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_CMD) == NFP_ME27_INSTR_CMD)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_ALU_SHF ((bfd_vma) 0x1ee000000000)
|
||||
#define NFP_ME27_INSTR_ALU_SHF ((bfd_vma) 0x008000000000)
|
||||
#define NFP_ME27_INSTR_IS_ALU_SHF(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_ALU_SHF) == NFP_ME27_INSTR_ALU_SHF)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_ALU ((bfd_vma) 0x1ee000000000)
|
||||
#define NFP_ME27_INSTR_ALU ((bfd_vma) 0x00a000000000)
|
||||
#define NFP_ME27_INSTR_IS_ALU(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_ALU) == NFP_ME27_INSTR_ALU)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_IMMED ((bfd_vma) 0x1ff900000000)
|
||||
#define NFP_ME27_INSTR_IMMED ((bfd_vma) 0x00f000000000)
|
||||
#define NFP_ME27_INSTR_IS_IMMED(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_IMMED) == NFP_ME27_INSTR_IMMED)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_LD_FIELD ((bfd_vma) 0x1ffa00e00000)
|
||||
#define NFP_ME27_INSTR_LD_FIELD ((bfd_vma) 0x00c000000000)
|
||||
#define NFP_ME27_INSTR_IS_LD_FIELD(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_LD_FIELD) == NFP_ME27_INSTR_LD_FIELD)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_CTX_ARB ((bfd_vma) 0x00f800000000)
|
||||
#define NFP_ME27_INSTR_CTX_ARB ((bfd_vma) 0x00e000000000)
|
||||
#define NFP_ME27_INSTR_IS_CTX_ARB(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_CTX_ARB) == NFP_ME27_INSTR_CTX_ARB)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_LOCAL_CSR ((bfd_vma) 0x1ffe00100000)
|
||||
#define NFP_ME27_INSTR_LOCAL_CSR ((bfd_vma) 0x00fc00000000)
|
||||
#define NFP_ME27_INSTR_IS_LOCAL_CSR(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_LOCAL_CSR) == NFP_ME27_INSTR_LOCAL_CSR)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_BRANCH ((bfd_vma) 0x00f8000c3ce0)
|
||||
#define NFP_ME27_INSTR_BRANCH ((bfd_vma) 0x00d800000020)
|
||||
#define NFP_ME27_INSTR_IS_BRANCH(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_BRANCH) == NFP_ME27_INSTR_BRANCH)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_BR_BYTE ((bfd_vma) 0x00f800000000)
|
||||
#define NFP_ME27_INSTR_BR_BYTE ((bfd_vma) 0x00c800000000)
|
||||
#define NFP_ME27_INSTR_IS_BR_BYTE(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_BR_BYTE) == NFP_ME27_INSTR_BR_BYTE)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_BR_BIT ((bfd_vma) 0x00f800080300)
|
||||
#define NFP_ME27_INSTR_BR_BIT ((bfd_vma) 0x00d000000000)
|
||||
#define NFP_ME27_INSTR_IS_BR_BIT(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_BR_BIT) == NFP_ME27_INSTR_BR_BIT)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_BR_ALU ((bfd_vma) 0x1fff80000000)
|
||||
#define NFP_ME27_INSTR_BR_ALU ((bfd_vma) 0x00e800000000)
|
||||
#define NFP_ME27_INSTR_IS_BR_ALU(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_BR_ALU) == NFP_ME27_INSTR_BR_ALU)
|
||||
|
||||
#define NFP_ME27_INSTR_MASK_MULT ((bfd_vma) 0x1efe3f000000)
|
||||
#define NFP_ME27_INSTR_MULT ((bfd_vma) 0x00f800000000)
|
||||
#define NFP_ME27_INSTR_IS_MULT(instr) \
|
||||
((instr & NFP_ME27_INSTR_MASK_MULT) == NFP_ME27_INSTR_MULT)
|
||||
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_CMD ((bfd_vma) 0x008000000000)
|
||||
#define NFP_ME28_INSTR_CMD ((bfd_vma) 0x000000000000)
|
||||
#define NFP_ME28_INSTR_IS_CMD(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_CMD) == NFP_ME28_INSTR_CMD)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_ALU_SHF ((bfd_vma) 0x00e000000000)
|
||||
#define NFP_ME28_INSTR_ALU_SHF ((bfd_vma) 0x008000000000)
|
||||
#define NFP_ME28_INSTR_IS_ALU_SHF(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_ALU_SHF) == NFP_ME28_INSTR_ALU_SHF)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_ALU ((bfd_vma) 0x00e000000000)
|
||||
#define NFP_ME28_INSTR_ALU ((bfd_vma) 0x00a000000000)
|
||||
#define NFP_ME28_INSTR_IS_ALU(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_ALU) == NFP_ME28_INSTR_ALU)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_IMMED ((bfd_vma) 0x01f900000000)
|
||||
#define NFP_ME28_INSTR_IMMED ((bfd_vma) 0x00f000000000)
|
||||
#define NFP_ME28_INSTR_IS_IMMED(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_IMMED) == NFP_ME28_INSTR_IMMED)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_LD_FIELD ((bfd_vma) 0x01fa00e00000)
|
||||
#define NFP_ME28_INSTR_LD_FIELD ((bfd_vma) 0x00c000000000)
|
||||
#define NFP_ME28_INSTR_IS_LD_FIELD(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_LD_FIELD) == NFP_ME28_INSTR_LD_FIELD)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_CTX_ARB ((bfd_vma) 0x00f800000000)
|
||||
#define NFP_ME28_INSTR_CTX_ARB ((bfd_vma) 0x00e000000000)
|
||||
#define NFP_ME28_INSTR_IS_CTX_ARB(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_CTX_ARB) == NFP_ME28_INSTR_CTX_ARB)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_LOCAL_CSR ((bfd_vma) 0x01fe00100000)
|
||||
#define NFP_ME28_INSTR_LOCAL_CSR ((bfd_vma) 0x00fc00000000)
|
||||
#define NFP_ME28_INSTR_IS_LOCAL_CSR(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_LOCAL_CSR) == NFP_ME28_INSTR_LOCAL_CSR)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_BRANCH ((bfd_vma) 0x00f8000c3ce0)
|
||||
#define NFP_ME28_INSTR_BRANCH ((bfd_vma) 0x00d800000020)
|
||||
#define NFP_ME28_INSTR_IS_BRANCH(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_BRANCH) == NFP_ME28_INSTR_BRANCH)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_BR_BYTE ((bfd_vma) 0x00f800000000)
|
||||
#define NFP_ME28_INSTR_BR_BYTE ((bfd_vma) 0x00c800000000)
|
||||
#define NFP_ME28_INSTR_IS_BR_BYTE(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_BR_BYTE) == NFP_ME28_INSTR_BR_BYTE)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_BR_BIT ((bfd_vma) 0x00f800080300)
|
||||
#define NFP_ME28_INSTR_BR_BIT ((bfd_vma) 0x00d000000000)
|
||||
#define NFP_ME28_INSTR_IS_BR_BIT(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_BR_BIT) == NFP_ME28_INSTR_BR_BIT)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_BR_ALU ((bfd_vma) 0x00ff80000000)
|
||||
#define NFP_ME28_INSTR_BR_ALU ((bfd_vma) 0x00e800000000)
|
||||
#define NFP_ME28_INSTR_IS_BR_ALU(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_BR_ALU) == NFP_ME28_INSTR_BR_ALU)
|
||||
|
||||
#define NFP_ME28_INSTR_MASK_MULT ((bfd_vma) 0x00fe3f000000)
|
||||
#define NFP_ME28_INSTR_MULT ((bfd_vma) 0x00f800000000)
|
||||
#define NFP_ME28_INSTR_IS_MULT(instr) \
|
||||
((instr & NFP_ME28_INSTR_MASK_MULT) == NFP_ME28_INSTR_MULT)
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int cpp_target;
|
||||
int cpp_action;
|
||||
int cpp_token;
|
||||
unsigned int len_fixed;
|
||||
unsigned int len_mask;
|
||||
const char *mnemonic;
|
||||
}
|
||||
nfp_cmd_mnemonic;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _NFP_H_ */
|
||||
@ -1,3 +1,14 @@
|
||||
2018-04-30 Francois H. Theron <francois.theron@netronome.com>
|
||||
|
||||
Makefile.am: Added nfp-dis.c.
|
||||
configure.ac: Added bfd_nfp_arch.
|
||||
disassemble.h: Added print_insn_nfp prototype.
|
||||
disassemble.c: Added ARCH_nfp and call to print_insn_nfp
|
||||
nfp-dis.c: New, for NFP support.
|
||||
po/POTFILES.in: Added nfp-dis.c to the list.
|
||||
Makefile.in: Regenerate.
|
||||
configure: Regenerate.
|
||||
|
||||
2018-04-26 Jan Beulich <jbeulich@suse.com>
|
||||
|
||||
* i386-opc.tbl: Fold various non-memory operand AVX512VL
|
||||
|
||||
@ -200,6 +200,7 @@ TARGET_LIBOPCODES_CFILES = \
|
||||
mt-opc.c \
|
||||
nds32-asm.c \
|
||||
nds32-dis.c \
|
||||
nfp-dis.c \
|
||||
nios2-dis.c \
|
||||
nios2-opc.c \
|
||||
ns32k-dis.c \
|
||||
|
||||
@ -502,6 +502,7 @@ TARGET_LIBOPCODES_CFILES = \
|
||||
mt-opc.c \
|
||||
nds32-asm.c \
|
||||
nds32-dis.c \
|
||||
nfp-dis.c \
|
||||
nios2-dis.c \
|
||||
nios2-opc.c \
|
||||
ns32k-dis.c \
|
||||
@ -902,6 +903,7 @@ distclean-compile:
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mt-opc.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nds32-asm.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nds32-dis.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nfp-dis.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nios2-dis.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/nios2-opc.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ns32k-dis.Plo@am__quote@
|
||||
|
||||
1
opcodes/configure
vendored
1
opcodes/configure
vendored
@ -12671,6 +12671,7 @@ if test x${all_targets} = xfalse ; then
|
||||
bfd_mt_arch) ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
|
||||
bfd_msp430_arch) ta="$ta msp430-dis.lo msp430-decode.lo" ;;
|
||||
bfd_nds32_arch) ta="$ta nds32-asm.lo nds32-dis.lo" ;;
|
||||
bfd_nfp_arch) ta="$ta nfp-dis.lo" ;;
|
||||
bfd_nios2_arch) ta="$ta nios2-dis.lo nios2-opc.lo" ;;
|
||||
bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
|
||||
bfd_or1k_arch) ta="$ta or1k-asm.lo or1k-desc.lo or1k-dis.lo or1k-ibld.lo or1k-opc.lo" using_cgen=yes ;;
|
||||
|
||||
@ -295,6 +295,7 @@ if test x${all_targets} = xfalse ; then
|
||||
bfd_mt_arch) ta="$ta mt-asm.lo mt-desc.lo mt-dis.lo mt-ibld.lo mt-opc.lo" using_cgen=yes ;;
|
||||
bfd_msp430_arch) ta="$ta msp430-dis.lo msp430-decode.lo" ;;
|
||||
bfd_nds32_arch) ta="$ta nds32-asm.lo nds32-dis.lo" ;;
|
||||
bfd_nfp_arch) ta="$ta nfp-dis.lo" ;;
|
||||
bfd_nios2_arch) ta="$ta nios2-dis.lo nios2-opc.lo" ;;
|
||||
bfd_ns32k_arch) ta="$ta ns32k-dis.lo" ;;
|
||||
bfd_or1k_arch) ta="$ta or1k-asm.lo or1k-desc.lo or1k-dis.lo or1k-ibld.lo or1k-opc.lo" using_cgen=yes ;;
|
||||
|
||||
@ -64,6 +64,7 @@
|
||||
#define ARCH_mt
|
||||
#define ARCH_msp430
|
||||
#define ARCH_nds32
|
||||
#define ARCH_nfp
|
||||
#define ARCH_nios2
|
||||
#define ARCH_ns32k
|
||||
#define ARCH_or1k
|
||||
@ -275,6 +276,11 @@ disassembler (enum bfd_architecture a,
|
||||
disassemble = print_insn_nds32;
|
||||
break;
|
||||
#endif
|
||||
#ifdef ARCH_nfp
|
||||
case bfd_arch_nfp:
|
||||
disassemble = print_insn_nfp;
|
||||
break;
|
||||
#endif
|
||||
#ifdef ARCH_ns32k
|
||||
case bfd_arch_ns32k:
|
||||
disassemble = print_insn_ns32k;
|
||||
@ -537,6 +543,9 @@ disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
|
||||
#ifdef ARCH_mips
|
||||
print_mips_disassembler_options (stream);
|
||||
#endif
|
||||
#ifdef ARCH_nfp
|
||||
print_nfp_disassembler_options (stream);
|
||||
#endif
|
||||
#ifdef ARCH_powerpc
|
||||
print_ppc_disassembler_options (stream);
|
||||
#endif
|
||||
|
||||
@ -72,6 +72,7 @@ extern int print_insn_moxie (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_msp430 (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_mt (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_nds32 (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_nfp (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_ns32k (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_or1k (bfd_vma, disassemble_info *);
|
||||
extern int print_insn_pdp11 (bfd_vma, disassemble_info *);
|
||||
|
||||
2990
opcodes/nfp-dis.c
Normal file
2990
opcodes/nfp-dis.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -154,6 +154,7 @@ mt-opc.c
|
||||
mt-opc.h
|
||||
nds32-asm.c
|
||||
nds32-dis.c
|
||||
nfp-dis.c
|
||||
nios2-dis.c
|
||||
nios2-opc.c
|
||||
ns32k-dis.c
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user