Call arc_get_opcode_mach to map bfd mach number to opcode value.
(print_insn_*): Pass bfd mach number, not opcode version.
* arc-opc.c (arc_get_opcode_mach): New function.
(UNSIGNED, SATURATION): New operands.
(mac, mul, mul64, mulu64): New insns.
(ext. asl, asr, lsr, ror): Only available on host and graphics cpus.
(padc, padd, pmov, pand, psbc, psub, swap): New insns.
(host,graphics,audio extended and auxiliary regs): Define.
(ss, sc, mh, ml): New suffixes.
(arc_opcode_supported, arc_opval_supported): New functions.
(insert_multshift, extract_multshift): Deleted.
All uses changed.
(extraction fns): Insn argument now array of two words. Return pointer
to value's table entry. All uses changed.
(arc_opcode_lookup_suffix): Exported for arc-dis.c.
(insert_multshift, extract_multshift): New fns.
(arc_operands): Add support for cache bypass suffix. Add support for
predefined aux regs. Modifier bits moved to flags field.
(arc_opcodes): Likewise.
Add mul/mulu/shift insns. Syntax of zero/sign extension insns changed.
New insn rlc. Update to syntax in programmer's manual.
(arc_reg_names): Fix typo in lp_count. Add predefined aux regs.
(arc_suffixes): New synonyms lo,hs for cs,cc. New suffix for cache
bypass.
(arc_opcode_init_tables): New argument to indicate cpu type.
(insert_reg): Handle predefined aux regs.
(extract_reg): Likewise.
(lookup_register): New fn.
* arc-dis.c (arc_condition_codes): Deleted.
(print_insn_arc): Handle insns with 32 bit immediate constants better.
Clean up modifier handling. Handle predefined aux regs.
David Edelsohn