gcc doesn't emit stack notes for ELFv1, since ELFv1 never needs an
executable stack. Note that ELFv1 is usually big-endian and ELFv2
little-endian, but the ABI is really orthogonal to endiannes.
* powerpc.cc (Target_powerpc<64,*>::powerpc_info): Set
is_default_stack_executable false.
2017-09-20 Teresa Johnson <tejohnson@google.com>
* plugin.cc (is_visible_from_outside): Check for export dynamic symbol
option and list.
* testsuite/Makefile.am (plugin_test_12): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/export_dynamic_plugin.cc: New test source.
* testsuite/plugin_test_12.sh: New test script.
ppc32, like many targets, defines the address of a function as the PLT
call stub code for functions referenced but not defined in a non-PIC
executable. ppc32 gold, unlike other targets, inherits the ppc64
multiple stub capability for dealing with very large binaries where
one set of stubs can't be reached from all code locations. This means
there can be multiple choices of address for a function, which might
cause function pointer comparison failures. So for ppc32, make
non-branch references always use the first stub group.
(PowerPC64 ELFv1 is always PIC so doesn't need to define the address
of an external function as the PLT stub. PowerPC64 ELFv2 needs a
special set of global entry stubs to serve as the address of external
functions, so it too is not affected by this bug.)
* powerpc.cc (Target_powerpc::Branch_info::make_stub): Put
stubs for ppc32 non-branch relocs in first stub table.
(Target_powerpc::Relocate::relocate): Resolve similarly.
The trouble with stubs per output section is that ppc32 uses a plt
stub as the address of a global function. This needs to be unique,
otherwise we'll get multiple addresses for a function.
Obviously this is only a partial solution, since ppc32 will get
multiple stubs when code is larger than 33M. A proper fix will
involve selecting a unique stub to use for non-branch relocs.
* options.h (stub-group-multi): Default to true. Add
--no-stub-group-multi.
In the TLS GD/LD to LE optimization, ld replaces a sequence like
addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x
bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x
R_PPC64_REL24 __tls_get_addr
nop
with
addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x
addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x
nop
When the tprel offset is small, this can be further optimized to
nop
addi 3,13,x@tprel
nop
bfd/
* elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt.
(ppc64_elf_tls_optimize): Set it.
(ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert
insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when
addis would add zero.
* elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt.
(ppc_elf_tls_optimize): Set it.
(ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert
insn on TPREL16_LO relocs to use r2 when addis would add zero.
gold/
* powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on
TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS
relocs to use r2/r13 when addis would add zero.
ld/
* testsuite/ld-powerpc/tls.s: Add calls with tls markers.
* testsuite/ld-powerpc/tls32.s: Likewise.
* testsuite/ld-powerpc/powerpc.exp: Run tls marker tests.
* testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization.
* testsuite/ld-powerpc/tlsexe.d: Likewise.
* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
* testsuite/ld-powerpc/tlsld.d: Likewise.
* testsuite/ld-powerpc/tlsmark.d: Likewise.
* testsuite/ld-powerpc/tlsopt4.d: Likewise.
* testsuite/ld-powerpc/tlstoc.d: Likewise.
This implements the special __tls_get_addr_opt call stub for powerpc
gold that returns __thread variable addresses without actually making
a call to __tls_get_addr in most cases. Shared libraries that are
loaded at program load time (ie. dlopen is not used) have a known
layout for their __thread variables, and thus DTPMOD64/DPTREL64 pairs
describing those variables can be set up by ld.so for the
__tls_get_addr_opt call stub fast exit.
Ref https://sourceware.org/ml/libc-alpha/2015-03/msg00626.html
I really, really wish I'd used a differently versioned __tls_get_addr
symbol than the base symbol to indicate glibc support for the
optimized call, rather than having glibc export __tls_get_addr_opt. A
lot of the messing around here, flipping symbols from __tls_get_addr
to __tls_get_addr_opt, is caused by that decision. About the only
benefit is that a user can see at a glance that their disassembled
code is calling __tls_get_addr via the fancy call stub.. Anyway, we
need references to __tls_get_addr to seem like they were to
__tls_get_addr_opt, and in cases like the tsan interceptor, a
definition of __tls_get_addr to seem like one of __tls_get_addr_opt
as well. That's the reason for Symbol::clear_in_reg and
Symbol_table::clone, and why symbols are substituted in Scan::global
and other places dealing with dynamic linking.
elfcpp/
* elfcpp.h (DT_PPC_OPT): Define.
* powerpc.h (PPC_OPT_TLS): Define.
gold/
* options.h (tls_get_addr_optimize): New option.
* symtab.h (Symbol::clear_in_reg, clone): New functions.
(Sized_symbol::clone): New function.
(Symbol_table::clone): New function.
* resolve.cc (Symbol::clone, Sized_symbol::clone): New functions.
* powerpc.cc (Target_powerpc::has_tls_get_addr_opt_,
tls_get_addr_, tls_get_addr_opt_): New vars.
(Target_powerpc::tls_get_addr_opt, tls_get_addr,
is_tls_get_addr_opt, replace_tls_get_addr,
set_has_tls_get_addr_opt, stk_linker): New functions.
(Target_powerpc::Track_tls::maybe_skip_tls_get_addr_call): Add
target param. Update callers. Compare symbols rather than names.
(Target_powerpc::do_define_standard_symbols): Init tls_get_addr_
and tls_get_addr_opt_.
(Target_powerpc::Branch_info::mark_pltcall): Translate tls_get_addr
sym to tls_get_addr_opt.
(Target_powerpc::Branch_info::make_stub): Likewise.
(Stub_table::define_stub_syms): Likewise.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Likewise.
(add_3_12_2, add_3_12_13, bctrl, beqlr, cmpdi_11_0, cmpwi_11_0,
ld_11_1, ld_11_3, ld_12_3, lwz_11_3, lwz_12_3, mr_0_3, mr_3_0,
mtlr_11, std_11_1): New constants.
(Stub_table::eh_frame_added_): Delete.
(Stub_table::tls_get_addr_opt_bctrl_, plt_fde_len_, plt_fde_): New vars.
(Stub_table::init_plt_fde): New functions.
(Stub_table::add_eh_frame, replace_eh_frame): Move definition out
of line. Init and use plt_fde_.
(Stub_table::plt_call_size): Return size for tls_get_addr stub.
Extract alignment code to..
(Stub_table::plt_call_align): ..this new function. Adjust all callers.
(Stub_table::add_plt_call_entry): Set has_tls_get_addr_opt and
tls_get_addr_opt_bctrl, and align after that.
(Stub_table::do_write): Write out tls_get_addr stub.
(Target_powerpc::do_finalize_sections): Emit DT_PPC_OPT
PPC_OPT_TLS/PPC64_OPT_TLS bit.
(Target_powerpc::Relocate::relocate): Don't check for or modify
nop following bl for tls_get_addr stub.
On 64-bit targets there is a 32-bit hole in symbol->u_, and another
due to symbol flags exceeding 32 bits. By splitting the union,
the total size of the class reduces by one 64-bit word.
* symtab.h (Symbol): Split u_ into u1_ and u2_. Adjust accessors
to suit. Move plt_offset_ before got_offsets_.
* symtab.cc (Symbol::init_fields): Adjust for union change.
(Symbol::init_base_output_data): Likewise.
(Symbol::init_base_output_segment): Likewise.
(Symbol::allocate_base_common): Likewise.
(Symbol::output_section): Likewise.
(Symbol::set_output_section): Likewise.
(Symbol::set_output_segment): Likewise.
* resolve.cc (Symbol::override_base): Likewise.
(Symbol::override_base_with_special): Likewise.
gold/ChangeLog:
PR gold/21868
* aarch64.cc (AArch64_relobj::try_fix_erratum_843419_optimized):
Add extra view offset argument to function.
(AArch64_relobj::fix_errata_and_relocate_erratum_stubs): Add
extra view offset set to the output offset when the view has
is_input_output_view set, since it has not already been
included. Pass this to try_fix_erratum_843419_optimized.
If a custom linker script with an unexpected relative layout of .got
and .got.plt sections was used, gold might produce a wrong offset
when applying R_AARCH64_TLSDESC_* relocations.
This patch fixes the issue by calculating "got_tlsdesc_offset"
in a more direct way.
gold/
* aarch64.cc (Target_aarch64::Relocate::relocate_tls):
Make got_tlsdesc_offset signed and fix its calculation.
* testsuite/Makefile.am (aarch64_tlsdesc): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/aarch64_tlsdesc.s: New test source file.
* testsuite/aarch64_tlsdesc.sh: New test script.
* testsuite/aarch64_tlsdesc.t: New test linker script.
This patch provides a flag for PowerPC64 ELFv2 use in class Symbol,
and modifies Sized_target::resolve to return whether the symbol has
been resolved. If not, normal processing continues. I use this for
PowerPC64 ELFv2 to keep track of whether a symbol has any definition
with non-zero localentry, in order to disable --plt-localentry for
that symbol.
PR 21847
* powerpc.cc (Target_powerpc::is_elfv2_localentry0): Test
non_zero_localentry.
(Target_powerpc::resolve): New function.
(powerpc_info): Set has_resolve for 64-bit.
* target.h (Sized_target::resolve): Return bool.
* resolve.cc (Symbol_table::resolve): Continue with normal
processing when target resolve returns false.
* symtab.h (Symbol::non_zero_localentry, set_non_zero_localentry):
New accessors.
(Symbol::non_zero_localentry_): New flag bit.
* symtab.cc (Symbol::init_fields): Init non_zero_localentry_.
There is a very small but non-zero probability that a stub group
contains stubs on one relax pass, but does not on the next. In that
case we would get an FDE covering a zero length address range.
(Actually, it's even worse. Alignment padding for stubs can mean the
address for the non-existent stubs is past the end of the original
section to which stubs are attached, and due to the way
do_plt_fde_location calculates the length we can get a negative
length.) Fixing this properly requires removing the FDE.
Also, I have been implementing the __tls_get_addr_opt support for
gold, and that stub needs something other than the default FDE. The
necessary FDE will depend on the offset to the __tls_get_addr_opt
stub, which of course can change during relaxation. That means at the
very least, rewriting the FDE on each pass, possibly changing the FDE
size. I think that is better done by completely recreating PLT
eh_frame FDEs.
* ehframe.cc (Fde::operator==): New.
(Cie::remove_fde, Eh_frame::remove_ehframe_for_plt): New.
* ehframe.h (Fde::operator==): Declare.
(Cie::remove_fde, Eh_frame::remove_ehframe_for_plt): Likewise.
* layout.cc (Layout::remove_eh_frame_for_plt): New.
* layout.h (Layout::remove_eh_frame_for_plt): Declare.
* powerpc.cc (Target_powerpc::do_relax): Remove old eh_frame FDEs.
(Stub_table::add_eh_frame): Delete eh_frame_added_ condition.
Don't add eh_frame for empty stub section.
(Stub_table::remove_eh_frame): New.
This adds a --no-tls-optimize option for people who want to keep
__tls_get_addr calls in an executable rather than optimizing such code
sequences to IE/LE.
Also tidy some formatting errors, rename a variable to better reflect
its use, and tweak two functions that create pairs of GOT entries to
first check whether the GOT entry already exists before potentially
inserting the header via reserve(2). Without the check it is possible
to waste one GOT entry.
* options.h (no_tls_optimize): New powerpc option.
* powerpc.cc (Target_powerpc::abiversion, set_abiversion): Formatting.
(Target_powerpc::stk_toc): Formatting, fix comment.
(Target_powerpc::Track_tls::tls_get_addr_state): Rename from
tls_get_addr.
(Target_powerpc::optimize_tls_gd, optimize_tls_ld, optimize_tls_ie):
Return TLSOPT_NONE when !tls_optimize.
(Target_powerpc::add_global_pair_with_rel): Check
for existing reloc before reserving.
(Target_powerpc::add_local_tls_pair): Likewise.
This makes ld warn about --plt-localentry if a version of glibc
without the necessary ld.so checks is detected, and revises the
documentation.
bfd/
* elf64-ppc.c (ppc64_elf_tls_setup): Warn on --plt-localentry
without ld.so checks.
gold/
* powerpc.cc (Target_powerpc::scan_relocs): Warn on --plt-localentry
without ld.so checks.
ld/
* ld.texinfo (plt-localentry): Revise.
The big comment in ppc64_elf_tls_setup says why. I've also added some
code to the bfd linker that catches the -lpthread -lc symbol
differences and disable generation of optimized call stubs even when
--plt-localentry is activated. Gold doesn't yet have that.
PR 21847
bfd/
* elf64-ppc.c (struct ppc_link_hash_entry): Add non_zero_localentry.
(ppc64_elf_merge_symbol): Set non_zero_localentry.
(is_elfv2_localentry0): Test non_zero_localentry.
(ppc64_elf_tls_setup): Default to --no-plt-localentry.
gold/
* powerpc.cc (Target_powerpc::scan_relocs): Default to
--no-plt-localentry.
ld/
* ld.texinfo (plt-localentry): Document.
The 64-bit ELF compression header has a reserved field. It should be
cleared to avoid random bits in it.
elfcpp/
PR gold/21857
* elfcpp.h (Chdr_write): Add put_ch_reserved.
(Chdr_write<64, true>::put_ch_reserved): New.
(Chdr_write<64, false>::put_ch_reserved): Likewise.
gold/
PR gold/21857
* compressed_output.cc (Output_compressed_section::set_final_data_size):
Call put_ch_reserved to clear the reserved field for 64-bit ELF.
GCC 4.2 fails to compile "(uint64_t) 0x800080008000" with
error: integer constant is too large for ‘long’ type
This patch adds "llu" suffix to 0x800080008000 for GCC 4.2.
* mips.cc (Mips_relocate_functions): Add "llu" suffix to
0x800080008000.
My PPC64_OPT_LOCALENTRY patch of June 1, git commit f378ab099d, and
the later gold change, git commit 7ee7ff7015, added an insn in
__glink_PLTresolve which needs a corresponding adjustment in the
eh_frame info for asynchronous exceptions to unwind correctly.
It would have been OK for both ABIs to use +5 for the advance before
restore of LR, since we can put the DW_CFA_restore_extended on any
insn after the actual restore and before the r12/r0 copy is clobbered,
but it's slightly better to delay as much as possible. There are
then more addresses where fewer CFA program insns are executed.
bfd/
* elf64-ppc.c (ppc64_elf_size_stubs): Correct advance to
restore of LR.
gold/
* powerpc.cc (glink_eh_frame_fde_64v2): Correct advance to
restore of LR.
(glink_eh_frame_fde_64v1): Advance to restore of LR at latest
possible insn.
The problem is caused by the fact that gold is relocating the stubs
for an entire output section when it processes the relocations for a
particular input section that happened to be designated as the stub
table "owner". The Relocate_task for that input section may or may not
run before the Relocate_task for another input section that contains
the code that needs the erratum fix, but doesn't "own" the stub
table. If it runs before (or might even race with) that other task, it
ends up with a copy of the unrelocated original instruction.
In other words - when calling fix_errata() from
do_relocate_sections(), gold is going through the list of errata stubs
that are associated only with that object. This routine updates the
stored original instruction and replaces it in the output view with a
branch to the stub. Later, as gold is going through the object file's
input sections, it then checks for stub tables "owned" by each input
section, and writes out all the stubs from that stub table, regardless
of what object file each stub is associated with.
Fixed by relocating the erratum stub only after the corresponding
errata spot is fixed. That is to have fix_errata() call
Stub_table::relocate_erratum_stub() for each stub.
gold/ChangeLog
2017-07-06 Han Shen <shenhan@google.com>
PR gold/21491
* aarch64.cc (Erratum_stub::invalidate_erratum_stub): New method.
(Erratum_stub::is_invalidated_erratum_stub): New method.
(Stub_table::relocate_reloc_stub): Renamed from "relocate_stub".
(Stub_table::relocate_reloc_stubs): Renamed from "relocate_stubs".
(Stub_table::relocate_erratum_stub): New method.
(AArch64_relobj::fix_errata_and_relocate_erratum_stubs): Renamed from
"fix_errata".
(Target_aarch64::relocate_reloc_stub): Renamed from "relocate_stub".
elfcpp/
* elfcpp.h (DT_PPC64_OPT): Define.
* powerpc.h (PPC64_OPT_TLS, PPC64_OPT_MULTI_TOC,
PPC64_OPT_LOCALENTRY): Define.
gold/
* options.h (General_options): Add plt_localentry.
* powerpc.cc (Target_powerpc::st_other): New function.
(Target_powerpc::plt_localentry0_, plt_localentry0_init_,
has_localentry0_): New vars.
(Target_powerpc::plt_localentry0, set_has_localentry0,
is_elfv2_localentry0): New functions.
(Target_powerpc::Branch_info::mark_pltcall): Don't set tocsave or
return true for localentry:0 calls.
(Stub_table::Plt_stub_ent::localentry0_): New var.
(Stub_table::add_plt_call_entry): Set localentry0_ and has_localentry0_.
Don't set r2save_ for localentry:0 calls.
(Output_data_glink::do_write): Save r2 in __glink_PLTresolve for elfv2.
(Target_powerpc::scan_relocs): Default plt_localentry0_.
(Target_powerpc::do_finalize_sections): Set DT_PPC64_OPT.
(Target_powerpc::Relocate::relocate): Don't require nop following
calls for localentry:0 plt calls, and don't change nop.
This adds support to gold for the tocsave relocs already supported by
ld.bfd. R_PPC64_TOCSAVE relocs are part of a scheme to move r2 saves
to the prologue of a function rather than in each plt call stub. We
don't want a compiler to always emit the r2 save, as this would be
wasted if the calls turned out to be local. See the tocsave*.s in
ld/testsuite/ld-powerpc/.
* powerpc.cc (Target_powerpc::tocsave_loc_): New var.
(Target_powerpc::mark_pltcall, add_tocsave, tocsave_loc): New functions.
(Target_powerpc::Branch_info::tocsave_): New var.
(Target_powerpc::Branch_info::mark_pltcall): New function.
(Target_powerpc::Branch_info::make_stub): Pass tocsave_ to
add_plt_call_entry.
(Stub_table::Plt_stub_ent): Make public. Add r2save_.
(Stub_table::add_plt_call_entry): Add bool tocsave_ param. Set
r2save_.
(Stub_table::find_plt_call_entry): Return Plt_stub_ent*. Adjust
use throughout.
(Stub_table::do_write): Conditionally output r2 save in plt stubs.
(Target_powerpc::Scan::local): Handle R_PPC64_TOCSAVE.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Skip r2 save in plt call stub
with tocsave reloc. Replace header tocsave nop with r2 save.
* symtab.h (struct Symbol_location_hash): Make public.
I was lazy when adding indx_ to Plt_stub_ent. The field isn't part of
the key, so ought to be part of the mapped type. Make it so.
* powerpc.cc (Plt_stub_key): Rename from Plt_stub_ent. Remove indx_.
(Plt_stub_key_hash): Rename from Plt_stub_ent_hash.
(struct Plt_stub_ent): New.
(Plt_stub_entries): Map from Plt_stub_key to Plt_stub_ent. Adjust
use throughout file.
* aarch64.cc (scan_reloc_for_stub): Use plt_address_for_global to
calculate the symbol value.
(scan_reloc_section_for_stubs): Allow stubs to be created for
section symbols.
(maybe_apply_stub): Handle creating stubs for weak symbols to
match the code in scan_reloc_for_stub.
If two objects are compiled with -fPIC or -fPIE and call the same
function, two different PLT entries are created, one for each object,
but the same stub symbol name is used for both.
* powerpc.cc (Stub_table::define_stub_syms): Always include object's
uniq_ value.
TLS relaxation may change erratum 843419 sequences that those offending ADRP
instructions actually transformed into other instructions in which case there
is erratum 843419 risk anymore that we should avoid installing unnecessary
branch-to-stub.
gold/
* aarch64.cc (Insn_utilities::is_mrs_tpidr_el0): New method.
(AArch64_relobj<size, big_endian>::try_fix_erratum_843419_optimized):
Return ture for some TLS relaxed sequences.
* aarch64.cc (maybe_apply_stub): Add debug logging for looking
up stubs to undefined symbols and early return rather than
fail to look them up.
(scan_reloc_for_stub): Add debug logging for no stub creation
for undefined symbols.
gold/
PR gold/21444
* gold.cc (Target_sparc::Relocate::relocate_tls): Local
variables are final for position-independent executables. This
has to be consistent with Target_sparc::Scan::local otherwise
they will disagree as to whether local-exec is used.
gold/ChangeLog
PR gold/21430
* aarch64.cc
(AArch64_relobj::convert_input_section_to_relaxed_section):
Set the section offset to -1ULL.
(Target_aarch64::relocate_section): Adjust the view in case
of a relaxed input section.
* testsuite/Makefile.am (pr21430): New test.
* testsuite/Makefile.in: Regenerate
* testsuite/pr21430.s: New test source file.
* testsuite/pr21430.sh: New test script.
gold/
* mips.cc (Mips_got_entry::hash()): Shift addend to reduce
possibility of collisions.
(Mips_got_entry::equals): Fix case for GOT_TLS_LDM
entries.
gold/
* mips.cc (Mips_relobj::merge_processor_specific_data_): New data
member.
(Mips_relobj::merge_processor_specific_data): New method.
(Mips_relobj::do_read_symbols): Set merge_processor_specific_data_
to false, only if the input file is a binary or if object has no
contents except the section name string table and an empty symbol
table with the undefined symbol.
(Target_mips::do_finalize_sections): Refactor. Skip empty object files
for merging processor-specific data.
gold/
* mips.cc (Target_mips::Relocate::calculated_value_): New data
member.
(Target_mips::Relocate::calculate_only_): Likewise.
(Target_mips::Relocate::relocate): Handle multiple consecutive
relocations with the same offset.
gold/
* mips.cc (symbol_refs_local): Return false if a symbol
is from a dynamic object.
(Target_mips::got_section): Make _GLOBAL_OFFSET_TABLE_ STV_HIDDEN.
(Target_mips::set_gp): Refactor. Make _gp STT_NOTYPE and
STB_LOCAL.
(Target_mips::do_finalize_sections): Set _gp after all the checks
for creating .got are done.
(Target_mips::Scan::global): Remove unused code.
2017-02-15 Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com>
PR gold/21111
* mips.cc (Mips_relocate_functions::relhigher): New method.
(Mips_relocate_functions::relhighest): Likewise.
(mips_get_size_for_reloc): Add support for relocs: R_MIPS_HIGHER and
R_MIPS_HIGHEST.
(Target_mips::Scan::local): Add support for relocs: R_MIPS_HIGHER,
R_MIPS_HIGHEST, R_MICROMIPS_HIGHER and R_MICROMIPS_HIGHEST.
(Target_mips::Scan::global): Likewise.
(Target_mips::Scan::get_reference_flags): Likewise.
(Target_mips::Relocate::relocate): Call static methods for resolving
HIGHER and HIGHEST relocations.
gold/
* x86_64.cc (Target_x86_64::do_can_check_for_function_pointers):
Return true even when building pie binaries.
(Target_x86_64::possible_function_pointer_reloc): Check opcode
for R_X86_64_PC32 relocations.
(Target_x86_64::local_reloc_may_be_function_pointer): Pass
extra arguments to local_reloc_may_be_function_pointer.
(Target_x86_64::global_reloc_may_be_function_pointer): Likewise.
* gc.h (gc_process_relocs): Add check for STT_FUNC.
* testsuite/Makefile.am (icf_safe_pie_test): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/icf_safe_pie_test.sh: New shell script.
gold/
* mips.cc (Mips_output_data_plt::rel_plt): Remove const from return
type.
(Target_mips::make_plt_entry): Make the sh_info field of .rel.plt
point to .plt.
gold/
PR gold/21054
* mips.cc (Mips_got_info::record_global_got_symbol): Don't add symbol
to the dynamic symbol table if it is forced to local visibility.
(Target_mips::do_finalize_sections): Don't add __RLD_MAP symbol to the
dynamic symbol table if it is forced to local visibility.
Doesn't yet trim off the unused TOC entries.
* powerpc.cc (class Powerpc_copy_relocs): New.
(Powerpc_copy_relocs::emit): New function.
(Powerpc_relobj::relatoc_, toc_, no_toc_opt_): New variables.
(Powerpc_relobj::toc_shndx, set_no_toc_opt, no_toc_opt): New inlines.
(Powerpc_relobj::do_relocate_sections): New function.
(Powerpc_relobj::make_toc_relative): Likewise.
(Powerpc_relobj::do_find_special_sections): Stash away .rela.toc
and .toc too.
(ok_lo_toc_insn): Move earlier, and handle more insns.
(Target_powerpc::Scan::local): If optimizing toc accesses, set
no_toc_opt for entries we can't edit. Check insn validity.
Emit "toc optimization is not supported" warning, downgraded
from error.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Edit TOC indirect code
to TOC relative. Don't emit "toc optimization is not supported"
error here.
PowerPC64 defines .TOC. rather than _GLOBAL_OFFSET_TABLE_, and
what's more, doesn't define it at all unless referenced. For ELFv1
ABI the symbol isn't normally referenced, so modify the test to accept
.TOC. as a variant of _GLOBAL_OFFSET_TABLE_ and 0 or 1 occurrences.
copy_test_relro as written doesn't need copy relocs on PowerPC64.
PowerPC64 is always PIC. So, modify copy_test_relro to test that the
existing vars are in fact read-only directly by deliberately causing a
sigsegv, and add another couple of vars that do cause copy relocs even
when PIC.
* testsuite/ver_test_8.sh: Accept .TOC. in lieu of
_GLOBAL_OFFSET_TABLE_. Allow zero count.
* testsuite/copy_test_relro_1.cc (c, q): New vars.
* testsuite/copy_test_relro.cc: Rewrite to test read-only
status of variables directly. Reference new vars in
read-only data.
Added just to accept, and ignore. gcc since 2015-10-21, when
configured with --enable-secureplt passes this option to the linker.
As powerpc gold cannot link --bss-plt code successfully, gold needs to
accept the option or the gcc specs file needs to be changed.
The patch also make gold detect --bss-plt code and error out rather
than producing a binary that crashes.
* options.h: Add --secure-plt option.
* powerpc.cc (Target_powerpc::Scan::local): Detect and error
on -fPIC -mbss-plt code.
(Target_powerpc::Scan::global): Likewise.
Plus some paranoia in symval_for_branch. We shouldn't get there with
dynamic symbols, but if we ever did the static_cast to Powerpc_relobj
would be wrong.
* powerpc.cc: Use shorter equivalent elfcpp typedef for
Reltype and reloc_size throughout.
(Target_powerpc::symval_for_branch): Exclude dynamic symbols.
(Target_powerpc::Scan::local): Use local var r_sym.
(Target_powerpc::Scan::global: Likewise.
(Target_powerpc::Relocate::relocate): Delete shadowing r_sym.
gold/
PR ld/20995
* copy-relocs.cc (Copy_relocs::make_copy_reloc): Use .dynbss for
read-only data when linking with -z relro.
* copy-relocs.h (Copy_relocs::dynrelro_): New data member.
* testsuite/Makefile.am (copy_test_relro): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/copy_test_relro.cc: New source file.
* testsuite/copy_test_relro_1.cc: New source file.
gold/
PR gold/17643
* options.h (-z bndplt): New option.
* x86_64.cc (Output_data_plt_x86_64::regular_count): New method.
(Output_data_plt_x86_64::address_for_global): Move implementation into
virtual method.
(Output_data_plt_x86_64::address_for_local): Likewise.
(Output_data_plt_x86_64::got): New method.
(Output_data_plt_x86_64::got_plt): New method.
(Output_data_plt_x86_64::got_irelative): New method.
(Output_data_plt_x86_64::do_address_for_global): New virtual method.
(Output_data_plt_x86_64::do_address_for_local): New virtual method.
(class Output_data_plt_x86_64_bnd): New class.
(Target_x86_64::do_make_data_plt): Move out of line and specialize
for each size (both overloads).
(Output_data_plt_x86_64::set_final_data_size): Cosmetic changes.
* testsuite/Makefile.am (bnd_plt_1): New test case.
(bnd_ifunc_1): New test case.
(bnd_ifunc_2): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/bnd_ifunc_1.s: New source file.
* testsuite/bnd_ifunc_1.sh: New shell script.
* testsuite/bnd_ifunc_2.s: New source file.
* testsuite/bnd_ifunc_2.sh: New shell script.
* testsuite/bnd_plt_1.s: New source file.
* testsuite/bnd_plt_1.sh: New shell script.
Gold was not placing forced-local symbols (e.g., hidden visibility)
at the front of the dynamic symbol table, or including them in the
count of local symbols recorded in the .dynsym section's sh_info field.
gold/
* layout.cc (Layout::finalize): Track count of forced-local symbols
in .dynsym.
(Layout::create_symtab_sections): Add local_dynamic_count parameter;
use that instead of sh_info value.
(Layout::create_dynamic_symtab): Add pforced_local_dynamic_count
parameter; pass it to Symtab::set_dynsym_indexes(). Include forced
locals in sh_info value. Pass index of first real global to
Dynobj::create_gnu_hash_table() and Dynobj::create_elf_hash_table().
* layout.h (Layout::create_symtab_sections): Add local_dynamic_count
parameter.
(Layout::create_dynamic_symtab): Add pforced_local_dynamic_count
parameter.
* symtab.cc (Symbol_table::set_dynsym_indexes): Add pforced_local_count
parameter. Process forced-local symbols first and return the count.
(Symbol_table::finalize): Update comments.
* symtab.h (Symbol_table::set_dynsym_indexes): Add pforced_local_count
parameter.
(Symbol_table::first_dynamic_global_index_): Update comment.
(Symbol_table::dynamic_count_): Update comment.
* testsuite/Makefile.am (ifuncmod1.sh): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/ifuncmod1.sh: New shell script.
When creating a predefined hidden symbol like _GLOBAL_OFFSET_TABLE_, gold
was incorrectly letting a version script add a version to the symbol,
resulting in two copies of the symbol, both STB_LOCAL, but one of which
was grouped in the globals part of the symbol table.
gold/
* symtab.cc (Symbol_table::define_special_symbol): Add is_forced_local
parameter; if set, do not check version script.
(Symbol_table::do_define_in_output_data): Pass is_forced_local for
STB_LOCAL predefined symbols.
(Symbol_table::do_define_in_output_segment): Likewise.
(Symbol_table::do_define_in_output_segment): Likewise.
(Symbol_table::do_define_as_constant): Likewise.
* symtab.h (Symbol_table::define_special_symbol): Add is_forced_local
parameter. Adjust all callers.
* testsuite/Makefile.am (ver_test_8.sh): New test case.
* testsuite/Makefile.in: Regenerate.
* ver_test_8.sh: New test script.
Linker-created symbols like __ehdr_start, __etext, __edata, and end
should be relocatable, not absolute.
gold/
* output.cc (Output_segment::first_section): Return NULL if there are
no sections in the segment.
* output.h (Output_segment::first_section_load_address): Assert that
first section is not NULL.
* symtab.cc (Symbol_table::sized_write_globals): Attach linker-created
segment-relative symbols to first section of the segment.
gas/
* doc/c-lm32.texi: Fix chars with high bit set.
* testsuite/gas/bfin/vector2.s: Likewise.
gold/
* arm.cc: Fix comment chars with high bit set.
include/
* coff/pe.h: Fix comment chars with high bit set.
* opcode/xgate.h: Likewise.
ld/
* testsuite/ld-scripts/sysroot-prefix.exp: Fix chars with high bit set.
If the .bss section has other data in it besides common allocations,
gold was subtracting the wrong section start address from the symbol
value.
gold/
PR gold/20976
* symtab.cc (Symbol_table::sized_write_globals): Use address of
output section, not input section.
* testsuite/Makefile.am (pr20976): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/pr20976.c: New source file.
gold/
PR gold/20749
* options.h (--orphan-handling): New option.
(General_options::Orphan_handling): New enum.
(General_options::orphan_handling_enum): New method.
(General_options::set_orphan_handling_enum): New method.
(General_options::orphan_handling_enum_): New data member.
* options.cc (General_options::General_options): Initialize new member.
(General_options::finalize): Convert --orphan-handling argument to enum.
* script-sections.cc (Script_sections::output_section_name): Check it.
There were still some cases I found where orphan section placement
was screwy -- where the script has no output section description for
either .data or .bss, a .bss orphan section ends up getting placed
before the .data section. In addition, if there is an output section
description for a data section not named .data (e.g., .rela.dyn),
the orphan .bss gets placed before it. This patch cleans that up,
by tracking the last allocated section even as we're adding orphans.
I've also improved segment layout in the absence of a PHDRS clause.
A zero-length NOBITS section will no longer force a new segment
when followed by a PROGBITS section.
2016-12-12 Cary Coutant <ccoutant@gmail.com>
gold/
* script-sections.cc (Orphan_section_placement::update_last_alloc):
New method.
(Orphan_section_placement::find_place): Place orphan .data section
after either RODATA or TEXT.
(Script_sections::place_orphan): Call update_last_alloc for allocated
sections.
(Script_sections::create_segments): Improve handling of BSS.
PowerPC64 aligns .got to a 256 byte boundary. This tends to bump the
data segment file size.
PR gold/16711
* testsuite/script_test_15a.sh: Allows larger p_filesz.
* testsuite/script_test_15b.sh: Likewise.
* testsuite/script_test_15c.sh: Likewise.
Since the linker created .TOC. symbol is placed at roughly .got+32k,
.toc input sections must be placed in or after .got if .toc entries
are accessed using 16-bit signed offset relocs. crt1.o contains such
a relocation.
PR gold/20717
* testsuite/pr20717.t: Add .got output section containing .toc.
2016-12-01 Cary Coutant <ccoutant@gmail.com>
Igor Kudrin <ikudrin@accesssoftek.com>
PR gold/20717
* script-sections.cc (Script_sections): Set *keep to false when
no match.
2016-12-11 Igor Kudrin <ikudrin@accesssoftek.com>
PR gold/20717
* testsuite/Makefile.am (pr20717): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/pr20717.c: New test source file.
* testsuite/pr20717.sh: New test script.
* testsuite/pr20717.t: New test linker script.
PR 16711 noted that gold allocates file space for BSS sections when using
a linker script. I've fixed that by rewriting set_section_addresses and
set_section_list_addresses to track the file offset separate from the
current virtual address, so that BSS sections do not move the file offset.
Now, if a series of BSS sections come at the end of a segment, we do not
allocate file space; but if a script forces them into the middle of a
segment, we will still allocate file space (matching Gnu ld behavior).
I've also added a warning when that happens.
That exposed another problem where orphan .bss sections were sometimes
placed in the middle of a segment. For example, if the script mentions
the .got section, but both .data and .bss are orphans, gold would put
both .data and .bss in front of .got. I've fixed that by ensuring that
orphan BSS sections are always placed after all other allocated sections.
It also exposed a problem where the SUBALIGN property is not handled
properly. The ld manual clearly states that it should override input section
alignment, whether greater or less than the given alignment, but gold would
only increase an input section's alignment. Gold would also place the output
section based on its original alignment before the SUBALIGN property took
effect, leading to a misaligned output section (where the input section
was properly aligned in memory, but was not aligned relative to the start
of the section), in violation of the ELF/gABI spec. I've fixed that by
making sure that the SUBALIGN property overrides the internal alignment of
the input sections as well as the external alignment of the output section.
This affected the behavior of script_test_2, which was written to expect
a misaligned section.
The net effect is, I think, improved compatibility with the BFD linker.
There are still cases where orphan placement differs, but the differences
should be rarer and less important. ALIGN and SUBALIGN behavior is closer,
but still not an exact match -- I still found cases where ld would create
a misaligned output section, and where gold will properly align it.
gold/
PR gold/16711
* output.cc (Output_section::set_final_data_size): Calculate data size
based on relative offset rather than file offset.
(Output_segment::set_section_addresses): Track file offset separately
from address offset.
(Output_segment::set_section_list_addresses): Add pfoff parameter.
Track file offset separately. Don't move file offset for BSS
sections.
* output.h (Output_segment::set_section_list_addresses): Add pfoff
parameter.
* script-sections.cc (Orphan_section_placement): Add PLACE_LAST_ALLOC.
(Orphan_section_placement::Orphan_section_placement): Initialize it.
(Orphan_section_placement::output_section_init): Track last allocated
section.
(Orphan_section_placement::find_place): Place BSS after last allocated
section.
(Output_section_element_input::set_section_addresses): Always override
input section alignment when SUBALIGN is specified.
(Output_section_definition::set_section_addresses): Override alignment
of output section when SUBALIGN is specified.
* testsuite/Makefile.am (script_test_15a, script_test_15b)
(script_test_15c): New test cases.
* testsuite/Makefile.in: Regenerate.
* testsuite/script_test_2.cc: Adjust expected layout.
* testsuite/script_test_15.c: New source file.
* testsuite/script_test_15a.sh: New shell script.
* testsuite/script_test_15a.t: New linker script.
* testsuite/script_test_15b.sh: New shell script.
* testsuite/script_test_15b.t: New linker script.
* testsuite/script_test_15c.sh: New shell script.
* testsuite/script_test_15c.t: New linker script.
A branch in a non-exec section that needs a stub can lead to this
assertion.
* powerpc.cc (Powerpc_relobj::stub_table): Return NULL rather
then asserting.
Adds a new option, defaulting to off, that allows a group of stubs to
serve multiple output sections. Prior to this patch powerpc gold
allowed this unconditionally, which is a little unsafe with clever
code that discards/reuses sections at runtime.
* options.h (--stub-group-multi): New PowerPC option.
* powerpc.cc (Stub_control): Add multi_os_ var and param
to constructor. Sort start_ var later. Comment State.
(Stub_control::can_add_to_stub_group): Heed multi_os_.
(Target_powerpc::group_sections): Update.
Gold attaches stubs to an existing section in contrast to ld.bfd which
inserts a new section for stubs. If we want stubs before branches,
then the stubs must be added to the previous section. Adding to the
previous section is a disaster if there is a large gap between the
previous section and the group.
PR gold/20878
* powerpc.cc (Stub_control): Replace stubs_always_before_branch_
with stubs_always_after_branch_, group_end_addr_ with
group_start_addr_.
(Stub_control::can_add_to_stub_group): Rewrite to suit scanning
sections by increasing address.
(Target_powerpc::group_sections): Scan that way. Delete corner
case.
* options.h (--stub-group-size): Update help string.
Some more debug output, and a little hardening.
* powerpc.cc (Stub_table_owner): Provide constructor.
(Powerpc_relobj::set_stub_table): Resize fill with -1.
(Target_powerpc::Branch_info::make_stub): Provide target debug
output on returning false.
If the default starting address is less than the new ABI page size,
we end up misaligning the file header, causing an internal error.
gold/
PR gold/20834
* target.h (Target::default_text_segment_address): Bump default
start address up to ABI page size.
gold/
PR gold/18989
* options.cc (General_options::object_format_to_string): New function.
(General_options::copy_from_posdep_options): New function.
(General_options::parse_push_state): New function.
(General_options::parse_pop_state): New function.
* options.h (--push-state, --pop-state): New options.
(General_options::object_format_to_string): New method.
(General_options::set_incremental_disposition): New method.
(General_options::copy_from_posdep_options): New method.
(General_options::options_stack_): New data member.
gold/
PR gold/20346
* options.cc (One_option::print): Print "(default)" when appropriate.
* options.h: Clean up and re-sort options.
(One_option::is_default): New data member.
(One_option::One_option): Add is_default parameter; adjust all calls.
(DEFINE_var): Add is_default__ parameter; adjust all calls.
(DEFINE_bool): Set is_default based on default_value__.
(DEFINE_bool_ignore): New macro.
(--no-eh-frame-hdr): New option.
(--enable-new-dtags): Remove mention of DT_FLAGS.
2016-11-21 Igor Kudrin <ikudrin@accesssoftek.com>
gold/
* layout.cc: Include windows.h and rpcdce.h (for MinGW32).
(Layout::create_build_id): Generate uuid using UuidCreate().
This fix keeps the section with the highest alignment when folding sections with ICF.
PR gold/17704
* icf.cc (match_sections): Add new parameter section_addraligns.
Check section alignment and keep the section with the strictest
alignment.
(find_identical_sections): New local variable section_addraligns.
Store each section's alignment.
* testsuite/pr17704a_test.s: New file.
* testsuite/Makefile.am (pr17704a_test): New test.
* testsuite/Makefile.in: Regenerate.
When we see an unversioned symbol reference in a shared library, followed
by a default definition of the symbol in another shared library, we were
treating them as separate symbols. That should only happen when both are
definitions.
gold/
PR gold/20238
* symtab.cc (Symbol_table::define_default_version): Check that
unversioned symbol is defined.
This patch adds a little more debug output, and replaces two variables
with one, tracking current max group size by group_size_ rather than
by has14_.
* powerpc.cc (class Stub_control): Delete stub14_group_size_
and has14_. Add group_size_.
(Stub_control::can_add_to_stub_group): Adjust to suit. Print
debug info when switching to adding sections before stubs.
This patch rewrites the rather obscure can_add_to_stub_group, fixing
a problem with the handling of sections containing conditional
external branches. When a section group contains any such section,
the group size needs to be limited to a much smaller size than groups
with only non-conditional external branches.
PR 20523
* powerpc.cc (class Stub_control): Add has14_. Comment owner_.
(Stub_control::can_add_to_stub_group): Correct grouping of
sections containing 14-bit external branches. When returning
false, set state_ to reflect the fact that we have one section
for the next group. Rewrite most of function for clarity.
Add and expand comments.
(Target_powerpc::do_relax): Print stub group size retry in hex.
gold/ChangeLog
2016-08-26 Han Shen <shenhan@google.com>
* powerpc.cc (Stub_table::min_size_threshold_): New member to
limit size.
(Stub_table::set_min_size_threshold): New member function.
(Stub_table::set_address_and_size): Add code to only allow size
increase.
(Target_powerpc::do_relax): Add code to record last size.
Build the test objects with the in-tree assembler. Also fix some cascading
error messages caused by not resetting the skip_call_tls_get_addr_ flag
after printing the error.
gold/
* i386.cc (Target_i386): Reset skip_call_tls_get_addr_ after printing
error message.
* testsuite/Makefile.am (pr20216a): Add missing dependencies.
(pr20308a): Add -Bgcctestdir/ to compile rules.
* testsuite/Makefile.in: Regenerate.
With some versions of gas, the call to tls_get_addr uses a GOTPCREL
relocation instead of a GOTPCRELX relocation. We should allow for that
when skip_call_tls_get_addr_ is true. We should also build the test
objects with the in-tree assembler.
This patch also fixes some cascading error messages caused by not
resetting the skip_call_tls_get_addr_ flag after printing the error.
gold/
PR gold/20216
* x86_64.cc (Target_x86_64::Relocate::relocate): Add check for
R_X86_64_GOTPCREL. Reset skip_call_tls_get_addr_ after printing
error message.
* testsuite/Makefile.am (pr20216_gd.o): Add -Bgcctestdir/.
(pr20216_ld.o): Likewise.
* testsuite/Makefile.in: Regenerate.
2016-08-10 James Clarke <jrtc27@jrtc27.com>
gold/
PR gold/20443
* symtab.cc (Symbol_table::add_from_relobj): Handle NULL symbols,
which will be present for STT_SPARC_REGISTER.
(Symbol_table::add_from_pluginobj): Likewise.
(Symbol_table::add_from_dynobj): Likewise.
(Symbol_table::add_from_incrobj): Removed dead code.
The fall-through in Target_sparc::Relocate::relocate for
R_SPARC_GOTDATA_OP_LOX10 is currently R_SPARC_GOT13, but should
clearly be R_SPARC_GOT10. GCC has been seen to emit a sethi/xor
rather than a sethi/or sequence to load a 32-bit immediate, but
if R_SPARC_GOT13 is used then bits 10-12 get zeroed out as both
the sethi and xor immediates contain them.
gold/
PR gold/20442
* sparc.cc (Target_sparc::Relocate::relocate): R_SPARC_GOTDATA_OP_LOX10
should fall back on R_SPARC_GOT10, not R_SPARC_GOT13.
This CL implemented the following relocs for AArch64 target.
- R_AARCH64_MOVW_UABS_G*
- R_AARCH64_MOVW_SABS_G* relocations
gold/ChangeLog
2016-07-26 Igor Kudrin <ikudrin@accesssoftek.com>
* aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
(rvalue_bit_select): Use Rvalue_bit_select_impl.
* aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC,
MOVW_UABS_G1,
MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
* aarch64.cc (Target_aarch64::Scan::local): Add cases for new
MOVW_UABS_* and MOVW_SABS_* relocations.
(Target_aarch64::Scan::global): Likewise.
(Target_aarch64::Relocate::relocate): Add cases and handlings
for new MOVW_UABS_* and MOVW_SABS_* relocations.
* testsuite/Makefile.am (aarch64_relocs): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/aarch64_globals.s: New test source file.
* testsuite/aarch64_relocs.s: Likewise.
* testsuite/aarch64_relocs.sh: New test script.
With GCC 6 when not using -static-libstdc++, the operator delete(void*)
function is defined in the shared C++ support library, rather than in
the main program. The test script is too aggressive in checking for
this symbol's presence among the exported symbols. This patch removes
the check for that symbol.
gold/
PR gold/20310
* testsuite/dynamic_list.sh: Remove check for _ZdlPv.
There are extensions to 386 psABI:
https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs
to call tls_get_addr via GOT:
call *___tls_get_addr@GOT(%reg)
where EBX register isn't required as GOT base.
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, 7-byte lea instruction before call
instruction is replaced by 6-byte one to make room for indirect call.
For local dynamic model, we simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition,
we generate a 6-byte lea instruction as nop, instead of a 1-byte nop
plus a 4-byte lea instruction.
PR gold/20308
* i386.cc (Target_i386::Relocate::relocate): Allow
R_386_GOT32X relocation against ___tls_get_addr.
(Target_i386::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_i386::Relocate::tls_gd_to_le): Likewise.
(Target_i386::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20308a_test,
pr20308b_test, pr20308c_test, pr20308d_test, pr20308e_test.
(pr20308a_test_SOURCES): New.
(pr20308a_test_DEPENDENCIES): Likewise.
(pr20308a_test_CFLAGS): Likewise.
(pr20308a_test_LDFLAGS): Likewise.
(pr20308a_test_LDADD): Likewise.
(pr20308b_test_SOURCES): Likewise.
(pr20308b_test_DEPENDENCIES): Likewise.
(pr20308b_test_CFLAGS): Likewise.
(pr20308b_test_LDFLAGS): Likewise.
(pr20308b_test_LDADD): Likewise.
(pr20308c_test_SOURCES): Likewise.
(pr20308c_test_DEPENDENCIES): Likewise.
(pr20308c_test_CFLAGS): Likewise.
(pr20308c_test_LDFLAGS): Likewise.
(pr20308c_test_LDADD): Likewise.
(pr20308d_test_SOURCES): Likewise.
(pr20308d_test_DEPENDENCIES): Likewise.
(pr20308d_test_CFLAGS): Likewise.
(pr20308d_test_LDFLAGS): Likewise.
(pr20308d_test_LDADD): Likewise.
(pr20308e_test_SOURCES): Likewise.
(pr20308e_test_DEPENDENCIES): Likewise.
(pr20308e_test_CFLAGS): Likewise.
(pr20308e_test_LDFLAGS): Likewise.
(pr20308e_test_LDADD): Likewise.
(pr20308a.so): Likewise.
(pr20308b.so): Likewise.
(pr20308_gd.o): Likewise.
(pr20308_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20308a.so pr20308b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20308_def.c: New file.
* testsuite/pr20308_gd.S: Likewise.
* testsuite/pr20308_ld.S: Likewise.
* testsuite/pr20308_main.c: Likewise.
There are extensions to x86-64 psABI:
https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI
to call tls_get_addr via GOT:
call *__tls_get_addr@GOTPCREL(%rip)
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call. For local dynamic model, we
simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition, we
generate 4 0x66 prefixes, instead of 3, before mov instruction in 64-bit
and generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit.
PR gold/20216
* configure.ac (DEFAULT_TARGET_X86_64_OR_X32): New
AM_CONDITIONAL.
* configure: Regenerated.
* x86_64.cc (Target_x86_64<size>::Relocate::relocate): Allow
R_X86_64_GOTPCRELX relocation against __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_le): Likewise.
(Target_x86_64<size>::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20216a_test,
pr20216b_test, pr20216c_test, pr20216d_test, pr20216e_test.
(pr20216a_test_SOURCES): New.
(pr20216a_test_DEPENDENCIES): Likewise.
(pr20216a_test_CFLAGS): Likewise.
(pr20216a_test_LDFLAGS): Likewise.
(pr20216a_test_LDADD): Likewise.
(pr20216b_test_SOURCES): Likewise.
(pr20216b_test_DEPENDENCIES): Likewise.
(pr20216b_test_CFLAGS): Likewise.
(pr20216b_test_LDFLAGS): Likewise.
(pr20216b_test_LDADD): Likewise.
(pr20216c_test_SOURCES): Likewise.
(pr20216c_test_DEPENDENCIES): Likewise.
(pr20216c_test_CFLAGS): Likewise.
(pr20216c_test_LDFLAGS): Likewise.
(pr20216c_test_LDADD): Likewise.
(pr20216d_test_SOURCES): Likewise.
(pr20216d_test_DEPENDENCIES): Likewise.
(pr20216d_test_CFLAGS): Likewise.
(pr20216d_test_LDFLAGS): Likewise.
(pr20216d_test_LDADD): Likewise.
(pr20216e_test_SOURCES): Likewise.
(pr20216e_test_DEPENDENCIES): Likewise.
(pr20216e_test_CFLAGS): Likewise.
(pr20216e_test_LDFLAGS): Likewise.
(pr20216e_test_LDADD): Likewise.
(pr20216a.so): Likewise.
(pr20216b.so): Likewise.
(pr20216_gd.o): Likewise.
(pr20216_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20216a.so pr20216b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20216_def.c: New file.
* testsuite/pr20216_gd.S: Likewise.
* testsuite/pr20216_ld.S: Likewise.
* testsuite/pr20216_main.c: Likewise.
PowerPC gcc aligns char arrays to a word which results in the test
failing since it expects a char alignment. As the test already uses
gcc attributes to assign variables to sections, we may as well use an
attribute to align too.
* testsuite/plugin_layout_with_alignment.c: Explicitly align all
variables.
A target like powerpc64 that is PIC by default doesn't need copy relocs.
* testsuite/Makefile.am (copy_test_protected): Disable for powerpc.
* testsuite/Makefile.in: Regenerate.
According to "ELF for the ARM(r) 64-bit Architecture (AArch64)",
this relocation can be used "to prevent removal of sections that
might otherwise appear to be unused."
gold/
* aarch64-reloc.def (NONE): New relocation.
* aarch64.cc (Target_aarch64::Scan::local): Handle R_AARCH64_NONE.
(Target_aarch64::Scan::global): Likewise.
* testsuite/Makefile.am (aarch64_reloc_none): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/aarch64_reloc_none.s: New test source file.
* testsuite/aarch64_reloc_none.sh: New test script.
Please see patch discussion:
https://www.sourceware.org/ml/binutils/2016-05/msg00322.html
2016-06-28 Sriraman Tallam <tmsriram@google.com>
* x86_64.cc (Lazy_view): New class.
(can_convert_mov_to_lea): Templatize function. Make the function
check for appropriate relocation types and use the view parameter
to get section contents.
(can_convert_callq_to_direct): New function.
(Target_x86_64<size>::Scan::global): Refactor.
(Target_x86_64<size>::Relocate::relocate): Refactor. Change any indirect
call via GOT that can be converted.
* testsuite/Makefile.am (x86_64_indirect_call_to_direct.sh): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/x86_64_indirect_call_to_direct1.s: New file.
* testsuite/x86_64_indirect_jump_to_direct1.s: New file.
bfd * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert
R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64.
gold * sparc.cc (Target_sparc::Scan::local): Don't convert R_SPARC_32
to R_SPARC_RELATIVE if class is ELFCLASS64.
(Target_sparc::Scan::global): Likewise.
ld * testsuite/ld-elf/symbolic-func.r: Allow non-zero offsets from
.text.
The fix for PR 15370 did not correctly check all patterns in a group,
but instead threw all unassigned sections into the group. This patch
fixes that.
2016-06-23 Cary Coutant <ccoutant@gmail.com>
Igor Kudrin <ikudrin@accesssoftek.com>
gold/
PR gold/15370
* script-sections.cc
(Output_section_element_input::set_section_addresses): Keep bin_count
separate from input_pattern_count.
* testsuite/script_test_12.t: Add another section .x4.
* testsuite/script_test_12i.t: Likewise.
* testsuite/script_test_12a.c: Likewise.
* testsuite/script_test_12b.c: Likewise.
Add a configure option --enable-relro to decide whether -z relro should
be enabled by default. Default to yes.
PR ld/20283
* NEWS: Mention --enable-relro.
* configure.ac: Add --enable-relro.
(DEFAULT_LD_Z_RELRO): New. Set by --enable-relro and default
to 1.
* config.in: Regenerated.
* configure: Likewise.
* options.h (General_options::relro): Default to
DEFAULT_LD_Z_RELRO.
If there is no PLT in output, return 0 for first_plt_entry_offset and
plt_entry_size.
PR gold/20245
* i386.cc (Target_i386::first_plt_entry_offset): Return 0 if
plt_ is NULL.
(Target_i386::plt_entry_size): Likewise.
(Target_x86_64<size>::first_plt_entry_offset): Likewise.
(Target_x86_64<size>::plt_entry_size): Likewise.
Includes DT_MIPS_RLD_MAP and DT_MIPS_RLD_MAP_REL dynamic tags and
__RLD_MAP symbol.
2016-06-20 Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com>
elfcpp/
* elfcpp.h (DT_MIPS_RLD_MAP_REL): New enum constant.
gold/
* mips.cc (Target_mips::Target_mips): Initialize rld_map_.
(Target_mips::rld_map_): New data member.
(Target_mips::do_finalize_sections): Add support for
DT_MIPS_RLD_MAP and DT_MIPS_RLD_MAP_REL dynamic tags,
.rld_map section, and __RLD_MAP symbol.
(Target_mips::do_dynamic_tag_custom_value): Add support for
DT_MIPS_RLD_MAP_REL dynamic tag.
* output.cc (Output_data_dynamic::get_entry_offset): New method
definition.
* output.h (Output_data_dynamic::get_entry_offset): New method
declaration.
elfcpp/
* mips.h (R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3,
R_MIPS_PC19_S2, R_MIPS_PCHI16, R_MIPS_PCLO16): New enums for
Mips32r6 and Mips64r6 relocations.
(r6_isa): New function.
gold/
* mips.cc (relocation_needs_la25_stub): Add support for relocs:
R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
(hi16_reloc): Add support for R_MIPS_PCHI16 relocation.
(is_matching_lo16_reloc): Likewise.
(lo16_reloc): Add support for R_MIPS_PCLO16 relocation.
(Mips_output_data_plt::plt_entry_r6): New static data member for
R6 PLT entry.
(Target_mips::is_output_r6): New method.
(Target_mips::Mips_mach): Add new enum constants.
(Mips_relocate_functions::Status): Likewise.
(Mips_relocate_functions::pchi16_relocs): New static data member.
(Mips_relocate_functions::relpc21): New method.
(Mips_relocate_functions::relpc26): Likewise.
(Mips_relocate_functions::relpc18): Likewise.
(Mips_relocate_functions::relpc19): Likewise.
(Mips_relocate_functions::relpchi16): Likewise.
(Mips_relocate_functions::do_relpchi16): Likewise.
(Mips_relocate_functions::relpclo16): Likewise.
(Mips_output_data_plt::do_write): Add support for Mips r6 plt
entry.
(Target_mips::mips_32bit_flags): Add E_MIPS_ARCH_32R6 support.
(Target_mips::elf_mips_mach): Add E_MIPS_ARCH_32R6 and
E_MIPS_ARCH_64R6 support.
(Target_mips::update_abiflags_isa): Likewise.
(mips_get_size_for_reloc): Add support for relocs: R_MIPS_PCHI16,
R_MIPS_PCLO16, R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3 and
R_MIPS_PC19_S2.
(Target_mips::Scan::local): Add support for relocs: R_MIPS_PCHI16
and R_MIPS_PCLO16.
(Target_mips::Scan::global): Add support for relocs:
R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
(Target_mips::Relocate::relocate): Call functions for resolving
Mips32r6 and Mips64r6 relocations, and print error message for
STATUS_PCREL_UNALIGNED.
(Target_mips::Scan::get_reference_flags): Add support for relocs:
R_MIPS_PCHI16, R_MIPS_PCLO16, R_MIPS_PC21_S2, R_MIPS_PC26_S2,
R_MIPS_PC18_S3 and R_MIPS_PC19_S2.
(Target_mips::elf_mips_mach_name): Add E_MIPS_ARCH_32R6 and
E_MIPS_ARCH_64R6 support.
The .got.plt section must be placed right after the .got section.
Otherwise, GOT offset will be wrong.
PR gold/20246
* testsuite/script_test_2.t: Add .got.plt after .got.
gold/
* mips.cc (Mips_relobj::Mips_relobj): Initialize
has_reginfo_section_.
(Mips_relobj::has_reginfo_section_): New data member.
(Mips_relobj::has_reginfo_section): New method.
(class Mips_output_section_reginfo): Change base class to
Output_section_data, and set masks of the output .reginfo section
in constructor.
(Mips_output_section_reginfo::as_mips_output_section_reginfo):
Remove.
(Mips_output_section_reginfo::set_masks): Likewise.
(Mips_output_section_reginfo::set_final_data_size): Likewise.
(Mips_output_section_reginfo::do_print_to_mapfile): New method.
(Target_mips::do_make_output_section): Remove.
(Mips_relobj::do_read_symbols): Set has_reginfo_section_ to true
if the object contains a .reginfo section.
(Target_mips::do_finalize_sections): Create a .reginfo output
section if needed.
* mips.cc (Mips_got_entry::Mips_got_entry): Remove object argument
for global got symbols, and set addend to 0.
(Mips_got_entry::hash): Change hash algorithm.
(Mips_got_entry::equals): Refactor.
(Mips_got_entry::object): Return input object for local got symbols
from union d.
(Mips_got_entry::addend): Change return of the relocation addend.
(Mips_got_entry::addend_): Move from union d.
(Mips_got_entry::object_): Move into union d.
(class Mips_symbol_hash): New class.
(Mips_got_info::Global_got_entry_set): New type.
(Mips_got_info::global_got_symbols): Change return type to
Global_got_entry_set.
(Mips_got_info::global_got_symbols_): Change type to
Global_got_entry_set.
(Mips_symbol::hash): New method.
(Mips_output_data_la25_stub::symbols_): Change type to std::vector.
(Mips_output_data_mips_stubs::Mips_stubs_entry_set): New type.
(Mips_output_data_mips_stubs::symbols_): Change type to
Mips_stubs_entry_set.
(Mips_got_info::record_global_got_symbol): Don't pass object
argument when creating global got symbol.
(Mips_got_info::record_got_entry): Remove find before inserting
got entries.
(Mips_got_info::add_reloc_only_entries): Change type of iterator
to Global_got_entry_set.
(Mips_got_info::count_got_symbols): Likewise.
(Mips_output_data_la25_stub::create_la25_stub): Use push_back
for adding entries to symbols_.
(Mips_output_data_la25_stub::do_write): Change type of iterator
to std::vector.
(Mips_output_data_mips_stubs::set_lazy_stub_offsets): Change type
of iterator to Mips_stubs_entry_set.
(Mips_output_data_mips_stubs::set_needs_dynsym_value): Likewise.
(Mips_output_data_mips_stubs::do_write): Likewise.
In PR 16979, a reference to malloc is being resolved to an unversioned
reference in libmalloc.so. When linked with --as-needed, however, the
dynamic table does not list libmalloc.so as a DT_NEEDED library.
If we have a reference to an unversioned symbol in a shared object,
and we later see a versioned definition in another shared object, we
were overriding the first definition with the second in the process of
defining the default version. As a result, we no longer think that the
first shared object was actually needed to resolve any symbols, and we
don't list it as a DT_NEEDED library.
This patch fixes the problem by treating the two definitions as separate
symbols, so the second definition does not override the first.
2016-03-30 Cary Coutant <ccoutant@gmail.com>
gold/
PR gold/16979
* symtab.cc (Symbol_table::define_default_version): Check for case
where symbols are both in different shared objects.
bfd * warning.m4 (GCC_WARN_CFLAGS): Only add -Wstack-usage if using a
sufficiently recent version of GCC.
* configure: Regenerate.
others * configure: Regenerate.
During LTO, if (1) an IR file contains a COMDAT group that is kept,
(2) a later non-claimed file contains the same group, which we discard,
and (3) the plugin fails to provide a definition of the symbols in that
COMDAT group, gold silently resolves any references to those symbols
to 0.
This patch adds a check for a placeholder symbol when deciding
whether to issue an undefined symbol error. It also adds an extra
note after any undefined placeholder symbol error that explains
that a definition was expected from the plugin.
gold/
PR gold/19842
* errors.cc (Errors::undefined_symbol): Add info message when
symbol should have been provided by a plugin.
* target-reloc.h (issue_undefined_symbol_error): Check for
placeholder symbols defined in discarded sections.
* testsuite/Makefile.am (plugin_test_9b): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/plugin_test_9b_elf.cc: New test source file.
* testsuite/plugin_test_9b_ir.cc: New test source file.
When running ld -r on objects that have comdat groups, when gold
deduplicates a function in a comdat group, it removes the relocations
from the EH information that referred to the dropped copy of the function.
When running a final link using the result of the -r link, the missing
relocation cause it to fail to recognize the FDE for the dropped
function.
This patch improves gold's FDE scanning to take into account the
possibility that an FDE corresponds to a dropped function, and drops
that FDE as well.
Gnu ld, on the other hand, leaves the relocations in the ld -r output,
but makes them R_NONE with an r_sym field of 0. This was sufficient to
let both linkers recognize the FDE properly.
With this fix, if you do an ld -r with gold, then do the final link with
Gnu ld, the .eh_frame_hdr section will not be generated. To make it work
with Gnu ld, we would have to leave the R_NONE relocations in, but I
think it's better to drop the relocations entirely. I'd hope that if
you're doing a -r link with gold, you'll also do the final link with
gold.
gold/
PR gold/19002
* ehframe.cc (Eh_frame::read_fde): Check for dropped functions.
* testsuite/Makefile.am (eh_test_2): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/eh_test_2.sh: New test script.
* testsuite/eh_test_a.cc (bar): Make it comdat.
* testsuite/eh_test_b.cc (bar): Add a duplicate copy.
gold/
* mips.cc (enum Special_relocation_symbol): New enum type.
(is_readonly_section): New function.
(eh_reloc): Likewise.
(Mips_got_entry::is_section_symbol_): New member.
(Mips_got_entry::is_section_symbol): New method.
(Mips_got_info::record_local_got_symbol): Add is_section_symbol
argument.
(Mips_relobj::mips_elf_options_section_name): New method.
(Mips_output_data_got::record_local_got_symbol): Add
is_section_symbol argument, and pass it to
Mips_got_info::record_local_got_symbol.
(Mips_output_data_got::got_offset): Add addend argument, and pass
it to Relobj::local_got_offset.
(struct Mips_output_reloc_writer): New type.
(class Mips_output_data_reloc): New class.
(Mips_output_data_plt::Reloc_section): Change type to
Mips_output_data_reloc.
(Target_mips::Reloc_section): Likewise.
(Mips_reloc_types::get_r_addend): Remove unsigned from return type.
(Mips_classify_reloc::get_r_type2): New method.
(Mips_classify_reloc::get_r_type3): Likewise.
(Mips_classify_reloc::get_r_ssym): Likewise.
(Target_mips::Reloca_section): Remove.
(Relocate::should_apply_static_reloc): Rename from
should_apply_r_mips_32_reloc.
(Target_mips::copy_reloc): Replace Reltype parameter with r_type
and r_offset.
(Mips_relocate_functions::Valtype): New type.
(Mips_relocate_functions::Valtype64): New type.
(Mips_relocate_functions::check_overflow): New method.
(Mips_relocate_functions::mips_reloc_unshuffle): Move to public
interface.
(Mips_relocate_functions::mips_reloc_shuffle): Likewise.
(Mips_relocate_functions::rel16): Add support for resolving
relocations for Mips64.
(Mips_relocate_functions::rel32): Likewise.
(Mips_relocate_functions::reljalr): Likewise.
(Mips_relocate_functions::relpc32): Likewise.
(Mips_relocate_functions::rel26): Likewise.
(Mips_relocate_functions::relpc16): Likewise.
(Mips_relocate_functions::relmicromips_pc7_s1): Likewise.
(Mips_relocate_functions::relmicromips_pc10_s1): Likewise.
(Mips_relocate_functions::relmicromips_pc16_s1): Likewise.
(Mips_relocate_functions::do_relhi16): Likewise.
(Mips_relocate_functions::do_relgot16_local): Likewise.
(Mips_relocate_functions::rello16): Likewise.
(Mips_relocate_functions::relgot): Likewise.
(Mips_relocate_functions::relgotpage): Likewise.
(Mips_relocate_functions::relgotofst): Likewise.
(Mips_relocate_functions::relgot_hi16): Likewise.
(Mips_relocate_functions::relgot_lo16): Likewise.
(Mips_relocate_functions::relgprel): Likewise.
(Mips_relocate_functions::relgprel32): Likewise.
(Mips_relocate_functions::tlsrelhi16): Likewise.
(Mips_relocate_functions::tlsrello16): Likewise.
(Mips_relocate_functions::tlsrel32): Likewise.
(Mips_relocate_functions::relsub): Likewise.
(Mips_relocate_functions::releh): New method.
(Mips_relocate_functions::rel64): Likewise.
(Mips_got_info::record_local_got_symbol): Add is_section_symbol and
pass it to Mips_got_entry.
(Mips_got_info::add_local_entries): Pass addend argument
to code functions, and for STT_SECTION symbols call
add_symbolless_local_addend.
(Mips_got_info::add_tls_entries): Pass addend argument to code
functions.
(Mips_relobj::do_read_symbols): Read gp value that was used to
create object.
(Mips_output_data_plt::plt_entry): Remove opcode from l[wd]
instruction. Opcode for instruction will be selected later.
(Target_mips::gc_process_relocs): Add case for SHT_RELA.
(Target_mips::scan_relocatable_relocs): Likewise.
(Target_mips::emit_relocs_scan): Likewise.
(Target_mips::relocate_relocs): Likewise.
(Target_mips::do_finalize_sections): Skip objects for merging
processor specific flags in which all input sections will be
discarded.
(mips_get_size_for_reloc): Add case for R_MIPS_EH.
(Target_mips::Scan::get_reference_flags): Likewise.
(Target_mips::relocate_special_relocatable): Call rel26 method with
calculate_only and calculated_value arguments.
(Target_mips::Scan::local): Add case for R_MIPS_EH. Don't create a
dynamic relocation against a readonly sections, and pass
is_section_symbol to Mips_got_info::record_local_got_symbol.
(Target_mips::Scan::global): Add case for R_MIPS_EH. Don't create a
dynamic relocation against a readonly sections, and pass r_type
and r_offset to Target_mips::copy_reloc.
(Target_mips::Relocate::relocate): Add support for resolving
relocations for Mips64.
(Target_mips::mips_info): Add case for Mips64 default dynamic
linker name.
(Target_selector_mips): Correct emulation names.
G++ in GCC 4.2 silently ignores
---
__attribute__ ((section(".rodata.v1_a2")))
const short rodata_item1 = 101;
---
which leads to plugin_layout_with_alignment test failure with
Expected 12 sections, found 8 sections
since 4 .rodata sections are missing. As a workaround, this patch
changes plugin_layout_with_alignment test from C++ to C.
* testsuite/plugin_layout_with_alignment.cc: Renamed to ..
* testsuite/plugin_layout_with_alignment.c: This.
* testsuite/Makefile.am (plugin_layout_with_alignment.o): Updated.
(plugin_layout_with_alignment): Likewise.
* testsuite/Makefile.in: Regenerated.
GCC 6 does not generate constructors for two of gold's test cases.
This patch simply removes the checks for them.
gold/
PR 19751
* testsuite/Makefile.am (retain_symbols_file_test): Remove check
for constructor.
* testsuite/Makefile.in: Regenerate.
* testsuite/dynamic_list.sh: Likewise.
* testsuite/retain_symbols_file_test.sh: Likewise.
This patch is a simple refactoring that will allow the MIPS backend to
replace the Output_data_reloc_base::do_write() method without copying
its entire implementation. I've moved the implementation of do_write()
into a function template, which can be instantiated with a custom
class to write the MIPS-specific relocation format. The custom class
for MIPS needs access to the symbol index and address from
Output_reloc, so I've included the part of Vlad's MIPS-64 patch that
makes those accessor methods public.
2016-03-08 Cary Coutant <ccoutant@gmail.com>
Vladimir Radosavljevic <vladimir.radosavljevic@imgtec.com>
gold/
* output.cc (Output_reloc_writer): New type.
(Output_data_reloc_base::do_write): Move implementation to template
in output.h and replace with invocation of template.
* output.h (Output_file): Move to top of file.
(Output_reloc::get_symbol_index): Move to public interface.
(Output_reloc::get_address): Likewise.
(Output_data_reloc_base::do_write_generic): New function template.
gold/
PR gold/19019
* layout.h (Layout::add_target_specific_dynamic_tag): New function.
* layout.cc (Layout::add_target_specific_dynamic_tag): New function.
* mips.cc (Target_mips::make_symbol): Adjust function signature.
* sparc.cc (Target_sparc::Target_sparc): Initialize register_syms_.
(Target_sparc::do_is_defined_by_abi): Remove test for
STT_SPARC_REGISTER.
(Target_sparc::Register_symbol): New struct type.
(Target_sparc::register_syms_): New data member.
(Target_sparc<64, true>::sparc_info): Set has_make_symbol to true.
(Target_sparc::make_symbol): New function.
(Target_sparc::do_finalize_sections): Add register symbols and new
dynamic table entries.
* symtab.h (Sized_symbol::init_undefined): Add value parameter.
(Symbol_table::add_target_global_symbol): New function.
(Symbol_table::target_symbols_): New data member.
* symtab.cc (Sized_symbol::init_undefined): Add value parameter.
(Symbol_table::Symbol_table): Initialize target_symbols_.
(Symbol_table::add_from_object): Pass additional parameters to
Target::make_symbol.
(Symbol_table::define_special_symbol): Likewise.
(Symbol_table::add_undefined_symbol_from_command_line): Pass 0 for
undefined symbol value.
(Symbol_table::set_dynsym_indexes): Process target-specific symbols.
(Symbol_table::sized_finalize): Likewise.
(Symbol_table::sized_write_globals): Likewise.
* target.h (Sized_target::make_symbol): Add name, st_type, object,
st_shndx, and value parameters.
include/
2016-03-03 Than McIntosh <thanm@google.com>
* plugin-api.h: Add new hooks to the plugin transfer vector to
to support querying section alignment and section size.
(ld_plugin_get_input_section_alignment): New hook.
(ld_plugin_get_input_section_size): New hook.
(ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
and LDPT_GET_INPUT_SECTION_SIZE.
(ld_plugin_tv): Add tv_get_input_section_alignment and
tv_get_input_section_size.
gold/
2016-03-03 Than McIntosh <thanm@google.com>
* plugin.cc (Plugin::load): Include hooks for get_input_section_size
and get_input_section_alignment in transfer vector.
(get_input_section_alignment): New function.
(get_input_section_size): New function.
* testsuite/Makefile.am: Add plugin_layout_with_alignment.sh test.
* testsuite/Makefile.in: [Regenerate.]
* testsuite/plugin_section_alignment.cc: New test file.
* testsuite/plugin_layout_with_alignment.cc: New test file.
* testsuite/plugin_layout_with_alignment.sh: New test file.
Let the plugin know that a file is not being included in the link by
returning LDPS_NO_SYMS from get_symbols().
include/
* plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
gold/
* plugin.h (Pluginobj::get_symbol_resolution_info): Add version
parameter.
* plugin.cc (get_symbols_v3): New function.
(Plugin::load): Add LDPT_GET_SYMBOLS_V3.
(Pluginobj::get_symbol_resolution_info): Return LDPS_NO_SYMS when using
new version.
x86_64_mov_to_lea5.o and x86_64_mov_to_lea6.o must be assembled with
-mrelax-relocations=yes since when assembler is configured with
--disable-x86-relax-relocations, R_X86_64_GOTPCRELX relocation won't
be generated. This linker optimization requires R_X86_64_GOTPCRELX
relocation.
This patch also removed the duplicated x86_64_overflow_pc32.o target.
* testsuite/Makefile.am (x86_64_mov_to_lea5.o): Pass
-mrelax-relocations=yes to $(TEST_AS).
(x86_64_mov_to_lea6.o): Likewise.
(x86_64_overflow_pc32.o): Remove duplicated target.
* testsuite/Makefile.in: Regenerated.
gold/ChangeLog:
* s390.cc (Target_s390::match_view_u): New helper method.
(Target_s390::do_is_call_to_non_split): New method.
(Target_s390::ss_code_st_r14): New const.
(Target_s390::ss_code_l_r14): New const.
(Target_s390::ss_code_bras_8): New const.
(Target_s390::ss_code_l_basr): New const.
(Target_s390::ss_code_a_basr): New const.
(Target_s390::ss_code_ear): New const.
(Target_s390::ss_code_c): New const.
(Target_s390::ss_code_larl): New const.
(Target_s390::ss_code_brasl): New const.
(Target_s390::ss_code_jg): New const.
(Target_s390::ss_code_jgl): New const.
(Target_s390::ss_match_mcount): New helper method.
(Target_s390::ss_match_l): New helper method.
(Target_s390::ss_match_ahi): New helper method.
(Target_s390::ss_match_alfi): New helper method.
(Target_s390::ss_match_cr): New helper method.
(Target_s390::do_calls_non_split): New method.
* testsuite/Makefile.am: Added new tests.
* testsuite/split_s390.sh: New test.
* testsuite/split_s390_1_a1.s: New test.
* testsuite/split_s390_1_a2.s: New test.
* testsuite/split_s390_1_n1.s: New test.
* testsuite/split_s390_1_n2.s: New test.
* testsuite/split_s390_1_z1.s: New test.
* testsuite/split_s390_1_z2.s: New test.
* testsuite/split_s390_1_z3.s: New test.
* testsuite/split_s390_1_z4.s: New test.
* testsuite/split_s390_2_ns.s: New test.
* testsuite/split_s390_2_s.s: New test.
* testsuite/split_s390x_1_a1.s: New test.
* testsuite/split_s390x_1_a2.s: New test.
* testsuite/split_s390x_1_n1.s: New test.
* testsuite/split_s390x_1_n2.s: New test.
* testsuite/split_s390x_1_z1.s: New test.
* testsuite/split_s390x_1_z2.s: New test.
* testsuite/split_s390x_1_z3.s: New test.
* testsuite/split_s390x_1_z4.s: New test.
* testsuite/split_s390x_2_ns.s: New test.
* testsuite/split_s390x_2_s.s: New test.
2016-02-11 Rahul Chaudhry <rahulchaudhry@google.com>
* aarch64.cc (Target_aarch64::scan_erratum_843419_span):
Remove info message for every erratum 843419 found and fixed.
On x32, a pc-relative reference to an undef weak symbol (value 0)
with a negative addend (typically -4) generates a spurious overflow
error because Symbol_value::value() returns a 32-bit negative number
as an unsigned number, which gets zero-extended before subtracting
the PC value. This patch fixes the problem by special-casing the
negative addend, and adding it to the value after widening it to
64 bits. Symbol_value::value() does not need the addend if it's
negative, since it is only important when processing section
symbols for merge sections, where a positive addend provides the
input section offset of the merged constant.
gold/
* x86_64.cc (X86_64_relocate_functions::pcrela32_check): Fix x32
overflow checking when symbol value + addend < 0.
In order to get around the optimizer and newer compiler warnings
about shift counts, the overflow checking code had resorted to
some messy shifting, and with the never-before-seen instantiations
of the template functions, we were still running afoul of the
compiler checks.
This patch replaces those messy shift sequences with a simple
class template that provides the min and max limits for any
bit size up to 64, with a specialization for 64 that prevents
the compiler from complaining.
gold/
PR gold/19577
* reloc.h (Limits): New class.
(Bits::has_overflow32): Use min/max values from Limits.
(Bits::has_unsigned_overflow32): Likewise.
(Bits::has_signed_unsigned_overflow32): Likewise.
(Bits::has_overflow): Likewise.
(Bits::has_unsigned_overflow): Likewise.
(Bits::has_signed_unsigned_overflow64): Likewise.
The problem here is that x32 is really using 64-bit addressing,
while pretending to be 32-bit. Even though the object file format
is 32-bit, we need to do the overflow checking with 64-bit
arithmetic (because that's what the hardware will be using).
This patch overrides the pcrela32_check functions in reloc.h
with target-specific versions that do 64-bit checking.
I've also updated the test case to use -Tdata instead of adding
a huge .space directive, to reduce the size of the .o files.
gold/
PR gold/19567
* reloc.h (Relocate_functions::Overflow_check): Add comments.
* x86_64.cc (X86_64_relocate_functions): New class.
(Target_x86_64::Relocate::relocate): Use the new class.
* testsuite/Makefile.am (x86_64_overflow_pc32): Add -Tdata option.
(x32_overflow_pc32): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/x32_overflow_pc32.sh: New script.
* testsuite/x86_64_overflow_pc32.s: Remove .space directive.
This is needed by s390 split-stack support, to distinguish call
and load-address relocations.
gold/ChangeLog:
* i386.cc (Target_i386::is_call_to_non_split): Add view and view_size
parameters.
* reloc.cc (Sized_relobj_file::split_stack_adjust_reltype): Pass view
and view_size to is_call_to_non_split.
* target.cc (Target::is_call_to_non_split): Add view and view_size
parameters.
* target.h (class Target): Likewise.
* icf.cc (get_rel_addend): New function.
(get_section_contents): Move merge section addend computation to a
new function. Ignore negative values for SHT_REL and SHT_RELA addends.
Fix bug to not read past the length of the section.
Fix bug related to addend computation for MERGE sections.
