Commit Graph

4433 Commits

Author SHA1 Message Date
Alan Modra ab251b8980 fix typos in ChangeLog 2014-06-02 15:59:21 +09:30
Alan Modra ce46249c15 fix 2014-05-28 ld Makefile.am changes
bfin, msp, and score all used an extra parameter to genscripts.sh
to select a "customizer_script" different from the standard one
named from the emulation.  This patch renames the scripts to avoid
the need, tidying them in the process.

	* emulparams/elf32bfin.sh: Rename from bfin.sh.
	* emulparams/elf32bfinfd.sh: Update to suit.
	* emulparams/: Delete.
	* emulparams/msp430.sh: Rename from msp430all.sh.  Remove
	MSP430_NAME and msp430X vars.
	* emulparams/msp430X.sh: New.
	* emulparams/: Delete.
	* emulparams/score3_elf.sh: Rename from scoreelf.sh.  Remove
	SCORE_NAME and score7_elf ARCH setting.
	* emulparams/score7_elf.sh: New.
	* Makefile.am (eelf32bfin.c, eelf32bfinfd.c): Update dependencies.
	(emsp430.c, emsp430X.c, escore3_elf.c, escore7_elf.c): Likewise.
	* Makefile.in: Regenerate.
	* genscripts.sh: Delete customizer_script param.
2014-06-02 14:52:52 +09:30
Hans-Peter Nilsson 77ac17b845 ld: Split GENSCRIPTS rule from dependencies to fix tdir_'s.
* Makefile.am: Change all rules with ${GENSCRIPTS}
	invocations to be just dependencies.
	($(ALL_EMULATION_SOURCES) $(ALL_64_EMULATION_SOURCES))
	(run-genscripts): New rules.
	* Makefile.in: Regenerate.
2014-05-28 18:20:16 +02:00
mfortune 9854d43d40 Add objcopy stage between assembly and linking for run_dump_test
ld/testsuite/

	* lib/ld-lib.exp: Add objcopy_objects command to run_dump_test.
	This allows each input object to be optionally run through
	objcopy before linking.
2014-05-28 16:21:19 +01:00
DJ Delorie b26dbe2773 Fix typo. 2014-05-27 19:05:18 -04:00
DJ Delorie 7a2f2d82fd Add new link-map-text hook and RX auto-vector support.
* bfd/elf32-rx.c (get_symbol_value_maybe): New.
(rx_elf_relocate_section): If we find a reloc against
$tableentry$default$<name>, redirect it to the appropriate
$tableentry$<n>$.
(RX_Table_Info): New.
(rx_table_find): New.  Check all tables and SEC_KEEP all sections
with table parts in them.
(rx_check_directives): New.
(rx_table_map_2): New.
(rx_table_map): New.
(rx_additional_link_map_text): New.  Called to dump tables to the
map file.
* bfd/elf32-rx.h: New.

* ld/ldemul.h (extra_map_file_text): New field.
(ldemul_extra_map_file_text): Declare.
* ld/ldemul.c (ldemul_extra_map_file_text): Define.
* ld/ldlang.c (lang_map): Call it.

* ld/emultempl/rxelf.em: Add extra_map_file_text hook.
* ld/emultempl/aix.em: Add NULL extra_map_file_text hook.
* ld/emultempl/armcoff.em: Likewise.
* ld/emultempl/beos.em: Likewise.
* ld/emultempl/elf32.em: Likewise.
* ld/emultempl/generic.em: Likewise.
* ld/emultempl/gld960.em: Likewise.
* ld/emultempl/gld960c.em: Likewise.
* ld/emultempl/linux.em: Likewise.
* ld/emultempl/lnk960.em: Likewise.
* ld/emultempl/m68kcoff.em: Likewise.
* ld/emultempl/pe.em: Likewise.
* ld/emultempl/pep.em: Likewise.
* ld/emultempl/sunos.em: Likewise.
* ld/emultempl/ticoff.em: Likewise.
* ld/emultempl/vanilla.em: Likewise.
2014-05-27 17:14:49 -04:00
Alan Modra 0ef76c43d7 Localize varible to avoid warning
* ldlang.c (base): Move variable to..
	* mri.c: ..here, and make static.
	* ldlang.h (base): Delete declaration.
2014-05-25 00:54:22 +09:30
Hans-Peter Nilsson 865d0aef3a ld: Add missing eelf32mbel_linux.c to ALL_EMULATION_SOURCES.
ld:
	* Makefile.am (ALL_EMULATION_SOURCES): Add missing eelf32mbel_linux.c.
	* Makefile.in: Regenerate.
2014-05-20 23:13:08 +02:00
Will Newton 273dc27930 ld/aarch64: xfail non-PIC shared object tests on aarch64
aarch64 does not support building non-PIC shared objects, so mark
tests for these as xfail.

ld/testsuite/ChangeLog:

2014-05-20  Will Newton  <will.newton@linaro.org>

	* ld-shared/shared.exp: Mark non-PIC shared object tests
	as xfail on aarch64.
2014-05-20 09:47:29 +01:00
Alan Modra 93d1b056cb Rewrite ppc32 backend .sdata and .sdata2 handling
1) _SDA_BASE_ and _SDA2_BASE_ and defined automatically, in a similar
   manner to the way _GLOBAL_OFFSET_TABLE_ is handled.  It's a little
   more complicated to remove the symbols because _SDA_BASE_ needs to
   be there if either .sdata or .sbss is present, and similarly for
   _SDA2_BASE.
2) The linker created .sdata and .sdata2 sections used for
   R_PPC_EMB_SDAI16 and R_PPC_EMB_SDA2I16 pointers are created early.
   Nowadays we strip unneeded sections from the output, so it isn't
   necessary to delay creating the sections.
3) The output section for targets of various SDA relocs is now checked
   as per the ABI(s).  We previously allowed .sdata.foo and similar,
   most likely because at some stage we were checking input sections.

Also, the patch fixes a long-standing bug in size_input_sections
that affects the values of symbols defined in stripped input
sections.

	PR 16952
bfd/
	* elf32-ppc.c (ppc_elf_create_linker_section): Move earlier.
	Remove redundant setting of htab->elf.dynobj.  Don't align.
	Define .sdata symbols using _bfd_elf_define_linkage_sym.
	(ppc_elf_create_glink): Call ppc_elf_create_linker_section.
	(create_sdata_sym): Delete.
	(elf_allocate_pointer_linker_section): Rename from
	elf_create_pointer_linker_section.  Align section.
	(ppc_elf_check_relocs): Don't call ppc_elf_creat_linker_section
	directly here, or create_sdata_sym.  Set ref_regular on _SDA_BASE_
	and _SDA2_BASE_.
	(ppc_elf_size_dynamic_sections): Remove ATTRIBUTE_UNUSED on param.
	Remove unnecessary tests on _SDA_BASE_ sym.
	(maybe_strip_sdasym, ppc_elf_maybe_strip_sdata_syms): New functions.
	(ppc_elf_relocate_section): Tighten SDA reloc symbol section checks.
	* elf32-ppc.h (ppc_elf_set_sdata_syms): Delete.
	(ppc_elf_maybe_strip_sdata_syms): Declare.
ld/
	* emulparams/elf32ppccommon.sh (_SDA_BASE_, _SDA2_BASE_): Delete.
	* emultempl/ppc32elf.em (ppc_before_allocation): Call
	ppc_elf_maybe_strip_sdata_syms.
	* ldlang.c (size_input_section): Correct output_offset value
	for excluded input sections.
2014-05-20 13:13:23 +09:30
Andreas Tobler fb2c6e43b8 Don't link FreeBSD tests with -ldl.
* ld-elf/shared.exp: Introduce the extralibs variable to control
    the libraries to be linked. Don't link -ldl on *-*-freebsd*.

    * ld-bootstrap/bootstrap.exp: Do not add -ldl to the extralibs on
    *-*-freebsd*.
2014-05-19 08:49:55 +02:00
John Marino 5febff9be8 * configure.tgt: Add /lib to dragonfly NATIVE_LIB_DIRS. 2014-05-16 15:39:47 +01:00
Chung-Lin Tang fae663595d 2014-05-11 Chung-Lin Tang <cltang@codesourcery.com>
* emulparams/nios2linux.sh (OTHER_GOT_SYMBOLS): Wrap _gp in HIDDEN(),
	and gp in PROVIDE_HIDDEN.
2014-05-11 10:04:45 -07:00
Hans-Peter Nilsson eae25ec577 Fix freeing of link_info.hash
ld:
	* ldlang.c (lang_finish): Don't call bfd_link_hash_table_free here.
	(output_bfd_hash_table_free_fn): New variable.
	(open_output): Save the _bfd_link_hash_table_free function for the
	output_bfd into output_bfd_hash_table_free_fn.
	* ldmain.c (ld_cleanup): If set, call output_bfd_hash_table_free_fn
	on link_info.hash.
	* ldlang.h (output_bfd_hash_table_free_fn): Declare.

ld/testsuite:
	* ld-mmix/wrap1.d, ld-mmix/wrap1a.s, ld-mmix/wrap1b.s,
	ld-mmix/wrap1c.s, ld-mmix/wrap2.d, ld-mmix/wrap3.d,
	ld-mmix/wrap3a.s, ld-mmix/wrap3b.s, ld-mmix/wrap4.d: New
	tests.
2014-05-10 02:52:14 +02:00
H.J. Lu df18fdba5d Properly display extra data/address size prefixes
X86 disassembler checks data and address size prefixes when displaying
instruction mnemonic and operands.  For the extra data and address size
prefixes, their names depend only on the address mode, not the data and
address size prefixes.  This patch changes x86 disassembler not to check
the data and address size prefix when printing extra data and address size
prefixes.

gas/testsuite/

	* gas/i386/nops-1-core2.d: Replace data32 with data16.
	* gas/i386/nops-4a-i686.d: Likewise.
	* gas/i386/nops-5-i686.d: Likewise.
	* gas/i386/nops-5.d: Likewise.
	* gas/i386/x86-64-cbw-intel.d: Likewise.
	* gas/i386/x86-64-cbw.d: Likewise.
	* gas/i386/x86-64-io-intel.d: Likewise.
	* gas/i386/x86-64-io-suffix.d: Likewise.
	* gas/i386/x86-64-io.d: Likewise.
	* gas/i386/x86-64-nops-1-core2.d: Likewise.
	* gas/i386/x86-64-nops-1-g64.d: Likewise.
	* gas/i386/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/x86-64-nops-1.d: Likewise.
	* gas/i386/x86-64-nops-2.d: Likewise.
	* gas/i386/x86-64-nops-3.d: Likewise.
	* gas/i386/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/x86-64-nops-4.d: Likewise.
	* gas/i386/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/x86-64-nops-5.d: Likewise.
	* gas/i386/x86-64-stack-intel.d: Likewise.
	* gas/i386/x86-64-stack-suffix.d: Likewise.
	* gas/i386/x86-64-stack.d: Likewise.
	* gas/i386/ilp32/x86-64-cbw-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-cbw.d: Likewise.
	* gas/i386/ilp32/x86-64-io-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-io-suffix.d: Likewise.
	* gas/i386/ilp32/x86-64-io.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-core2.d:
	* gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-3.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5.: Likewise.
	* gas/i386/ilp32/x86-64-stack-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-stack-suffix.: Likewise.
	* gas/i386/ilp32/x86-64-stack.d: Likewise.

ld/testsuite/

	* ld-x86-64/tlsbin.dd: Replace data32 with data16.
	* ld-x86-64/tlsdesc-nacl.pd: Likewise.
	* ld-x86-64/tlsgdesc.dd: Likewise.
	* ld-x86-64/tlsld1.dd: Likewise.
	* ld-x86-64/tlsld3.dd: Likewise.
	* ld-x86-64/tlspic.dd: Likewise.

opcodes/

2014-05-09  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (ADDR16_PREFIX): Removed.
	(ADDR32_PREFIX): Likewise.
	(DATA16_PREFIX): Likewise.
	(DATA32_PREFIX): Likewise.
	(prefix_name): Updated.
	(print_insn): Simplify data and address size prefixes processing.
2014-05-09 10:58:00 -07:00
Volodymyr Arbatov 1058c7532d Use signed data type for R_XTENSA_DIFF* relocation offsets.
R_XTENSA_DIFF relocation offsets are in fact signed. Treat them as such.
Add testcase that examines ld behaviour on R_XTENSA_DIFF relocation
changing sign during relaxation.

2014-05-02  Volodymyr Arbatov  <arbatov@cadence.com>
	    David Weatherford  <weath@cadence.com>
	    Max Filippov  <jcmvbkbc@gmail.com>

bfd/
  * elf32-xtensa.c (relax_section): treat R_XTENSA_DIFF* relocations as
  signed.

gas/
  * config/tc-xtensa.c (md_apply_fix): mark BFD_RELOC_XTENSA_DIFF*
  fixups as signed.

ld/testsuite/
  * ld-xtensa/diff_overflow.exp, * ld-xtensa/diff_overflow1.s,
  * ld-xtensa/diff_overflow2.s: Add test for DIFF* relocation
  signedness and overflow checking.
2014-05-08 01:55:41 +04:00
Alan Modra 6d00b59031 bfd target vector rationalisation
This renames the bfd targets to <cpu>_<format>_<other>_<endian>_vec.
So for example, bfd_elf32_ntradlittlemips_vec becomes
mips_elf32_ntrad_le_vec and hp300bsd_vec becomes m68k_aout_hp300bsd_vec.

bfd/
	* aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-ns32k.c,
	* aout-sparcle.c, * aout0.c, * aoutx.h, * armnetbsd.c, * bout.c,
	* cf-i386lynx.c, * cf-sparclynx.c, * cisco-core.c, * coff-alpha.c,
	* coff-apollo.c, * coff-arm.c, * coff-aux.c, * coff-go32.c,
	* coff-h8300.c, * coff-h8500.c, * coff-i386.c, * coff-i860.c,
	* coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mips.c,
	* coff-rs6000.c, * coff-sh.c, * coff-sparc.c, * coff-stgo32.c,
	* coff-svm68k.c, * coff-tic80.c, * coff-u68k.c, * coff-w65.c,
	* coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c,
	* coff64-rs6000.c, * config.bfd, * configure.com, * configure.in,
	* demo64.c, * elf-m10200.c, * elf-m10300.c, * elf32-am33lin.c,
	* elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c,
	* elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c,
	* elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
	* elf32-fr30.c, * elf32-frv.c, * elf32-gen.c, * elf32-h8300.c,
	* elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-i860.c,
	* elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c,
	* elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c,
	* elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c,
	* elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c,
	* elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c,
	* elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c,
	* elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-sh-symbian.c,
	* elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c,
	* elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilepro.c, * elf32-v850.c,
	* elf32-vax.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c,
	* elf32-xtensa.c, * elf64-alpha.c, * elf64-gen.c, * elf64-hppa.c,
	* elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c,
	* elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c,
	* elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c,
	* epoc-pe-arm.c, * epoc-pei-arm.c, * hp300bsd.c, * hp300hpux.c,
	* hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386bsd.c,
	* i386dynix.c, * i386freebsd.c, * i386linux.c, * i386lynx.c,
	* i386mach3.c, * i386msdos.c, * i386netbsd.c, * i386os9k.c,
	* irix-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c,
	* m88kmach3.c, * m88kopenbsd.c, * mach-o-i386.c, * mach-o-x86-64.c,
	* makefile.vms, * mipsbsd.c, * mmo.c, * netbsd-core.c, * newsos3.c,
	* nlm32-alpha.c, * nlm32-i386.c, * nlm32-ppc.c, * nlm32-sparc.c,
	* ns32knetbsd.c, * osf-core.c, * pc532-mach.c, * pe-arm-wince.c,
	* pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-ppc.c,
	* pe-sh.c, * pe-x86_64.c, * pei-arm-wince.c, * pei-arm.c,
	* pei-i386.c, * pei-ia64.c, * pei-mcore.c, * pei-mips.c, * pei-ppc.c,
	* pei-sh.c, * pei-x86_64.c, * ppcboot.c, * ptrace-core.c, * riscix.c,
	* sco5-core.c, * som.c, * sparclinux.c, * sparclynx.c,
	* sparcnetbsd.c, * sunos.c, * targets.c, * trad-core.c,
	* vax1knetbsd.c, * vaxbsd.c, * vaxnetbsd.c, * versados.c,
	* vms-alpha.c, * vms-lib.c: Rename bfd targets to
	<cpu>_<format>_<other>_<endian>_vec.  Adjust associated MY macros
	on aout targets.
	* configure: Regenerate.
binutils/
	* emul_aix.c: Update bfd target vector naming.
	* testsuite/binutils-all/objcopy.exp: Likewise.
ld/
	* emultempl/metagelf.em: Update bfd target vector naming.
	* emultempl/nios2elf.em: Likewise.
	* emultempl/spuelf.em: Likewise.
	* emultempl/tic6xdsbt.em: Likewise.
2014-05-02 20:09:40 +09:30
Hans-Peter Nilsson b46fa76826 ld/testsuite:
* ld-mmix/sec-11.d, ld-mmix/sec-11.ld, ld-mmix/sec-10.s,
	ld-mmix/sec-10.d, ld-mmix/b-offlocmis.s, ld-mmix/sec-12.d: New
	tests.
	* ld-mmix/b-offloc.s: Correct address in comment.
2014-05-02 00:31:58 +02:00
Will Newton 8a52f0d983 ld/arm: Fix testsuite failures for armeb-linux-eabi
Fix all the cases where endianness needs to be taken into account
in the ARM ld dump tests.

ld/testsuite/ChangeLog:

2014-04-23  Will Newton  <will.newton@linaro.org>

	* ld-arm/arm-no-rel-plt.ld: Remove OUTPUT_FORMAT and
	SEARCH_DIR commands.
	* ld-arm/arm-rel32.d: Update regexps to allow test to
	pass on armeb-linux-eabi configuration.
	* ld-arm/data-only-map.d: Likewise.
	* ld-arm/fix-arm1176-off.d: Likewise.
	* ld-arm/fix-arm1176-on.d: Likewise.
	* ld-arm/ifunc-1.gd: Likewise.
	* ld-arm/ifunc-10.gd: Likewise.
	* ld-arm/ifunc-11.gd: Likewise.
	* ld-arm/ifunc-12.gd: Likewise.
	* ld-arm/ifunc-13.gd: Likewise.
	* ld-arm/ifunc-14.gd: Likewise.
	* ld-arm/ifunc-15.gd: Likewise.
	* ld-arm/ifunc-16.gd: Likewise.
	* ld-arm/ifunc-17.gd: Likewise.
	* ld-arm/ifunc-2.gd: Likewise.
	* ld-arm/ifunc-3.gd: Likewise.
	* ld-arm/ifunc-4.gd: Likewise.
	* ld-arm/ifunc-5.gd: Likewise.
	* ld-arm/ifunc-6.gd: Likewise.
	* ld-arm/ifunc-7.gd: Likewise.
	* ld-arm/ifunc-8.gd: Likewise.
	* ld-arm/ifunc-9.gd: Likewise.
	* ld-arm/jump-reloc-veneers-long.d: Likewise.
	* ld-arm/reloc-boundaries.d: Likewise.
2014-04-23 13:56:49 +01:00
H.J. Lu 43c001c7d6 Add tests for PR ld/16846
PR ld/16846
	* ld-plugin/lto.exp (lto_link_tests): Add tests for PR ld/16846.
	* ld-plugin/pr16846a.c: New file.
	* ld-plugin/pr16846b.c: Likewise.
	* ld-plugin/pr16846c.c: Likewise.
2014-04-22 10:22:39 -07:00
Christian Svensson 73589c9dbd Remove support for the (deprecated) openrisc and or32 configurations and replace
with support for the new or1k configuration.
2014-04-22 15:57:47 +01:00
Richard Henderson d1c109de72 Fix alpha-elf relaxation
ld/
	* emultempl/alphaelf.em (alpha_after_parse): Enable 2 relax passes.
bfd/
	* elf64-alpha.c (elf64_alpha_size_got_sections): New may_merge
	parameter; honor it and disable got merging when false.
	(elf64_alpha_relax_got_load): Do not relax to GPREL relocs during
	the first pass of relaxation.
	(elf64_alpha_relax_with_lituse): Likewise.  Move relaxed relocs to
	the end of the LITERAL+LITUSE chain.
	(elf64_alpha_relax_section): Only process LITERAL relocs during the
	second pass of relaxation.
2014-04-21 08:14:18 -07:00
Kwok Cheung Yeung cb22ccf411 This patch causes local GOT entries addressed via a 16-bit index to
be placed towards the front of local GOT space, while entries addressed
via a 32-bit index are placed towards the rear.

Provided that there are fewer than ~16K local GOT entries addressed via
a 16-bit index in total, this should eliminate any relocation overflows
caused by such GOT entries being allocated beyond the addressable range.

bfd/
	* elfxx-mips.c (struct mips_got_info): Delete assigned_gotno
	field.  Add assigned_low_gotno and assigned_high_gotno fields.
	(mips_elf_create_local_got_entry): Update out-of-space condition.
	Set index of new GOT entry to assigned_low_gotno if required by
	the current relocation, else set it to assigned_high_gotno.
	(mips_elf_set_global_gotidx): Replace uses of assigned_gotno
	with assigned_low_gotno.
	(mips_elf_multi_got): Initialize assigned_low_gotno and
	assigned_high_gotno in secondary GOTs.  Use assigned_low_gotno
	in place of assigned_gotno when handling global GOT entries.
	(mips_elf_lay_out_got): Initialize assigned_low_gotno and
	assigned_high_gotno.
	(_bfd_mips_elf_finish_dynamic_sections): Account for a possible
	gap in the middle of local GOT space.

ld/testsuite/
	* ld-mips-elf/elf-rel-xgot-n32.d: Update for new GOT layout.
	* ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise.
	* ld-mips-elf/elf-rel-xgot-n64.d: Likewise.
	* ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise.
	* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
2014-04-17 14:40:08 +01:00
Steve Ellcey 8056826a68 2014-04-16 Steve Ellcey <sellcey@mips.com>
* emultempl/elf32.em: Include safe-ctype.h.
2014-04-16 10:47:13 -07:00
Steve Ellcey 751e54c92e 2014-04-16 Steve Ellcey <sellcey@mips.com>
* ldbuildid.c (generate_build_id): Add ATTRIBUTE_UNUSED to size arg.
2014-04-16 10:45:08 -07:00
Marcus Shawcroft fa85fb9a1b [AArch64] Fix off by one error in instruction relaxation mask.
The AArch64 TLSDESC to IE relaxation code uses a bit mask intended to
ensure that destination register in a relaxed ldr instruction is
always X0.  The mask has an off by one error resulting in the most
significant bit of the destination register being retained in the
relaxed instruction.  The issue generally appears when the compiler
emits TLS accesses code under high register pressure resulting in a
broken code sequence.
2014-04-15 17:46:07 +01:00
Denis Chertykov e4ef1b6c3f bfd/ChangeLog
* elf32-avr.c: Add DIFF relocations for AVR.
	(avr_final_link_relocate): Handle the DIFF relocs.
	(bfd_elf_avr_diff_reloc): New.
	(elf32_avr_is_diff_reloc): New.
	(elf32_avr_adjust_diff_reloc_value): Reduce difference value.
	(elf32_avr_relax_delete_bytes): Recompute difference after deleting
	bytes.

	* reloc.c: Add BFD_RELOC_AVR_DIFF8/16/32 relocations

gas/ChangeLog

	* config/tc-avr.c: Add new flag mlink-relax.
	(md_show_usage): Add flag and help text.
	(md_parse_option): Record whether link relax is turned on.
	(relaxable_section): New.
	(avr_validate_fix_sub): New.
	(avr_force_relocation): New.
	(md_apply_fix): Generate DIFF reloc.
	(avr_allow_local_subtract): New.

	* config/tc-avr.h (TC_LINKRELAX_FIXUP): Define to 0.
	(TC_FORCE_RELOCATION): Define.
	(TC_FORCE_RELOCATION_SUB_SAME): Define.
	(TC_VALIDATE_FIX_SUB): Define.
	(avr_force_relocation): Declare.
	(avr_validate_fix_sub): Declare.
	(md_allow_local_subtract): Define.
	(avr_allow_local_subtract): Declare.

gas/testsuite/ChangeLog

	* gas/avr/diffreloc_withrelax.d: New testcase.
	* gas/avr/noreloc_withoutrelax.d: Likewise.
	* gas/avr/relax.s: Likewise.

include/ChangeLog

	* elf/avr.h: Add new DIFF relocs.

ld/testsuite/ChangeLog

	* ld-avr/norelax_diff.d: New testcase.
	* ld-avr/relax_diff.d: Likewise.
	* ld-avr/relax.s: Likewise.
2014-04-10 19:50:33 +04:00
Nick Clifton edf84efc4e Remove remaining default manifest support.
* Makefile.am (default-manifest.o): Remove rule.
	(EMUL_EXTRA_BINARIES): Delete.
	(ALL_EMUL_EXTRA_BINARIES): Delete.
	(ld_new_DEPENDENCIES): Remove EMUL_EXTRA_BINARIES.
	(install-data-local): Remove EMUL_EXTRA_BINARIES.
	* Makefile.in: Regenerate.
	* configure.in (all_emul_extra_binaries): Delete.
	(EMUL_EXTRA_BINARIES): Remove.
	* configure: Regenerate.
	* configure.tgt (target_extra_binaries): Delete.
	* emultempl/default-manifest.rc: Delete.
	* ld.texinfo: Remove discussion of default manifest.
	* emulparams/i386pe.sh (DEFAULT_MANIFEST): Delete.
	* emulparams/i386pep.sh (DEFAULT_MANIFEST): Delete.
2014-04-09 17:12:30 +01:00
Alan Modra e30d16e9ec Fix fallout from splitting ldbuildid.[ch] off elf32.em.
bfd/
	* libcoff.h: Regenerate.
ld/
	* emultempl/spuelf.em: Include safe-ctype.h, remove duplicate errno.h.
	* emultempl/nds32elf.em: Include bfd_stdint.h.
	* po/POTFILES.in: Regenerate.
2014-04-09 13:49:05 +09:30
Alan Modra b4ab436423 ppc476 icache workaround fix for bctr
I got the ppc476 workaround wrong.  bctr (and bctrl) as the last
instruction in a page can hit the icache bug if the preceding mtctr
insn is close by, and the destination is in the first few instructions
on the next page.  This scenario can occur with code generated by gcc
to implement switch statements, or in code generated to call by
function pointer.

To prevent the bctr problem it is also necessary to remove other
instructions that otherwise would be safe.

bfd/
	* elf32-ppc.c (ppc_elf_relocate_section): Remove bctr from list
	of safe ppc476 insns at end of page.  Also remove non-branch insns.
	Expand comments.
ld/
	* emultempl/ppc32elf.em (no_zero_padding, ppc_finish): New functions.
	(LDEMUL_FINISH): Define.
2014-04-09 07:07:06 +09:30
Nick Clifton 6c1799adab This patch removes the inclusion of the default manifest in final links for
the Cygwin and MinGW targets.  The manifest is now going to be handled by gcc.

	* scripttempl/pe.sc (R_RSRC): Remove default manifest.
	* scripttempl/pep.sc (R_RSRC): Remove default manifest.
2014-04-08 17:45:33 +01:00
Jon TURNEY 61e2488cd8 Add support for generating and inserting build IDs into COFF binaries.
* peXXigen.c (pe_print_debugdata): New function: Displays the
	contents of the debug directory and decodes codeview entries.
	(_bfd_XXi_swap_debugdir_in, _bfd_XXi_swap_debugdir_out)
	(_bfd_XXi_slurp_codeview_record, _bfd_XXi_write_codeview_record):
	Add functions for reading and writing debugdir and codeview
	records.
	* libpei.h (_bfd_XXi_swap_debugdir_in, _bfd_XXi_swap_debugdir_out)
	(_bfd_XXi_write_codeview_record): Add prototypes and macros.
	* libcoff-in.h (pe_tdata): Add build-id data.
	* libcoff.h: Regenerate.
	* coffcode.h (coff_write_object_contents): Run build_id
	after_write_object_contents hook.

	* pe.h (external_IMAGE_DEBUG_DIRECTORY, _CV_INFO_PDB70)
	(_CV_INFO_PDB20): Add structures and constants for debug directory
	and codeview records.
	* internal.h (internal_IMAGE_DEBUG_DIRECTORY, CODEVIEW_INFO):
	Add structures and constants for internal representation of debug
	directory and codeview records.

	* emultempl/elf32.em (id_note_section_size, read_hex, write_build_id):
	Move code for parsing build-id option and calculating the build-id to...
	* ldbuildid.c: New file.
	* ldbuildid.h: New file.
	* Makefile.am (CFILES, HFILES, OFILES, ld_new_SOURCES): Add new
	files.
	* Makefile.in: Regenerate.
	* ld.texinfo: Update --build-id description to mention COFF
	support.
	* NEWS: Mention support for COFF build ids.
	* emultempl/pe.em (gld${EMULATION_NAME}_handle_option):
	(pecoff_checksum_contents, write_build_id, setup_build_id)
	(gld_${EMULATION_NAME}_after_open):  Handle and implement
	build-id option.
	* emultempl/pep.em: Likewise.
2014-04-08 10:59:43 +01:00
Andreas Schwab 17c34b8f3d Fix spurious failures in ld-plugin/lto.exp
* ld-plugin/lto.exp: Make "-Wp," prefix optional when filtering
out _FORTIFY_SOURCE.
("Build libdummy.a 9", "PR ld/12696"): Mark as c++.
2014-04-07 19:07:03 +02:00
Cary Coutant abc9061b5c Document optional comma in linker script.
The linker script documentation does not mention the optional comma
that may follow an output section command or an overlay command.
In some cases, where a fill expression is used, and the next
output section command begins with an operator (e.g., "/DISCARD/"),
the comma may be required to separate the two commands.

Currently, GNU ld doesn't require the comma, but gold does.

ld/
	PR gold/16804
	* ld.texinfo: Document optional comma following output section
	command and overlay command.
2014-04-04 09:28:51 -07:00
Alan Modra ffe54b3798 Pad sections according to current script FILL.
When aligning input sections, we are supposed to take the fill pattern
from a FILL statement, if there is one in the output section statement.

ld/
	* ldlang.c (lang_size_sections_1 <lang_input_section_enum>): Use
	current "fill", not "output_section_statement->fill".
ld/testsuite/
	* ld-scripts/fill.d, * ld-scripts/fill.t, * ld-scripts/fill_0.s,
	* ld-scripts/fill_1.s, * ld-scripts/fill_2.s: New test.
	* ld-scripts/data.exp: Run it.
2014-04-04 19:06:35 +10:30
Nick Clifton 76f0cad6f4 This is a fix for PR ld/16744 which showed that an object file linked with -r and -z [no]execstack
would not honour the [no]execstack.  Fully linked binaries use a special segment to indicate the
state of the stack, but relocatable object files only have sections, and .note.GNU-stack was not
being created.

	* emultempl/elf32.em (_after_open): Create a .note.GNU-stack
	section when performing a relocatable link with -z [no]execstack
	specified.
2014-03-31 13:14:44 +01:00
Marcus Shawcroft 72c56015dd [AArch64] Fixup ld-aarch64/eh-frame.d expected PC range.
Fix the expected output for ld-aarch64/eh-frame.d.  This issue was
exposed by the recent fix to the output of objdump -Wf here:
https://sourceware.org/ml/binutils/2014-03/msg00251.html
2014-03-31 12:58:48 +01:00
Chris Faylor 8547a0f903 * ChangeLog: Fix duplicate entry. Set date on entry correctly. 2014-03-29 16:01:46 -04:00
H.J. Lu 4c6d802e59 Scan all input files for symbol reference warning
This patch scans all input files for symbol reference warning if the
symbol reference doesn't exist in the current input file.

ld/

	PR ld/16756
	* ldmain.c (symbol_warning): New function.
	(warning_callback): Use it.  Scan all input files for a reference
	to SYMBOL.

ld/testsuite/

	PR ld/16756
	* ld-plugin/lto.exp: Expect filename and line number for PR
	ld/12760 test.
2014-03-27 08:12:17 -07:00
Yury Gribov 6a631e86cf Add support for limited pretty-printing of ARM PLT entries on eabi and nacl targets.
* elf32-arm.c (elf32_arm_get_synthetic_symtab): Add new callback.
    	(elf32_arm_nacl_plt_sym_val): Likewise.
    	(elf32_arm_plt0_size): Add helper function.
    	(elf32_arm_plt_size): Likewise.

    	* ld-arm/arm-app-abs32.d: Updated test.
    	* ld-arm/arm-app.d: Likewise.
    	* ld-arm/arm-lib-plt32.d: Likewise.
    	* ld-arm/arm-lib.d: Likewise.
    	* ld-arm/armthumb-lib.d: Likewise.
    	* ld-arm/cortex-a8-fix-b-plt.d: Likewise.
    	* ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
    	* ld-arm/cortex-a8-fix-bl-plt.d: Likewise.
    	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
    	* ld-arm/cortex-a8-fix-blx-plt.d: Likewise.
    	* ld-arm/farcall-mixed-app-v5.d: Likewise.
    	* ld-arm/farcall-mixed-app.d: Likewise.
    	* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
    	* ld-arm/farcall-mixed-lib.d: Likewise.
    	* ld-arm/ifunc-10.dd: Likewise.
    	* ld-arm/ifunc-14.dd: Likewise.
    	* ld-arm/ifunc-15.dd: Likewise.
    	* ld-arm/ifunc-3.dd: Likewise.
    	* ld-arm/ifunc-4.dd: Likewise.
    	* ld-arm/ifunc-7.dd: Likewise.
    	* ld-arm/ifunc-8.dd: Likewise.
    	* ld-arm/ifunc-9.dd: Likewise.
    	* ld-arm/long-plt-format.d: Likewise.
    	* ld-arm/mixed-app-v5.d: Likewise.
    	* ld-arm/mixed-app.d: Likewise.
    	* ld-arm/mixed-lib.d: Likewise.
    	* ld-arm/thumb2-bl-undefweak.d: Likewise.
    	* ld-arm/thumb2-bl-undefweak1.d: Likewise.
2014-03-27 13:54:03 +00:00
Alan Modra f6c7c3e8b7 Referencing a function's address on PowerPC64 ELFv2
ELFv2 needs to create plt entries in a non-PIC executable for an
address reference to a function defined in a shared object.  It's
possible that an object file has no features that distinguish it as
ELFv1 or ELFv2, eg. an object only containing data.  Such files need
to be handled like those that are known to be ELFv2.
However, this unnecessarily creates plt entries for the analogous
ELFv1 case, so arrange to set output abi version earlier, and use the
output abi version to further distinguish ambiguous input files.

bfd/
	* elf64-ppc.c (ppc64_elf_check_relocs): Account for possibly
	needed plt entries when taking the address of functions for
	abiversion == 0 (ie. unknown) as well as abiversion == 2.
	Move opd setup and abiversion checks to..
	(ppc64_elf_before_check_relocs): ..here.  Renamed from
	ppc64_elf_process_dot_syms.  Set output abiversion from input and
	input abiversion from output, if either is not set.
	(ppc64_elf_merge_private_bfd_data): Don't merge flags here.
	(elf_backend_check_directives): Update.
ld/testsuite/
	* ld-powerpc/startv1.s, * ld-powerpc/startv2.s, * ld-powerpc/funref.s,
	* ld-powerpc/funv1.s, * ld-powerpc/funv2.s,
	* ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv2.d: New test files.
	* ld-powerpc/powerpc.exp: Run new tests.
2014-03-27 00:49:38 +10:30
Will Newton c955de363b bfd/elfnn-aarch64.c: Fix calculation of DT_RELASZ
The current code subtracts the size of the output section containing
relplt from RELASZ. In some cases this will be the same output
section as the dynamic relocs causing a value of zero to be output.
Calculating the size from input sections seems to make more sense.

bfd/ChangeLog:

2014-03-25  Will Newton  <will.newton@linaro.org>

	 * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections):
	 Set value of DT_PLTRELSZ and DT_RELASZ based on the size
	 of input sections rather than output sections.

ld/testsuite/ChangeLog:

2014-03-25  Will Newton  <will.newton@linaro.org>

	 * ld-aarch64/aarch64-elf.exp: Add relasz dump test.
	 * ld-aarch64/relasz.d: New file.
	 * ld-aarch64/relasz.s: Likewise.
2014-03-25 09:01:50 +00:00
Chris Faylor d0e6d77b3f 2014-03-21 Christopher Faylor <me.binutils2014@cgf.cx>
* ld.texinfo: Document change in handling of --enable-auto-image-base.
	* emultempl/pe.em (pe_auto_image_base): Set to default base.
	(gld_${EMULATION_NAME}_list_options): Change usage message to reflect
	optional --enable-auto-image-base argument.
	(gld${EMULATION_NAME}_handle_option): Handle optional
	--enable-auto-image-base argument.
	(compute_dll_image_base): Eliminate constant.  Use pe_auto_image_base.
2014-03-21 13:33:43 -04:00
Richard Sandiford d56a8dda6d gas/
* config/tc-mips.h (DIFF_EXPR_OK, CFI_DIFF_EXPR_OK): Define.
	* config/tc-mips.c (md_pcrel_from): Remove error message.
	(md_apply_fix): Convert PC-relative BFD_RELOC_32s to
	BFD_RELOC_32_PCREL.  Report a specific error message for unhandled
	PC-relative expressions.  Handle BFD_RELOC_8.

gas/testsuite/
	* gas/all/gas.exp: Remove XFAIL of forward.d for MIPS.
	* gas/mips/pcrel-1.s, gas/mips/pcrel-1.d, gas/mips/pcrel-2.s,
	gas/mips/pcrel-2.d, gas/mips/pcrel-3.s, gas/mips/pcrel-3.l,
	gas/mips/pcrel-4.s, gas/mips/pcrel-4-32.d, gas/mips/pcrel-4-n32.d,
	gas/mips/pcrel-4-64.d: New tests.
	* gas/mips/mips.exp: Run them.
	* gas/mips/lui-2.l: Tweak error message for line 7.

ld/testsuite/
	* ld-elf/merge.d: Remove MIPS XFAIL.
2014-03-20 21:18:43 +00:00
Will Newton 97323ad113 bfd/elf32-arm.c: Set st_value to zero for undefined symbols
Unless pointer_equality_needed is set then set st_value to be zero
for undefined symbols.

bfd/ChangeLog:

2014-03-20  Will Newton  <will.newton@linaro.org>

	PR ld/16715
	* elf32-arm.c (elf32_arm_check_relocs): Set
	pointer_equality_needed for absolute references within
	executable links.
	(elf32_arm_finish_dynamic_symbol): Set st_value to zero
	unless pointer_equality_needed is set.

ld/testsuite/ChangeLog:

2014-03-20  Will Newton  <will.newton@linaro.org>

	* ld-arm/ifunc-14.rd: Update symbol values.
2014-03-20 11:43:33 +00:00
Nick Clifton 6caf711179 Improve .rsrc section merging again. This time with an algorithm that
should work for all types of input .rsrc section.

	* peXXigen.c (rsrc_process_section): Add code to scan input
	sections and record their lengths.  Use these lengths to find the
	start of each merged .rsrc section.

	* scripttempl/pe.sc (R_RSRC): Fix default-manifest exclusion.
	(.rsrc): Add SUBALIGN(4).  Remove SORT.
	* scripttempl/pep.sc: Likewise.
2014-03-19 14:46:15 +00:00
Nick Clifton e57190430e Fix RX linker testsuite failures by making the assembler use conventional section names.
* config/default.exp (ASFLAGS): For the RX target add:
	-muse-conventional-section-names.
2014-03-19 12:21:39 +00:00
Nick Clifton 1d63324c56 Improve .rsrc section merging with better handling of the alignment adjustments
made between merged .rsrc sections.

	* peXXigen.c (rsrc_align): New function.  Attempts to cope with
	alignment variances when .rsrc sections are merged.
	(rsrc_process_section): Use rsrc_align.

	* Makefile.am (default-manifest.o): Use WINDRES_FOR_TARGET.
	* Makefile.in: Regenerate.
	* emultempl/default-manifest.rc: Fix typo.
	* scripttempl/pe.sc (R_RSRC): Fix default-manifest exclusion.
	(.rsrc): Add SUBALIGN(4).
	* scripttempl/pep.sc: Likewise.
2014-03-19 08:51:20 +00:00
Chris Faylor c712f1e3f7 2014-03-17 Christopher Faylor <me.cygwin2014@cgf.cx>
* Makefile.am: Use host version of windres.
	* Makefile.in: Regenerate.
2014-03-17 13:19:49 -04:00
Alan Modra e5b98723a5 Correct ld-powerpc/vle-reloc-2 test
* ld-powerpc/vle-reloc-3.d: Remove addresses.
2014-03-15 00:12:56 +10:30