Commit Graph

13080 Commits

Author SHA1 Message Date
Senthil Kumar Selvaraj
4cb771f214 Fix PR20789 - relaxation with negative valued diff relocs
Fix issues with diff relocs that have a negative value
i.e. sym2 - sym1 where sym2 is lesser than sym1.

The assembler generates a diff reloc with symbol as start of section
and addend as sym2 offset, and encodes assembly time difference at
the reloc offset.

The existing relaxation logic adjusts addends if the relaxed insn lies
between symbol and addend. That doesn't work for diff relocs where
sym2 is less than sym1 *and* the relaxed insn happens to be between
sym2 and sym1.

Fix the problems by

1. Using signed handling of the difference value (bfd_signed_vma instead
of bfd_vma, bfd_{get,set}_signed_xxx instead of bfd_{get,set}_xxx).

2. Not assuming sym2 is bigger than sym1. It instead computes the actual
addresses and sets the lower and higher addresses as start and end
addresses respectively and then sees if insn is between start and end.

3. Creating a new function elf32_avr_adjust_reloc_if_spans_insn to
centralize reloc adjustment, and ensuring diff relocs get adjusted
correctly even if their sym + addend doesn't overlap a relaxed insn.

It also removes a redundant variable did_pad. It is never set if
did_shrink is TRUE, and the code does a early return if did_shrink is
FALSE.

bfd/ChangeLog

2016-11-15  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

       PR ld/20789
       * bfd/elf32-avr.c (elf32_avr_adjust_diff_reloc_value): Do signed
       manipulation of diff value, and don't assume sym2 is less than sym1.
       (elf32_avr_adjust_reloc_if_spans_insn): New function.
       (elf32_avr_relax_delete_bytes): Use elf32_avr_adjust_diff_reloc_value,
       and remove redundant did_pad.

ld/ChangeLog

2016-11-15  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>

       PR ld/20789
       * ld/testsuite/ld-avr/pr20789.d: New test.
       * ld/testsuite/ld-avr/pr20789.s: New test.
2016-11-16 16:11:46 +05:30
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H.J. Lu
9d734efa10 Also check GOT PLT for R_X86_64_PLTOFF64
Since "-z now" replaces PLT with GOT PLT, we should also check GOT PLT
for R_X86_64_PLTOFF64 relocation.

bfd/

	PR ld/20800
	* elf64-x86-64.c (elf_x86_64_relocate_section): Also check
	plt_got.offset for R_X86_64_PLTOFF64.

ld/

	PR ld/20800
	* testsuite/ld-x86-64/pr20800a.S: New file.
	* testsuite/ld-x86-64/pr20800b.S: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run PR ld/20800 test.
2016-11-14 10:13:03 -08:00
Nick Clifton
63f2433dbc Fix typo "Faal through" should be "Fall through". 2016-11-14 08:44:17 +00:00
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Luke Allardyce
7103ad7639 Accept hidden COFF symbols, but treat them as if they were debugging symbols.
PR ld/20722
	* coffcode.h (coff_slurp_symbol_table): Accept C_HIDDEN symbols,
	but treat them as debugging symbols.
2016-11-11 10:08:05 +00:00
GDB Administrator
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Nick Clifton
a18590c386 Provide a more helpful error message when the BFD library is unable to load an extremely large section.
PR target/20737
	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Bind defined
	symbol locally in PIE.
2016-11-10 12:26:53 +00:00
Jiong Wang
ac33b731d2 [AArch64] Bind defined symbol locally in PIE
bfd/
	PR target/20737
	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Bind defined
	symbol locally in PIE.

ld/
	* testsuite/ld-aarch64/pie-bind-locally-a.s: New test source.
	* testsuite/ld-aarch64/pie-bind-locally-b.s: Likewise.
	* testsuite/ld-aarch64/pie-bind-locally.d: New testcase.
	* testsuite/ld-aarch64/aarch64-elf.exp: Run new testcase.
2016-11-10 09:25:17 +00:00
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Pedro Alves
3b0d929dd6 Fix bfd/dwarf2.c build breakage
Fix build breakage introduced by commit 089e3718bd ("Greatly improve
the speed if looking up DWARF line number information."):

 -  bfd_boolean is_linkage;
 -  const char *name;
 -  struct arange arange;
 +  int                  line;
 +  int                  tag;
 +  bfd                  boolean is_linkage;

bfd/ChangeLog:
2016-11-08  Pedro Alves  <palves@redhat.com>

	* dwarf2.c (struct funcinfo) <is_linkage>: Type is bfd_boolean,
	not "bfd boolean".
2016-11-08 12:32:05 +00:00
Igor Tsimbalist
089e3718bd Greatly improve the speed if looking up DWARF line number information.
* dwarf2.c (comp_unit): Add new fields 'lookup_funcinfo_table' and
	'number_of_functions' to keep lookup table and number of entries in
	the table.
	(line_sequence): Add new fields 'line_info_lookup' and 'num_lines'
	to keep lookup table and number of entries in the table.
	(lookup_funcinfo): New structure for lookup table for function
	references.
	(build_line_info_table): New function to create and build the lookup
	table for line information.
	(lookup_address_in_line_info_table): Use the lookup table instead of
	traverse a linked list.
	(compare_lookup_funcinfos): New compare fuction used in sorting of
	lookup table for function references.
	(build_lookup_funcinfo_table): New function to create, build and
	sort the lookup table for functions references.
	(lookup_address_in_function_table): Use the table instead of
	traverse a linked list.
	(_bfd_dwarf2_cleanup_debug_info): Free memory from function references
	lookup table.
2016-11-08 12:01:58 +00:00
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Nick Clifton
1b7a12f2d6 Fix building binutils for all 32-bit targets by moving riscv32 target into 64-bit builds only.
* targets.c (bfd_target_vector): Only add riscv_elf32_vec target
	when supporting 64-bit BFD targets.
2016-11-04 13:50:01 +00:00
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Tristan Gingold
034b77cf78 Deprecate old platforms
bfd/
	* config.bfd: Deprecate many old triplets.
2016-11-03 17:05:58 +01:00
Nick Clifton
225b362d10 Updated Danish translation for the BFD library. 2016-11-03 11:31:53 +00:00
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Maciej W. Rozycki
af955fe696 BFD: Fix double BFD_FAIL calls in `bfd_default_reloc_type_lookup'
Break out of the outer switch statement once the inner switch for the
BFD_RELOC_CTOR relocation has been processed, preventing double BFD_FAIL
calls from being made, once from the inner switch and then again from
the default case of the outer switch.

Noticed with a `-Wimplicit-fallthrough' build error reported by a recent
GCC version:

In file included from .../bfd/reloc.c:52:0:
.../bfd/reloc.c: In function 'bfd_default_reloc_type_lookup':
.../bfd/libbfd.h:779:8: error: this statement may fall through [-Werror=implicit-fallthrough=]
   do { bfd_assert(__FILE__,__LINE__); } while (0)
        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.../bfd/reloc.c:7780:4: note: in expansion of macro 'BFD_FAIL'
    BFD_FAIL ();
    ^~~~~~~~
.../bfd/reloc.c:7782:5: note: here
     default:
     ^~~~~~~
cc1: all warnings being treated as errors
make[4]: *** [reloc.lo] Error 1

	bfd/
	* reloc.c (bfd_default_reloc_type_lookup) <BFD_RELOC_CTOR>: Do
	not fall through to the default case.
2016-11-01 22:57:56 +00:00
Nick Clifton
e23eba971d Add support for RISC-V architecture.
bfd	* Makefile.am: Add entries for riscv32-elf and riscv64-elf.
	* config.bdf: Likewise.
	* configure.ac: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* archures.c: Add bfd_riscv_arch.
	* reloc.c: Add riscv relocs.
	* targets.c: Add riscv_elf32_vec and riscv_elf64_vec.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id.
	* elfnn-riscv.c: New file.
	* elfxx-riscv.c: New file.
	* elfxx-riscv.h: New file.

binutils* readelf.c (guess_is_rela): Add EM_RISCV.
	(get_machine_name): Likewise.
	(dump_relocations): Add support for riscv relocations.
	(get_machine_flags): Add support for riscv flags.
	(is_32bit_abs_reloc): Add R_RISCV_32.
	(is_64bit_abs_reloc): Add R_RISCV_64.
	(is_none_reloc): Add R_RISCV_NONE.
	* testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv.
	Expect the debug_ranges test to fail.

gas	* Makefile.am: Add riscv files.
	* Makefile.in: Regenerate.
	* NEWS: Mention the support for this architecture.
	* configure.in: Define a default architecture.
	* configure: Regenerate.
	* configure.tgt: Add entries for riscv.
	* doc/as.texinfo: Likewise.
	* testsuite/gas/all/gas.exp: Expect the redef tests to fail.
	* testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail.
	* config/tc-riscv.c: New file.
	* config/tc-riscv.h: New file.
	* doc/c-riscv.texi: New file.
	* testsuite/gas/riscv: New directory.
	* testsuite/gas/riscv/riscv.exp: New file.
	* testsuite/gas/riscv/t_insns.d: New file.
	* testsuite/gas/riscv/t_insns.s: New file.

ld	* Makefile.am: Add riscv files.
	* Makefile.in: Regenerate.
	* NEWS: Mention the support for this target.
	* configure.tgt: Add riscv entries.
	* emulparams/elf32lriscv-defs.sh: New file.
	* emulparams/elf32lriscv.sh: New file.
	* emulparams/elf64lriscv-defs.sh: New file.
	* emulparams/elf64lriscv.sh: New file.
	* emultempl/riscvelf.em: New file.

opcodes	* configure.ac: Add entry for bfd_riscv_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Add support for riscv.
	(disassembler_usage): Likewise.
	* riscv-dis.c: New file.
	* riscv-opc.c: New file.

include	* dis-asm.h: Add prototypes for print_insn_riscv and
	print_riscv_disassembler_options.
	* elf/riscv.h: New file.
	* opcode/riscv-opc.h: New file.
	* opcode/riscv.h: New file.
2016-11-01 16:45:57 +00:00
GDB Administrator
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Alan Modra
c646b02fdc Revert part "Set dynamic tag VMA and size from dynamic section when possible"
PR 20748
	* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Revert
	2016-05-13 change.
2016-10-31 12:49:14 +10:30
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Andrew Burgess
bb65a718b6 gas/arc: Don't rely on bfd list of cpu type for cpu selection
In the ARC assembler, when a cpu type is specified using the .cpu
directive, we rely on the bfd list of arc machine types in order to
validate the cpu name passed in.

This validation is only used in order to check that the cpu type passed
to the .cpu directive matches any machine type selected earlier on the
command line.  Once that initial check has passed a full check is
performed using the assemblers internal list of know cpu types.

The problem is that the assembler knows about more cpu types than bfd,
some cpu types known by the assembler are actually aliases for a base
cpu type plus a specific set of assembler extensions.  One such example
is NPS400, though more could be added later.

This commit removes the need for the assembler to use the bfd list of
machine types for validation.  Instead the error checking, to ensure
that any value passed to a '.cpu' directive matches any earlier command
line selection, is moved into the function arc_select_cpu.

I have taken the opportunity to bundle the 4 separate static globals
that describe the currently selected machine type into a single
structure (called selected_cpu).

gas/ChangeLog:

	* config/tc-arc.c (arc_target): Delete.
	(arc_target_name): Delete.
	(arc_features): Delete.
	(arc_mach_type): Delete.
	(mach_type_specified_p): Delete.
	(enum mach_selection_type): New enum.
	(mach_selection_mode): New static global.
	(selected_cpu): New static global.
	(arc_eflag): Rename to ...
	(arc_initial_eflag): ...this, and make const.
	(arc_select_cpu): Update comment, new parameter, check how
	previous machine type selection was made, and record this
	selection.  Use selected_cpu instead of old globals.
	(arc_option): Remove use of arc_get_mach, instead use
	arc_select_cpu to validate machine type selection.  Use
	selected_cpu over old globals.
	(allocate_tok): Use selected_cpu over old globals.
	(find_opcode_match): Likewise.
	(assemble_tokens): Likewise.
	(arc_cons_fix_new): Likewise.
	(arc_extinsn): Likewise.
	(arc_extcorereg): Likewise.
	(md_begin): Update default machine type selection, use
	selected_cpu over old globals.
	(md_parse_option): Update machine type selection option handling,
	use selected_cpu over old globals.
	* testsuite/gas/arc/nps400-0.s: Add .cpu directive.

bfd/ChangeLog:

	* cpu-arc.c (arc_get_mach): Delete.
2016-10-27 12:28:20 +01:00
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Maciej W. Rozycki
a18a2a347d elfxx-mips: Correct STUB_JALR's description
bfd/
	* elfxx-mips.c (STUB_JALR): Correct description.
2016-10-25 02:08:26 +01:00
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Nick Clifton
789b4e0035 Regenerate bfd.pot. 2016-10-20 11:45:58 +01:00
GDB Administrator
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Nick Clifton
695344c018 Add c-format tags to translatable strings with more than one argument-using formatting token.
* aout-adobe.c: Add missing c-format tags for translatable strings.
	* aout-cris.c: Likewise.
	* aoutx.h: Likewise.
	* bfd.c: Likewise.
	* binary.c: Likewise.
	* cache.c: Likewise.
	* coff-alpha.c: Likewise.
	* coff-arm.c: Likewise.
	* coff-i860.c: Likewise.
	* coff-mcore.c: Likewise.
	* coff-ppc.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff-sh.c: Likewise.
	* coff-tic4x.c: Likewise.
	* coff-tic54x.c: Likewise.
	* coff-tic80.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* coffcode.h: Likewise.
	* coffgen.c: Likewise.
	* cofflink.c: Likewise.
	* coffswap.h: Likewise.
	* cpu-arm.c: Likewise.
	* dwarf2.c: Likewise.
	* ecoff.c: Likewise.
	* elf-attrs.c: Likewise.
	* elf-eh-frame.c: Likewise.
	* elf-ifunc.c: Likewise.
	* elf-m10300.c: Likewise.
	* elf-s390-common.c: Likewise.
	* elf.c: Likewise.
	* elf32-arc.c: Likewise.
	* elf32-arm.c: Likewise.
	* elf32-avr.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-cr16.c: Likewise.
	* elf32-cr16c.c: Likewise.
	* elf32-cris.c: Likewise.
	* elf32-crx.c: Likewise.
	* elf32-d10v.c: Likewise.
	* elf32-d30v.c: Likewise.
	* elf32-epiphany.c: Likewise.
	* elf32-fr30.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-gen.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf32-i386.c: Likewise.
	* elf32-i960.c: Likewise.
	* elf32-ip2k.c: Likewise.
	* elf32-iq2000.c: Likewise.
	* elf32-lm32.c: Likewise.
	* elf32-m32c.c: Likewise.
	* elf32-m32r.c: Likewise.
	* elf32-m68hc11.c: Likewise.
	* elf32-m68hc12.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-mcore.c: Likewise.
	* elf32-mep.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-microblaze.c: Likewise.
	* elf32-moxie.c: Likewise.
	* elf32-msp430.c: Likewise.
	* elf32-mt.c: Likewise.
	* elf32-nds32.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elf32-or1k.c: Likewise.
	* elf32-pj.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-rl78.c: Likewise.
	* elf32-rx.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-score.c: Likewise.
	* elf32-score7.c: Likewise.
	* elf32-sh-symbian.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf32-sh64.c: Likewise.
	* elf32-spu.c: Likewise.
	* elf32-tic6x.c: Likewise.
	* elf32-tilepro.c: Likewise.
	* elf32-v850.c: Likewise.
	* elf32-vax.c: Likewise.
	* elf32-visium.c: Likewise.
	* elf32-xgate.c: Likewise.
	* elf32-xtensa.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-gen.c: Likewise.
	* elf64-hppa.c: Likewise.
	* elf64-ia64-vms.c: Likewise.
	* elf64-mmix.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elf64-sh64.c: Likewise.
	* elf64-sparc.c: Likewise.
	* elf64-x86-64.c: Likewise.
	* elfcode.h: Likewise.
	* elfcore.h: Likewise.
	* elflink.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* elfnn-ia64.c: Likewise.
	* elfxx-mips.c: Likewise.
	* elfxx-sparc.c: Likewise.
	* elfxx-tilegx.c: Likewise.
	* ieee.c: Likewise.
	* ihex.c: Likewise.
	* libbfd.c: Likewise.
	* linker.c: Likewise.
	* m68klinux.c: Likewise.
	* mach-o.c: Likewise.
	* merge.c: Likewise.
	* mmo.c: Likewise.
	* oasys.c: Likewise.
	* pdp11.c: Likewise.
	* pe-mips.c: Likewise.
	* peXXigen.c: Likewise.
	* pei-x86_64.c: Likewise.
	* peicode.h: Likewise.
	* ppcboot.c: Likewise.
	* reloc.c: Likewise.
	* sparclinux.c: Likewise.
	* srec.c: Likewise.
	* stabs.c: Likewise.
	* vms-alpha.c: Likewise.
	* vms-lib.c: Likewise.
	* xcofflink.c: Likewise.
2016-10-19 14:37:21 +01:00
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bbb76b184f Automatic date update in version.in 2016-10-19 00:00:22 +00:00
Nick Clifton
b928b56ea6 Updated Danish translation for the BFD library. 2016-10-18 10:56:12 +01:00
Maciej W. Rozycki
61034b0b6a NDS32/BFD: Correct an aliasing error in `nds32_elf_check_relocs'
Fix an aliasing build error:

cc1: warnings being treated as errors
.../bfd/elf32-nds32.c: In function 'nds32_elf_check_relocs':
.../bfd/elf32-nds32.c:6644: warning: dereferencing type-punned pointer will break strict-aliasing rules
make[3]: *** [elf32-nds32.lo] Error 1

in a way following commit 6edfbbad08 ("Fix up gcc4.1 aliasing
warnings"), <https://sourceware.org/ml/binutils/2005-10/msg00071.html>.

	bfd/
	* elf32-nds32.c (nds32_elf_check_relocs): Avoid aliasing warning
	from GCC.
2016-10-18 04:36:55 +01:00
Maciej W. Rozycki
c48182bfe4 ARM/BFD: Correct an `index' global shadowing error
Fix a commit 5025eb7c0d ("Delete relocations associatesd with deleted
exidx entries.") build regression:

cc1: warnings being treated as errors
.../bfd/elf32-arm.c: In function 'elf32_arm_update_relocs':
.../bfd/elf32-arm.c:14951: warning: declaration of 'index' shadows a global declaration
/usr/include/string.h:304: warning: shadowed declaration is here
make[3]: *** [elf32-arm.lo] Error 1

in a way following commit 91d6fa6a03 ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").

	bfd/
	* elf32-arm.c (elf32_arm_update_relocs): Rename `index' local
	variable to `reloc_index'.
2016-10-18 04:32:43 +01:00