Commit Graph

44 Commits

Author SHA1 Message Date
Joel Brobecker b811d2c292 Update copyright year range in all GDB files.
gdb/ChangeLog:

        Update copyright year range in all GDB files.
2020-01-01 10:20:53 +04:00
Joel Brobecker 42a4f53d2b Update copyright year range in all GDB files.
This commit applies all changes made after running the gdb/copyright.py
script.

Note that one file was flagged by the script, due to an invalid
copyright header
(gdb/unittests/basic_string_view/element_access/char/empty.cc).
As the file was copied from GCC's libstdc++-v3 testsuite, this commit
leaves this file untouched for the time being; a patch to fix the header
was sent to gcc-patches first.

gdb/ChangeLog:

	Update copyright year range in all GDB files.
2019-01-01 10:01:51 +04:00
Joel Brobecker e2882c8578 Update copyright year range in all GDB files
gdb/ChangeLog:

        Update copyright year range in all GDB files
2018-01-02 07:38:06 +04:00
Joel Brobecker 61baf725ec update copyright year range in GDB files
This applies the second part of GDB's End of Year Procedure, which
updates the copyright year range in all of GDB's files.

gdb/ChangeLog:

        Update copyright year range in all GDB files.
2017-01-01 10:52:34 +04:00
Joel Brobecker 618f726fcb GDB copyright headers update after running GDB's copyright.py script.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2016-01-01 08:43:22 +04:00
Mike Frysinger 5e744ef887 sim: unify sim-hload
Pretty much all targets are using this module already, so add it to the
common list of objects.  The only oddball out here is cris and that's
because it supports loading via an offset for all the phdrs.  We drop
support for that.
2015-12-27 00:54:41 -05:00
Mike Frysinger 797eee4264 sim: sim-stop/sim-reason/sim-reg: move to common obj list
Now that all arches (for the most part) have moved over, move sim-stop.o,
sim-reason.o, and sim-reg.o to the common object list and out of all the
arch ports.
2015-11-16 00:41:59 -05:00
Mike Frysinger 78e9aa70fe sim: unify sim-cpu usage
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the
cpu state is multicore, and the STATE_CPU defines match, we can move
it all to the common code.
2015-04-15 02:19:52 -04:00
Mike Frysinger 14c9ad2edb sim: v850: convert to sim-cpu
Make cpu allocation fully dynamic so we can leverage the common
sim-cpu and its APIs.
2015-04-13 02:11:50 -04:00
Mike Frysinger 122bbfb52a sim: move sim-engine.o/sim-hrw.o to the common list
This makes these two objects available to all sims by default.
2015-04-06 23:56:47 -04:00
Mike Frysinger 465fb143c8 sim: make nrun the default run program
We want people to stop using the run.c frontend, but it's hard to notice
when it's still set as the default.  Lets flip things so nrun.c is the
default, and users of run.c will get an error by default.  We turn that
error into a warning for existing sims so we don't break them -- this is
mostly meant for people starting new ports.
2015-03-14 07:02:58 -04:00
Joel Brobecker 32d0add0a6 Update year range in copyright notice of all files owned by the GDB project.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2015-01-01 13:32:14 +04:00
Joel Brobecker ecd75fc8ee Update Copyright year range in all files maintained by GDB. 2014-01-01 07:54:24 +04:00
Joel Brobecker 8acc9f485b Update years in copyright notice for the GDB files.
Two modifications:
  1. The addition of 2013 to the copyright year range for every file;
  2. The use of a single year range, instead of potentially multiple
     year ranges, as approved by the FSF.
2013-01-01 06:41:43 +00:00
Joel Brobecker c5a5708100 Copyright year update in most files of the GDB Project.
gdb/ChangeLog:

        Copyright year update in most files of the GDB Project.
2012-01-04 08:28:28 +00:00
Joel Brobecker 7b6bb8daac run copyright.sh for 2011. 2011-01-01 15:34:07 +00:00
Joel Brobecker dc3cf14f35 Update copyright notices to add year 2010. 2010-01-01 10:03:36 +00:00
Joel Brobecker e4d013fc0f Update the copyright notice of some of the files I missed
in the previous copyright update.
2009-01-14 10:53:10 +00:00
Daniel Jacobowitz 9b254dd1ce Updated copyright notices for most files. 2008-01-01 22:53:26 +00:00
Joel Brobecker 4744ac1bb0 Switch the license of all files explicitly copyright the FSF
to GPLv3.
2007-08-24 14:30:15 +00:00
Daniel Jacobowitz cb5c8c3989 gdb/
* MAINTAINERS: Disable -Werror for cris simulator.  Build
	sparc64-solaris2.10 instead of the broken sparc-elf.
	* solib-frv.c: Include "solib.h".
	* Makefile.in (solib-frv.o): Update.
	* mt-tdep.c (mt_gdbarch_init): Correct typo in floatformats patch.
	* xtensa-tdep.c (xtensa_regset_from_core_section): Cast size_t to int.
	(xtensa_frame_this_id, xtensa_frame_prev_register)
	(xtensa_push_dummy_call): Use %p.
sim/v850/
	* Makefile.in (interp.o): Uncomment and update.
2007-02-20 12:45:06 +00:00
Daniel Jacobowitz 6aba47ca06 Copyright updates for 2007. 2007-01-09 17:59:20 +00:00
Ian Lance Taylor ae451ac6d4 Use $(SHELL) whenever we invoke move-if-change. 2003-05-16 07:11:43 +00:00
Nick Clifton e551c2572e Makefile.in: Add gen-zero-r0 option.
sim-main.h (GPR_SET, GPR_CLEAR): Define.
simops.c (OP_24007E0):  Sign extend the imm9 operand of a mul instruction.
2002-08-29 16:59:20 +00:00
Andrew Cagney 7ef2d4e783 * Makefile.in (simops.h, table.c): Delete targets.
(tmp-gencode, gencode.o, gencode): Delete targets.
(simops.h): New file.
($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h.
* gencode.c: Delete file.
2001-12-02 19:27:29 +00:00
J.T. Conklin d4424adaef * Makefile.in (simops.o): Add simops.h to dependency list. 2001-04-15 19:57:10 +00:00
Andrew Cagney 1e6cd1593b Link with libintl, needed by libopcodes. 2001-03-14 21:51:31 +00:00
Jonathan Larmour 42acc51e30 * Makefile.in (gencode): Link with libopcodes in build tree rather
than building source files from there.
2001-02-01 06:56:29 +00:00
Stan Shebs c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs 071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Andrew Cagney a6a5d34927 Fix --enable-build-warnings=-Werror failures.
v850/simops.c, d10v/simops.c, v850/Makefile.in, d10v/Makefile.in:
Include targ-vals.h instead of syscall.h. Replace SYS_* with
TARGET_SYS_*.  Add dependency.
z8k/support.c: Include <errno.h>
v850/simops.c: Replace long with portable signed32.
mips/interp.c: Make sim_monitor global - needed by sky.
1998-11-25 09:58:04 +00:00
Andrew Cagney fb1fd47514 Smooth some of ALU tracing's rough edges.
Fix switch insn.
1997-09-16 14:00:15 +00:00
Andrew Cagney 3f33acd039 Use trace_one_insn in trace functions. Buffer up trace data so that
it is displayed in a single block.
1997-09-16 07:03:41 +00:00
Andrew Cagney 721478d51b Add v850e version of breakpoint instruction. 1997-09-16 02:15:55 +00:00
Andrew Cagney 4dda50b052 For instructions moved into v850.igen was computing (wrong) NIA when
this wasn't needed.
1997-09-15 23:09:26 +00:00
Andrew Cagney 410230cf6d Check reserved bits before executing instructions.
Make v850[eq] the the default simulator.
Report illegal instructions.
Include v850e instructions in v850eq.
1997-09-12 05:56:38 +00:00
Andrew Cagney 93e7a1b5b7 Add profiling support to v850*. 1997-09-12 02:44:03 +00:00
Andrew Cagney 5d37a07bc5 Add multi-sim support to v850/v850e/v850eq simulators. 1997-09-08 17:42:48 +00:00
Andrew Cagney da3a66e5ca Replace memory model with one from sim/common directory. 1997-09-04 10:10:02 +00:00
Andrew Cagney b5e935ae85 Pacify gcc-current -Wall. 1997-09-03 07:30:17 +00:00
Andrew Cagney 9cdd2c6d72 Add real SIM_DESC arg to v850 simulator.
Add --enable-sim-warnings, use/fix errors.
Add --enable-sim-endian, don't use.
Add common modules. Don't yet use most.
1997-09-03 04:10:33 +00:00
Stu Grossman 295dbbe44c * configure configure.in Makefile.in: Update to new configure
scheme which is more compatible with WinGDB builds.
	* configure.in:  Improve comment on how to run autoconf.
	* configure:  Re-run autoconf to get new ../common/aclocal.m4.
	* Makefile.in:  Use autoconf substitution to install common
	makefile fragment.
1997-01-23 22:09:52 +00:00
Jeff Law 0ef0eba580 * interp.c (hash): Update to be more accurate.
(lookup_hash): Call hash rather than computing the hash
        code here.
        (do_format_1_2): Handle format 1 and format 2 instructions.
        Get operands correctly and call the target function.
        (do_format_6): Get operands correctly and call the target
        function.
        (do_formats_9_10): Rough cut so shift ops will work.
        (sim_resume): Tweak to deal with format 1 and format 2
        handling in a single funtion.  Don't update the PC
        for format 3 insns.  Fix typos.
        * simops.c: Slightly reorganize.  Add condition code handling
        to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
        and "not" instructions.
        * v850_sim.h (reg_t): Registers are 32bits.
        (_state): The V850 has 32 general registers.  Add a 32bit
        psw and pc register too.  Add accessor macros
Fixing lots of stuff.  Starting to add condition code support.  Basically
check pointing the work to date.
1996-08-29 23:39:23 +00:00
Jeff Law 22c1c7ddea * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
gencode.c, interp.c, simops.c: Created.
So we've got something to hack on.
1996-08-29 01:06:42 +00:00