dbd7cd63b9
Index: common/ChangeLog
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2003-02-26 Andrew Cagney <cagney@redhat.com>
* sim-engine.h (sim_engine_abort): Add noreturn attribute.
(sim_engine_vabort): Ditto.
(sim_engine_halt, sim_engine_restart): Ditto.
Index: mn10300/ChangeLog
2003-02-26 Andrew Cagney <cagney@redhat.com>
* am33.igen: Call sim_engine_abort instead of abort.
2003-02-26 23:27:09 +00:00
5425ca992e
* am33.igen: Warning clean-up.
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(movm): Initialize PC and mask.
(mov, movbu, movhu): Set srcreg2 from RI0.
(bsch): Initialize c.
(sat16_cmp): Actually do the comparison.
(mov_llt): Do not overwrite dstreg with uninitialized variable.
2000-08-09 18:42:04 +00:00
ceec355905
minor formatting tweaks to aid syncronisation
2000-05-29 19:05:41 +00:00
e33c036475
* am33.igen: Fix leading comments of SP-relative offset insns that
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referred to other registers. Make their offsets unsigned.
2000-05-22 20:34:09 +00:00
24a39d88a2
* mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,
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genericXor, genericBtst): Use `unsigned32'.
* op_utils.c: Likewise.
* mn10300.igen, am33.igen: Use `unsigned32', `signed32',
`unsigned64' or `signed64' where type width is relevant.
2000-05-18 22:56:28 +00:00
bfa8561f01
* am33.igen (inc4 Rn): Use genericAdd so as to modify flags.
2000-04-25 09:48:40 +00:00
d8e7020fd6
* am33.igen: Make SP-relative offsets unsigned. Add `*am33' for
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some instructions that were missing it.
2000-04-09 09:04:54 +00:00
c2d11a7da0
import gdb-1999-12-06 snapshot
1999-12-07 03:56:43 +00:00
071ea11e85
Initial creation of sourceware repository
1999-04-16 01:34:07 +00:00
3e20223154
* am33.igen: Detect cases where two operands must not match in
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non-DSP instructions.
1998-07-27 18:05:43 +00:00
6d254a2d5f
* am33.igen (translate_xreg): New function. Use it as needed.
1998-07-24 18:50:12 +00:00
4b6651c925
* am33.igen: Add some missing instructions.
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Missed a few last week... Grrr.
1998-07-23 16:31:41 +00:00
6ae1456eb5
* am33.igen: Autoincrement loads/store fixes.
1998-07-23 16:06:50 +00:00
0a78550778
* am33.igen: Add most am33 DSP instructions.
1998-07-21 15:50:14 +00:00
080ee2ba75
* am33.igen: Fix Z bit for remaining addc/subc instructions.
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Do not sign extend immediate for mov imm,XRn.
More random mul, mac & div fixes.
Remove some unused variables.
Sign extend 24bit displacement in memory addresses.
Whee, more fixes.
1998-07-09 19:41:47 +00:00
4e86afb85f
* mn10300.igen: Fix Z bit for addc and subc instructions.
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Minor fixes in multiply/divide patterns.
start-sanitize-am33
* am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various
fixes to 2 register multiply, divide and mac instructions. Set
Z,N correctly for sat16. Sign extend 24 bit immediate for add,
and sub instructions.
* am33.igen: Add remaining non-DSP instructions.
end-sanitize-am33
1998-07-09 19:04:22 +00:00
1f0ba346eb
* am33.igen: Add remaining non-DSP instructions.
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Lots of work still remains. PSW handing is probably broken badly and the
mul/mac classes of instructions are probably not handled correctly.
1998-07-09 16:09:24 +00:00
9c55817e66
* am33.igen (translate_rreg): New function. Use it as appropriate.
1998-07-09 00:24:57 +00:00
377e53bb6b
* am33.igen: More am33 instructions. Fix "div".
1998-07-08 22:33:35 +00:00
3e75ff7efd
* am33.igen: Add many more am33 instructions.
1998-07-06 21:41:06 +00:00
ee61616c43
Tweak.
1998-07-01 23:15:55 +00:00
0f7d73858c
* am33.igen: New file with some am33 support.
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Checking in work-to-date.
1998-07-01 23:13:14 +00:00
Andrew Cagney