3 Commits

Author SHA1 Message Date
Richard Henderson
07f5f4c683 or1k: Add the l.muld, l.muldu, l.macu, l.msbu insns
Also fix the incorrect definitions of multiply and divide carry and
overflow float.

Changes to the instructions are made in the .cpu file, then we
regenerate the binutils and sim files.

The changes also required a few fixups for tests and additional sim helpers.

cpu/ChangeLog:

yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
	    Stafford Horne  <shorne@gmail.com>

	* or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
	(insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
	(l-mul): Fix overflow support and indentation.
	(l-mulu): Fix overflow support and indentation.
	(l-muld, l-muldu, l-msbu, l-macu): New instructions.
	(l-div); Remove incorrect carry behavior.
	(l-divu): Fix carry and overflow behavior.
	(l-mac): Add overflow support.
	(l-msb, l-msbu): Add carry and overflow support.

opcodes/ChangeLog:

yyyy-mm-dd  Richard Henderson  <rth@twiddle.net>
	    Stafford Horne  <shorne@gmail.com>

	* or1k-desc.c: Regenerate.
	* or1k-desc.h: Regenerate.
	* or1k-opc.c: Regenerate.
	* or1k-opc.h: Regenerate.
	* or1k-opinst.c: Regenerate.

sim/common/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* cgen-ops.h (ADDCFDI): New function, add carry flag DI variant.
	(ADDOFDI): New function, add overflow flag DI variant.
	(SUBCFDI): New function, subtract carry flag DI variant.
	(SUBOFDI): New function, subtract overflow flag DI variant.

sim/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* or1k/cpu.h: Regenerate.
	* or1k/decode.c: Regenerate.
	* or1k/decode.h: Regenerate.
	* or1k/model.c: Regenerate.
	* or1k/sem-switch.c: Regenerate.
	* or1k/sem.c: Regenerate:

sim/testsuite/sim/or1k/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* div.S: Fix tests to match correct overflow/carry semantics.
	* mul.S: Likewise.

gas/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* testsuite/gas/or1k/allinsn.s: Add instruction tests for
	l.muld, l.muldu, l.macu, l.msb, l.msbu.
	* testsuite/gas/or1k/allinsn.d: Add test results for new
	instructions.
2018-10-05 11:41:42 +09:00
Joel Brobecker
e2882c8578 Update copyright year range in all GDB files
gdb/ChangeLog:

        Update copyright year range in all GDB files
2018-01-02 07:38:06 +04:00
Stafford Horne
6e51bfa755 sim: or1k: add cgen generated files
These are the simulator files generated by cgen.  These are split out
from the main sim patch to make the patch easier to review and smaller.

sim/ChangeLog:

2017-12-12  Stafford Horne  <shorne@gmail.com>
	    Peter Gavin  <pgavin@gmail.com>

	* or1k/arch.c: Generated.
	* or1k/arch.h: Generated.
	* or1k/cpu.c: Generated.
	* or1k/cpu.h: Generated.
	* or1k/cpuall.h: Generated.
	* or1k/decode.c: Generated.
	* or1k/decode.h: Generated.
	* or1k/model.c: Generated.
	* or1k/sem-switch.c: Generated.
	* or1k/sem.c: Generated.
2017-12-12 23:45:45 +09:00