ommit 3ae729d5a4
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed Mar 7 04:18:45 2018 -0800
x86: Rewrite NOP generation for fill and alignment
increased MAX_MEM_FOR_RS_ALIGN_CODE to 4095 which resulted in increase
of assembler time and memory usage by 5 times for inputs with many
.p2align directives, which is typical for LTO output. This patch passes
max_bytes to TC_FRAG_INIT so that MAX_MEM_FOR_RS_ALIGN_CODE can be set
as needed and tracked by backend it so that HANDLE_ALIGN can check the
maximum alignment for each rs_align_code frag. Wall time to assemble
the same cc1plus.s:
before:
423.78user 0.89system 7:05.71elapsed 99%CPU
after:
102.35user 0.27system 1:42.89elapsed 99%CPU
PR gas/24165
* frags.c (frag_var_init): Pass max_chars to TC_FRAG_INIT as
max_bytes.
* config/tc-aarch64.h (TC_FRAG_INIT): Add and pass max_bytes to
aarch64_init_frag.
* /config/tc-arm.h (TC_FRAG_INIT): And and pass max_bytes to
arm_init_frag.
* config/tc-avr.h (TC_FRAG_INIT): And and ignore max_bytes.
* config/tc-ia64.h (TC_FRAG_INIT): Likewise.
* config/tc-mmix.h (TC_FRAG_INIT): Likewise.
* config/tc-nds32.h (TC_FRAG_INIT): Likewise.
* config/tc-ns32k.h (TC_FRAG_INIT): Likewise.
* config/tc-rl78.h (TC_FRAG_INIT): Likewise.
* config/tc-rx.h (TC_FRAG_INIT): Likewise.
* config/tc-score.h (TC_FRAG_INIT): Likewise.
* config/tc-tic54x.h (TC_FRAG_INIT): Likewise.
* config/tc-tic6x.h (TC_FRAG_INIT): Likewise.
* config/tc-xtensa.h (TC_FRAG_INIT): Likewise.
* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Set to
(alignment ? ((1 << alignment) - 1) : 1)
(i386_tc_frag_data): Add max_bytes.
(TC_FRAG_INIT): Add and track max_bytes.
(HANDLE_ALIGN): Replace MAX_MEM_FOR_RS_ALIGN_CODE with
fragP->tc_frag_data.max_bytes.
* doc/internals.texi: Update TC_FRAG_TYPE with max_bytes.
PR 21621
* config/tc-avr.h (struct avr_frag_data): Add prev_opcode field.
(TC_FRAG_INIT): Define.
(avr_frag_init): Add prototype.
* config/tc-avr.c (avr_frag_init): New function.
(avr_operands): Replace static local 'prev' variable with
prev_opcode field in current frag.
* testsuite/gas/avr/pr21621.s: New test source file.
* testsuite/gas/avr/pr21621.d: New test driver file.
* testsuite/gas/avr/pr21621.s: New test error output file.
PR gas/21683
include * opcode/avr.h (AVR_INSN): Add one for __gcc_isr.
gas * doc/c-avr.texi (AVR Options) <-mgcc-isr>: Document it.
(AVR Pseudo Instructions): New node.
* config/tc-avr.h (md_pre_output_hook): Define to avr_pre_output_hook.
(md_undefined_symbol): Define to avr_undefined_symbol.
(avr_pre_output_hook, avr_undefined_symbol): New protos.
* config/tc-avr.c (struc-symbol.h): Include it.
(ISR_CHUNK_Done, ISR_CHUNK_Prologue, ISR_CHUNK_Epilogue): New enums.
(avr_isr, avr_gccisr_opcode)
(avr_no_sreg_hash, avr_no_sreg): New static variables.
(avr_opt_s) <have_gccisr>: Add field.
(avr_opt): Add initializer for have_gccisr.
(enum options) <OPTION_HAVE_GCCISR>: Add enum.
(md_longopts) <"mgcc-isr">: Add entry.
(md_show_usage): Document -mgcc-isr.
(md_parse_option) [OPTION_HAVE_GCCISR]: Handle it.
(md_undefined_symbol): Remove.
(avr_undefined_symbol, avr_pre_output_hook): New fuctions.
(md_begin) <avr_no_sreg_hash, avr_gccisr_opcode>: Initialize them.
(avr_operand) <pregno>: Add argument and set *pregno if function
is called for a register constraint.
[N]: Handle constraint.
(avr_operands) <avr_operand>: Pass 5th parameter to calls.
[avr_opt.have_gccisr]: Call avr_update_gccisr. Call
avr_gccisr_operands instead of avr_operands.
(avr_update_gccisr, avr_emit_insn, avr_patch_gccisr_frag)
(avr_gccisr_operands, avr_check_gccisr_done): New static functions.
* testsuite/gas/avr/gccisr-01.d: New test.
* testsuite/gas/avr/gccisr-01.s: New test.
* testsuite/gas/avr/gccisr-02.d: New test.
* testsuite/gas/avr/gccisr-02.s: New test.
* testsuite/gas/avr/gccisr-03.d: New test.
* testsuite/gas/avr/gccisr-03.s: New test.
When generating relocation (tc_gen_reloc) 32 bit relocation fixup
is changed to new 32 bit PC relative relocation if the fixup has pc-relative
flag set.
bfd/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* elf32-avr.c: Add 32 bit PC relative relocation for AVR target.
gas/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to
32 bit PC relative and update offset if the fixup is pc-relative.
* config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff
relocs.
gas/testsuite/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc.
* gas/avr/per-function-debugline.s: New test source.
include/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* elf/avr.h: Add new 32 bit PC relative relocation.
ld/testsuite/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* ld-avr/gc-section-debugline.d: New test.
* ld-avr/per-function-debugline.s: Source for new test.
Adds support to the assembler to write out data for tracking the use of
.org and .align directives. This data is collected within the assembler
and written out to a section ".avr.prop" (if there's anything to write
out).
This patch does not add any tests. The next patch in this series will
add a better mechanism for visualising the contents of .avr.prop which
will make writing tests much easier.
This patch also does not make any use of this collected data, that will
also come along in a later patch; the intended consumer is the linker,
during linker relaxation this information will be used to ensure that
the .org and .align directives are honoured.
bfd/ChangeLog:
* elf32-avr.h (AVR_PROPERTY_RECORD_SECTION_NAME): Define.
(AVR_PROPERTY_RECORDS_VERSION): Define.
(AVR_PROPERTY_SECTION_HEADER_SIZE): Define.
(struct avr_property_record): New structure.
gas/ChangeLog:
* config/tc-avr.c: Add elf32-avr.h include.
(struct avr_property_record_link): New structure.
(avr_output_property_section_header): New function.
(avr_record_size): New function.
(avr_output_property_record): New function.
(avr_create_property_section): New function.
(avr_handle_align): New function.
(exclude_section_from_property_tables): New function.
(create_record_for_frag): New function.
(append_records_for_section): New function.
(avr_create_and_fill_property_section): New function.
(avr_post_relax_hook): New function.
* config/tc-avr.h (md_post_relax_hook): Define.
(avr_post_relax_hook): Declare.
(HANDLE_ALIGN): Define.
(avr_handle_align): Declare.
(strut avr_frag_data): New structure.
(TC_FRAG_TYPE): Define.
The AVR target uses a bit in the elf header flags to indicate if the
object was assembled ready for linker relaxation. Previously this flag
was always set, even when the object was not assembled ready for linker
relaxation.
This patch moves setting of the flag into the assembler, and sets it
only when the assembler is preparing the file for linker relaxation.
bfd/ChangeLog:
* elf32-avr.c (bfd_elf_avr_final_write_processing): Don't set
EF_AVR_LINKRELAX_PREPARED unconditionally.
gas/ChangeLog:
* config/tc-avr.c: Add include for elf/avr.h.
(avr_elf_final_processing): New function.
* config/tc-avr.h (elf_tc_final_processing): Define.
(avr_elf_final_processing): Declare
gas/testsuite/ChangeLog:
* gas/avr/link-relax-elf-flag-clear.d: New file.
* gas/avr/link-relax-elf-flag-set.d: New file.
* gas/avr/link-relax-elf-flag.s: New file.
* config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
Don't skip fixups with fx_subsy non-NULL.
* config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
with fx_subsy non-NULL.
