Commit Graph

87600 Commits

Author SHA1 Message Date
Cupertino Miranda 82f46e2cc1 [ARC] XFAIL S-Records tests for both little and big endian ARC target.
ld/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* testsuite/ld-srec/srec.exp: Changed to XFAIL on both little and
	big endian ARC targets.
2016-06-13 16:15:58 +02:00
Cupertino Miranda 3b63d2cee1 [ARC] Fixes related to reordering of .got and .got.plt
- Correctly solved relocations on the .got header.
- This bug arrised from enabling RELRO (-z combreloc).
  Because the .got and .got.plt sections were split in new linker
  scripts the header is no longer part of sgotplt contents.
  Changed the patch to sgot contents instead.
- Latest fix to .got header relocs.

bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
2016-06-13 16:10:00 +02:00
Cupertino Miranda 2ab2f40d58 [ARC] General bug fixes
Fail safe for trying to reloc GOT and PLT on non dynamic linker.  Fix
issue with dynamic relocs not being generated with -pie.  Removed some
structures that were not being used.  Fixed typo changing RELENT to
RELAENT.  Fix for all SECTOFF relocations.

bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (arc_local_data, arc_local_data): Removed.
	(SECTSTART): Changed.
	(elf_arc_relocate_section): Fixed mistake in PIE related
	condition.
	(elf_arc_size_dynamic_sections): Changed DT_RELENT to DT_RELAENT.
2016-06-13 16:07:02 +02:00
Cupertino Miranda 0f7f3789ca [ARC] Generate DT_RELACOUNT.
bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (elf32_arc_reloc_type_class): Defined function to
	enable support for "-z combreloc" and DT_RELACOUNT.
	(elf_backend_reloc_type_class): Likewise
2016-06-13 16:04:04 +02:00
Nick Clifton e46dd0f46b Fix compile time warning about a redundant comparison in an assertion statement.
* gdbtypes.c (replace_type): Fix assertion.
2016-06-13 14:22:21 +01:00
Virendra Pathak 0a8be2fe26 Accept vulcan as a cpu name for the AArch64 port of GAS.
* config/tc-aarch64.c (aarch64_cpus): Add Broadcom Vulcan.
        * doc/c-aarch64.texi: Document that vulcan is a valid processor
	name.
2016-06-13 14:17:31 +01:00
Nick Clifton 69c9e028b6 Fix compile time warning messages building with gcc v6.1.1
etc	* texi2pod.pl: Escape curly braces, whilst searching for keyword
	strong.

gas	* config/tc-arm.c: For non-ELF based targets skip ARM feature sets
	that are not supported.

	* config/tc-arc.c (md_apply_fix): Avoid left shifting a signed
	constant.
	* config/tc-cr16.c (check_range): Likewise.
	* config/tc-nios2.c (nios2_check_overflow): Likewise.
2016-06-13 10:49:26 +01:00
GDB Administrator 1d3843e0b7 Automatic date update in version.in 2016-06-13 00:00:15 +00:00
H.J. Lu 6d84fed1a0 Update x86-64 no-PLT tests for x32
X32 has different output formats for readelf and objdump as well as a
different conversion of load symbol address via GOT.

	* testsuite/ld-x86-64/libno-plt-1b.dd: Updated for x32.
	* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
2016-06-12 07:28:58 -07:00
H.J. Lu 74d7f0aa5b Subtract GOT base only with a base register
When relocating R_386_GOT32 in "op $0, bar@GOT", we shouldn't subtract
GOT base without a base register and we should disallow it without a
base register for PIC.

bfd/

	PR ld/20244
	* elf32-i386.c (elf_i386_relocate_section): When relocating
	R_386_GOT32, return error without a base register for PIC and
	subtract the .got.plt section address only with a base register.

ld/

	PR ld/20244
	* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
	* testsuite/ld-i386/pr20244-1.s: New file.
	* testsuite/ld-i386/pr20244-1a.d: Likewise.
	* testsuite/ld-i386/pr20244-1b.d: Likewise.
	* testsuite/ld-i386/pr20244-1c.d: Likewise.
2016-06-11 21:24:01 -07:00
GDB Administrator 0a41a307ca Automatic date update in version.in 2016-06-12 00:00:17 +00:00
Vladimir Radosavljevic b52717c0e1 Add support for .MIPS.abiflags and .gnu.attributes sections.
elfcpp/
	* elfcpp.h (SHT_MIPS_ABIFLAGS): New enum constant.
	* mips.h (EF_MIPS_FP64, EF_MIPS_NAN2008): New enum constants for
	processor-specific flags.
	(E_MIPS_MACH_5900): New enum constant for machine variant.
	(AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): New enum
	constants.
	(AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU,
	AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS,
	AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16, AFL_ASE_MICROMIPS,
	AFL_ASE_XPA): Likewise.
	(AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP,
	AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900, AFL_EXT_4650,
	AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900, AFL_EXT_10000,
	AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120, AFL_EXT_5400,
	AFL_EXT_5500, AFL_EXT_LOONGSON_2E, AFL_EXT_LOONGSON_2F,
	AFL_EXT_OCTEON3): Likewise.
	(Tag_GNU_MIPS_ABI_FP, Tag_GNU_MIPS_ABI_MSA): Likewise.
	(Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE,
	Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT,
	Val_GNU_MIPS_ABI_FP_OLD_64,Val_GNU_MIPS_ABI_FP_XX,
	Val_GNU_MIPS_ABI_FP_64, Val_GNU_MIPS_ABI_FP_64A,
	Val_GNU_MIPS_ABI_FP_NAN2008, Val_GNU_MIPS_ABI_MSA_ANY,
	Val_GNU_MIPS_ABI_MSA_128): Likewise.
	(AFL_FLAGS1_ODDSPREG): New enum constant.
gold/
	* mips.cc (struct Mips_abiflags): New struct.
	(Mips_relobj::Mips_relobj): Initialize attributes_section_data_
	and abiflags_.
	(Mips_relobj::~Mips_relobj): Delete object pointed by
	attributes_section_data_.
	(Mips_relobj::abiflags): New method.
	(Mips_relobj::attributes_section_data): Likewise.
	(Mips_relobj::attributes_section_data_): New data member.
	(Mips_relobj::abiflags_): Likewise.
	(class Mips_output_section_abiflags): New class.
	(Target_mips::Target_mips): Initialize attributes_section_data_,
	abiflags_ and has_abiflags_section_.
	(Target_mips::do_should_include_section): Don't emit input
	.MIPS.abiflags sections to output .MIPS.abiflags.
	(Target_mips::Mips_mach): Add new enum constants.
	(Target_mips::mips_isa_ext_mach): New method.
	(Target_mips::mips_isa_ext): Likewise.
	(Target_mips::update_abiflags_isa): Likewise.
	(Target_mips::infer_abiflags): Likewise.
	(Target_mips::create_abiflags): Likewise.
	(Target_mips::fp_abi_string): Likewise.
	(Target_mips::select_fp_abi): Likewise.
	(Target_mips::merge_obj_attributes): Likewise.
	(Target_mips::merge_obj_abiflags): Likewise.
	(Target_mips::level_rev): Likewise.
	(Target_mips::merge_obj_e_flags): Rename from
	merge_processor_specific_flags. Remove dyn_obj argument,
	call update_abiflags_isa when needed, compare NaN encodings and
	compare FP64 state.
	(Target_mips::add_machine_extensions): Add two machine extensions
	and fix one.
	(Target_mips::attributes_section_data_): New data member.
	(Target_mips::abiflags_): Likewise.
	(Target_mips::has_abiflags_section_): Likewise.
	(Mips_relobj::do_read_symbols): Read .gnu.attributes and
	.MIPS.abiflags sections if they exists.
	(Target_mips::elf_mips_mach): Add E_MIPS_MACH_5900 and
	E_MIPS_MACH_OCTEON3 support.
	(Target_mips::do_adjust_elf_header): Setup EI_ABIVERSION flag.
	(Target_mips::do_finalize_sections): Merge .gnu.attributes and
	.MIPS.abiflags sections from input. Create these sections if
	needed.
	(Target_mips::elf_mips_mach_name): Add E_MIPS_MACH_5900 and
	E_MIPS_MACH_OCTEON3 support, and change strings for
	E_MIPS_MACH_LS2E, E_MIPS_MACH_LS2F and E_MIPS_MACH_LS3A just
	to match bfd.
2016-06-11 10:09:59 -07:00
Alan Modra 0eaf2e1b58 sparc-coff writing uninitialized memory
sparc-coff has a 20 byte symbol entry with an extra field, but neglects
to initialize the field.  Fix that.

	* coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
2016-06-11 17:25:35 +09:30
Alan Modra ef53be8916 Use size_t rather than bfd_size_type
I noticed when writing _bfd_elf_strtab_save/restore that size_t would
be better than bfd_size_type for a number of things in elf-strtab.c.
Using a 64-bit bfd_size_type on a 32-bit host doesn't make much sense
for array sizes and indices.

	* elf-strtab.c (struct strtab_save): Use size_t for "size".
	(struct elf_strtab_hash): Likewise for "size" and "alloced".
	(_bfd_elf_strtab_init): Formatting.
	(_bfd_elf_strtab_add): Return size_t rather than bfd_size_type.
	(_bfd_elf_strtab_addref): Take size_t idx param.
	(_bfd_elf_strtab_delref, _bfd_elf_strtab_refcount): Likewise.
	(_bfd_elf_strtab_offset): Likewise.
	(_bfd_elf_strtab_clear_all_refs): Use size_t idx.
	(_bfd_elf_strtab_save): Use size_t "idx" and "size" vars.
	(_bfd_elf_strtab_restore, _bfd_elf_strtab_emit): Similarly.
	(_bfd_elf_strtab_finalize): Similarly.
	* elf-bfd.h (_bfd_elf_strtab_add): Update prototypes.
	(_bfd_elf_strtab_addref, _bfd_elf_strtab_delref): Likewise.
	(_bfd_elf_strtab_refcount, _bfd_elf_strtab_offset): Likewise.
	* elf.c (bfd_elf_get_elf_syms): Calculate symbol buffer size
	using bfd_size_type.
	(bfd_section_from_shdr): Delete amt.
	(_bfd_elf_init_reloc_shdr): Likewise.
	(_bfd_elf_link_assign_sym_version): Likewise.
	(assign_section_numbers): Use size_t reloc_count.
	* elflink.c (struct elf_symbuf_head): Use size_t "count".
	(bfd_elf_link_record_dynamic_symbol): Use size_t for some vars.
	(elf_link_is_defined_archive_symbol): Likewise.
	(elf_add_dt_needed_tag): Likewise.
	(elf_finalize_dynstr): Likewise.
	(elf_link_add_object_symbols): Likewise.
	(bfd_elf_size_dynamic_sections): Likewise.
	(elf_create_symbuf): Similarly.
	(bfd_elf_match_symbols_in_sections): Likewise.
	(elf_link_swap_symbols_out): Likewise.
	(elf_link_check_versioned_symbol): Likewise.
	(bfd_elf_gc_record_vtinherit): Likewise.
	(bfd_elf_gc_common_finalize_got_offsets): Likewise.
2016-06-11 17:24:56 +09:30
GDB Administrator de5b02b698 Automatic date update in version.in 2016-06-11 00:00:19 +00:00
Vladimir Radosavljevic 82e498727a Fix problems emitting MIPS .reginfo section.
gold/
	* mips.cc (Mips_relobj::Mips_relobj): Initialize
	has_reginfo_section_.
	(Mips_relobj::has_reginfo_section_): New data member.
	(Mips_relobj::has_reginfo_section): New method.
	(class Mips_output_section_reginfo): Change base class to
	Output_section_data, and set masks of the output .reginfo section
	in constructor.
	(Mips_output_section_reginfo::as_mips_output_section_reginfo):
	Remove.
	(Mips_output_section_reginfo::set_masks): Likewise.
	(Mips_output_section_reginfo::set_final_data_size): Likewise.
	(Mips_output_section_reginfo::do_print_to_mapfile): New method.
	(Target_mips::do_make_output_section): Remove.
	(Mips_relobj::do_read_symbols): Set has_reginfo_section_ to true
	if the object contains a .reginfo section.
	(Target_mips::do_finalize_sections): Create a .reginfo output
	section if needed.
2016-06-10 15:37:19 -07:00
Tom Tromey 695bfa52cc Constify arch_type and friends
While working on the Rust support, I happened to notice that arch_type
and related functions take "char *" arguments, where "const char *"
would be more correct.  This patch fixes this oversight.  Tested by
rebuilding.

2016-06-10  Tom Tromey  <tom@tromey.com>

	* gdbtypes.c (arch_type, arch_integer_type, arch_character_type)
	(arch_boolean_type, arch_float_type, arch_complex_type)
	(arch_flags_type, append_flags_type_field)
	(append_flags_type_flag, arch_composite_type)
	(append_composite_type_field_raw)
	(append_composite_type_field_aligned)
	(append_composite_type_field): Make "name" parameter const.
	* gdbtypes.h (arch_type, arch_integer_type, arch_character_type)
	(arch_boolean_type, arch_float_type, arch_complex_type)
	(append_composite_type_field, append_composite_type_field_aligned)
	(append_composite_type_field_raw, arch_flags_type)
	(append_flags_type_field, append_flags_type_flag): Constify.
2016-06-10 10:10:17 -06:00
Tom Tromey 347dc1025d Fix PR rust/20110
PR rust/20110 concerns the type of an integer constant that is too
large for "i32", the default integer type.  This patch changes the
type of such a constant to i64.  This is important because such values
are often addresses, so truncating them by default is unfriendly.

Built and regtested on x86-64 Fedora 23.

2016-06-10  Tom Tromey  <tom@tromey.com>

	PR rust/20110:
	* rust-exp.y (lex_number): Don't truncate large numbers to i32.

2016-06-10  Tom Tromey  <tom@tromey.com>

	PR rust/20110:
	* gdb.rust/expr.exp: Add test for integer constant larger than
	i32.
2016-06-10 09:57:09 -06:00
Tom Tromey edef7b8cf3 Fix rust-exp handling in makefile
I noticed that the rust-exp handling in the Makefile differed from
that of other .y files.  I believe I noticed this by seeing a stray
"rm" in the build log.

This patch changes the Makefile to bring the rust-exp handling in line
with that of other .y files.

2016-06-10  Tom Tromey  <tom@tromey.com>

	* Makefile.in (COMMON_OBS): Remove rust-exp.o.
	(YYFILES): Add rust-exp.c.
	(YYOBJ): Add rust-exp.o.
	(local-maintainer-clean): Remove rust-exp.c.
2016-06-10 09:57:08 -06:00
Andreas Krebbel b2cc3f6fc2 S/390: Dump unknown instructions according to their length.
Unknown instructions are currently just dumped as .long 1234.  On
S/390 we can do a bit better since the instruction length is encoded
in the opcode.  That way also unknown instructions can be skipped
according to their real length.  That way we can continue correctly
after that instruction.  However, there are also some drawbacks with
that behavior when dumping data.  So for now that behavior is only
enabled for text section but even there it might mess things up when
having a literal pool embedded in the code.  Therefore I've left the
feature disabled by default and have added the -Minsnlength option to
enable it explicitely.

opcodes/ChangeLog:

2016-06-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* s390-dis.c (option_use_insn_len_bits_p): New file scope
	variable.
	(init_disasm): Handle new command line option "insnlength".
	(print_s390_disassembler_options): Mention new option in help
	output.
	(print_insn_s390): Use the encoded insn length when dumping
	unknown instructions.
2016-06-10 13:41:42 +02:00
Bernhard Heckel 5e13cf2543 Fortran: Testsuite, non-local references in nested functions.
Non-local references in nested functions are usually implemented
by using DWARF static link. This feature was added
with commit 63e43d3aed
(DWARF: handle non-local references in nested functions) but
a testcase was missing in Fortran.

2016-06-10  Bernhard Heckel  <bernhard.heckel@intel.com>

gdb/Testsuite/Changelog:
	* gdb.fortran/nested-funcs.exp: New.
	* gdb.fortran/nested-funcs.f90:	New.
2016-06-10 11:16:49 +02:00
Toshihito Kikuchi bb556f1fac
Add negative repeat count to 'x' command
This change adds support for specifying a negative repeat count to
all the formats of the 'x' command to examine memory backward.
A new testcase 'examine-backward' is added to cover this new feature.

Here's the example output from the new feature:

<format 'i'>
(gdb) bt
#0  Func1 (n=42, p=0x40432e "hogehoge") at main.cpp:5
#1  0x00000000004041fa in main (argc=1, argv=0x7fffffffdff8) at main.cpp:19
(gdb) x/-4i 0x4041fa
  0x4041e5 <main(int, char**)+11>: mov   %rsi,-0x10(%rbp)
  0x4041e9 <main(int, char**)+15>: lea   0x13e(%rip),%rsi
  0x4041f0 <main(int, char**)+22>: mov   $0x2a,%edi
  0x4041f5 <main(int, char**)+27>: callq 0x404147

<format 'x'>
(gdb) x/-4xw 0x404200
0x4041f0 <main(int, char**)+22>: 0x00002abf 0xff4de800 0x76e8ffff 0xb8ffffff
(gdb) x/-4
0x4041e0 <main(int, char**)+6>:  0x7d8910ec 0x758948fc 0x358d48f0 0x0000013e

gdb/ChangeLog:

	* NEWS: Mention that GDB now supports a negative repeat count in
	the 'x' command.
	* printcmd.c (decode_format): Allow '-' in the parameter
	"string_ptr" to accept a negative repeat count.
	(find_instruction_backward): New function.
	(read_memory_backward): New function.
	(integer_is_zero): New function.
	(find_string_backward): New function.
	(do_examine): Use new functions to examine memory backward.
	(_initialize_printcmd): Mention that 'x' command supports a negative
	repeat count.

gdb/doc/ChangeLog:

	* gdb.texinfo (Examining Memory): Document negative repeat
	count in the 'x' command.

gdb/testsuite/ChangeLog:

	* gdb.base/examine-backward.c: New file.
	* gdb.base/examine-backward.exp: New file.
2016-06-09 22:50:47 -07:00
Toshihito Kikuchi c040f3fb55
Add myself as a write-after-approval GDB maintainer
gdb/ChangeLog:

	* MAINTAINERS (Write After Approval): Add Toshihito Kikuchi.
2016-06-09 22:01:38 -07:00
GDB Administrator 936f2d3c42 Automatic date update in version.in 2016-06-10 00:00:18 +00:00
H.J. Lu cd41072b27 Add missing ChangeLog entries 2016-06-09 16:54:58 -07:00
Tom Tromey 4dee35314b PR python/19819 - remove unused globals from py-xmethods.c
PR python/19819 concerns some unused global variables in
py-xmethods.c.  This patch deletes the unused globals.

Tested by rebuilding.

2016-06-09  Tom Tromey  <tom@tromey.com>

	PR python/19819:
	* python/py-xmethods.c (invoke_method_name)
	(py_get_result_type_method_name, py_invoke_method_name): Remove.
	(gdbpy_initialize_xmethods): Don't initialize
	py_invoke_method_name, py_get_result_type_method_name.
2016-06-09 14:29:21 -06:00
Artemiy Volkov a080d84da0 Fix compilation error in mips.cc with some versions of GCC.
gold/
	* mips.cc (Mips_output_data_got::do_write): Add missing template
	args via typedef.
2016-06-09 11:39:57 -07:00
Denis Chertykov 5c41dbc302 Fix PR 20221 - adjust syms and relocs only if relax shrunk section.
This patch fixes an edge case in linker relaxation that causes symbol
values to be computed incorrectly in the presence of align directives
in input source code.

bfd/
	* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
	and relocs only if shrinking occurred.

ld/
	* testsuite/ld-avr/avr-prop-5.d: New.
	* testsuite/ld-avr/avr-prop-5.s: New.
2016-06-09 19:17:43 +03:00
Denis Chertykov 1857fe72af Print symbol names in comments for LDS/STS disassembly.
This patch adds default data address space origin (0x800000) to the symbol addresses.
when disassemble lds/sts instructions. So that symbol names shall be printed in comments
for lds/sts instructions disassemble.

ld/
	* testsuite/ld-avr/lds-mega.d: New test.
	* testsuite/ld-avr/lds-mega.s: New test source.
	* testsuite/ld-avr/lds-tiny.d: New test.
	* testsuite/ld-avr/lds-tiny.s: New test source.

opcodes/
	* avr-dis.c (avr_operand): Add default data address space origin (0x800000) to the
	address and set as symbol address for LDS/ STS immediate operands.
2016-06-09 19:00:57 +03:00
Jose E. Marchesi 337c570c5f sparc: add missing comment about hyperprivileged register operands
include/ChangeLog:

2016-06-08  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* opcode/sparc.h: Add missing documentation for hyperprivileged
	registers in rd (%) and rs1 ($).
2016-06-09 04:37:07 -07:00
Renlin Li 08d3b0cc99 [AARCH64][GAS] Fix two -Wstack-usage warnings.
Warning triggerd by gcc 5 with -O0 flag.
error: stack usage might be unbounded [-Werror=stack-usage=]

gas/

2016-06-08  Renlin Li  <renlin.li@arm.com>

	* config/tc-aarch64.c (print_operands): Substitute size.
	(output_operand_error_record): Likewise.
2016-06-09 10:08:08 +01:00
GDB Administrator 6b10ba223f Automatic date update in version.in 2016-06-09 00:00:15 +00:00
H.J. Lu ffc89b17f2 i386: Test external function reference without PLT
To call an external function, the direct branch to the PLT entry can be
replaced by an indirect branch via the GOT slot, which is similar to the
first instruction in the PLT slot.  Instead using the PLT slot as function
address, the function address is retrieved from the GOT slot.  The
R_386_GOT32X relocation can be used to compute the address of the symbol’s
GOT entry without base register when PIC is disabled.  In non-PIC
executable,

call/jmp *func@GOT

should be used for indirect branch via the GOT slot and

movl func@GOT, %eax

should be used to load function address.  Unlike PIC case, no register
is needed to access GOT.  If linker determines the function is defined
locally, it converts indirect branch via the GOT slot to direct branch
with a nop prefix and converts load via the GOT slot to load immediate
or lea.

	* testsuite/ld-i386/libno-plt-1b.dd: New file.
	* testsuite/ld-i386/libno-plt-1b.rd: Likewise.
	* testsuite/ld-i386/no-plt-1a.dd: Likewise.
	* testsuite/ld-i386/no-plt-1a.rd: Likewise.
	* testsuite/ld-i386/no-plt-1b.dd: Likewise.
	* testsuite/ld-i386/no-plt-1b.rd: Likewise.
	* testsuite/ld-i386/no-plt-1c.dd: Likewise.
	* testsuite/ld-i386/no-plt-1c.rd: Likewise.
	* testsuite/ld-i386/no-plt-1d.dd: Likewise.
	* testsuite/ld-i386/no-plt-1d.rd: Likewise.
	* testsuite/ld-i386/no-plt-1e.dd: Likewise.
	* testsuite/ld-i386/no-plt-1e.rd: Likewise.
	* testsuite/ld-i386/no-plt-1f.dd: Likewise.
	* testsuite/ld-i386/no-plt-1f.rd: Likewise.
	* testsuite/ld-i386/no-plt-1g.dd: Likewise.
	* testsuite/ld-i386/no-plt-1g.rd: Likewise.
	* testsuite/ld-i386/no-plt-1h.dd: Likewise.
	* testsuite/ld-i386/no-plt-1h.rd: Likewise.
	* testsuite/ld-i386/no-plt-1i.dd: Likewise.
	* testsuite/ld-i386/no-plt-1i.rd: Likewise.
	* testsuite/ld-i386/no-plt-1j.dd: Likewise.
	* testsuite/ld-i386/no-plt-1j.rd: Likewise.
	* testsuite/ld-i386/no-plt-check1a.S: Likewise.
	* testsuite/ld-i386/no-plt-check1b.S: Likewise.
	* testsuite/ld-i386/no-plt-extern1a.S: Likewise.
	* testsuite/ld-i386/no-plt-extern1b.S: Likewise.
	* testsuite/ld-i386/no-plt-func1.c: Likewise.
	* testsuite/ld-i386/no-plt-main1.c: Likewise.
	* testsuite/ld-i386/no-plt.exp: Likewise.
2016-06-08 12:41:50 -07:00
H.J. Lu dcc03cb366 Update test name
* testsuite/ld-x86-64/tls.exp (run_cc_link_tests): Update test
	name.
2016-06-08 12:27:32 -07:00
H.J. Lu 6eaa7fb59b Support i386 TLS code sequences without PLT
We can generate i386 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:

call *___tls_get_addr@GOT(%reg)

where EBX register isn't required as GOT base, instead of direct call:

call ___tls_get_addr[@PLT]

which requires EBX register as GOT base.

Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.

For general dynamic model, 7-byte lea instruction before call instruction
is replaced by 6-byte one to make room for indirect call.  For local
dynamic model, we simply use 5-byte indirect call.

TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
a 6-byte lea instruction as nop, instead of a 1-byte nop plus a 4-byte
lea instruction.  Since linker may convert

call ___tls_get_addr[@PLT]

to

addr32 call ____tls_get_addr

when producing static executable, both patterns are recognized.

bfd/

	* elf64-i386.c (elf_i386_link_hash_entry): Add tls_get_addr.
	(elf_i386_link_hash_newfunc): Initialize tls_get_addr to 2.
	(elf_i386_check_tls_transition): Check indirect call and direct
	call with the addr32 prefix for general and local dynamic models.
	Set the tls_get_addr feild.
	(elf_i386_convert_load_reloc): Always use addr32 prefix for
	indirect ___tls_get_addr call via GOT.
	(elf_i386_relocate_section): Handle GD->LE, GD->IE and LD->LE
	transitions with indirect call and direct call with the addr32
	prefix.

ld/

	* testsuite/ld-i386/i386.exp: Run libtlspic2.so, tlsbin2,
	tlsgd3, tlsld2, tlsgd4, tlspie3a, tlspie3b and tlspie3c.
	* testsuite/ld-i386/pass.out: New file.
	* testsuite/ld-i386/tls-def1.c: Likewise.
	* testsuite/ld-i386/tls-gd1.S: Likewise.
	* testsuite/ld-i386/tls-ld1.S: Likewise.
	* testsuite/ld-i386/tls-main1.c: Likewise.
	* testsuite/ld-i386/tls.exp: Likewise.
	* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsbin2.dd: Likewise.
	* testsuite/ld-i386/tlsbin2.rd: Likewise.
	* testsuite/ld-i386/tlsbin2.sd: Likewise.
	* testsuite/ld-i386/tlsbin2.td: Likewise.
	* testsuite/ld-i386/tlsbinpic2.s: Likewise.
	* testsuite/ld-i386/tlsgd3.dd: Likewise.
	* testsuite/ld-i386/tlsgd3.s: Likewise.
	* testsuite/ld-i386/tlsgd4.d: Likewise.
	* testsuite/ld-i386/tlsgd4.s: Likewise.
	* testsuite/ld-i386/tlsld2.s: Likewise.
	* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
	* testsuite/ld-i386/tlspic2.dd: Likewise.
	* testsuite/ld-i386/tlspic2.rd: Likewise.
	* testsuite/ld-i386/tlspic2.sd: Likewise.
	* testsuite/ld-i386/tlspic2.td: Likewise.
	* testsuite/ld-i386/tlspic3.s: Likewise.
	* testsuite/ld-i386/tlspie3.s: Likewise.
	* testsuite/ld-i386/tlspie3a.d: Likewise.
	* testsuite/ld-i386/tlspie3b.d: Likewise.
	* testsuite/ld-i386/tlspie3c.d: Likewise.
2016-06-08 12:01:50 -07:00
H.J. Lu 010bc3ce6c Support any relocation order
* testsuite/ld-x86-64/no-plt-1a.rd: Support any relocation order.
	* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
	* testsuite/ld-x86-64/no-plt.exp: Fix a typo.
2016-06-08 10:10:56 -07:00
H.J. Lu 1f26b7ae33 Add missing ChangeLog entries 2016-06-08 07:47:07 -07:00
H.J. Lu d9aee8d5f7 X86-64: Test external function reference without PLT
To call an external function, the direct branch to the PLT entry can be
replaced by an indirect branch via the GOT slot, which is similar to the
first instruction in the PLT slot.  Instead using the PLT slot as function
address, the function address is retrieved from the GOT slot.  If linker
determines the function is defined locally, it converts indirect branch
via the GOT slot to direct branch with a nop prefix and converts load via
the GOT slot to load immediate or lea,

	* testsuite/ld-x86-64/libno-plt-1b.dd: Likewise.
	* testsuite/ld-x86-64/libno-plt-1b.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1a.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1a.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1b.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1b.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1c.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1c.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1d.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1d.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1e.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1e.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1f.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1f.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-1g.dd: Likewise.
	* testsuite/ld-x86-64/no-plt-1g.rd: Likewise.
	* testsuite/ld-x86-64/no-plt-check1.S: Likewise.
	* testsuite/ld-x86-64/no-plt.exp: Likewise.
	* testsuite/ld-x86-64/no-plt-extern1.S: Likewise.
	* testsuite/ld-x86-64/no-plt-func1.c: Likewise.
	* testsuite/ld-x86-64/no-plt-main1.c: Likewise.
2016-06-08 05:57:18 -07:00
GDB Administrator 33c2b983b4 Automatic date update in version.in 2016-06-08 00:00:19 +00:00
Marcin Kościelnicki 3b67f09464 bfd/s390: Misc minor fixes.
The only non-comment fix here is in the code writing out the 3 fixed
.got.plt entries - it mistakenly put a 64-bit 0 at offsets 8 and 12
instead of 8 and 16.

bfd/ChangeLog:

	* elf32-s390.c (elf_s390_finish_dynamic_symbol): Fix comment.
	* elf64-s390.c (elf_s390x_plt_entry): Fix comment.
	(elf_s390_relocate_section): Fix comment.
	(elf_s390_finish_dynamic_sections): Fix initialization of fixed
	.got.plt entries.
2016-06-07 18:14:15 +02:00
Simon Marchi 1aec0b6ad6 mi/mi-interp.c: Add missing braces
gdb/ChangeLog:

	* mi/mi-interp.c (mi_record_changed): Add missing braces.
2016-06-07 11:46:25 -04:00
Maciej W. Rozycki 1133012c60 ld/testsuite/ld-elf/init-fini-arrays.d: Remove `ft32-*-*' xfail
Revert the addition of `ft32-*-*' to this test case made with commit
d1f70bdcab ("Fix lots of linker testsuite failures for the FT32
target.") as this case scores an XPASS now.

	ld/
	* testsuite/ld-elf/init-fini-arrays.d: Remove `ft32-*-*' xfail.
2016-06-07 16:05:49 +01:00
Andreas Krebbel 161db27905 Fix PLT first entry GOT operand calculation.
Embedding the .plt section in another revealed a bug in the way the
larl operand of the first magic plt entry is being calculated.  Fixed
with the attached patch.

bfd/ChangeLog:

	* elf64-s390.c (elf_s390_finish_dynamic_sections): Subtract plt
	section offset when calculation the larl operand in the first PLT
	entry.

ld/ChangeLog:

	* testsuite/ld-s390/pltoffset-1.dd: New test.
	* testsuite/ld-s390/pltoffset-1.ld: New test.
	* testsuite/ld-s390/pltoffset-1.s: New test.
	* testsuite/ld-s390/s390.exp: Run new test.
2016-06-07 16:47:10 +02:00
Alan Modra 14b57c7c6a PowerPC VLE
VLE is an encoding, not a particular processor architecture, so it
isn't really proper to select insns based on PPC_OPCODE_VLE.  For
example
{"evaddw",  VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
shows two insns that have the same encoding, both available with VLE.
Enabling both with VLE means we can't disassemble the second variant
even if -Maltivec is given rather than -Mspe.  Also, we don't check
user assembly against the processor type as well as we could.

Another problem is that when using the VLE encoding, insns from the
main ppc opcode table are not available, except those using opcode 4
and 31.  Correcting this revealed two errors in the ld testsuite,
use of "nop" and "rfmci" when -mvle.

This patch fixes those problems in the opcode table, and removes
PPCNONE.  I find a plain 0 distracts less from other values.

In addition, I've implemented code to recognize some machine values
from the apuinfo note present in ppc32 objects.  It's not a complete
disambiguation since we're lacking info to detect newer chips, but
what we have should help with disassembly.

include/
	* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
	PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
	PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
	PPC_APUINFO_VLE: Define.
opcodes/
	* ppc-dis.c (ppc_opts): Delete extraneous parentheses.  Default
	cpu for "vle" to e500.
	* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
	(PPCNONE): Delete, substitute throughout.
	(powerpc_opcodes): Remove PPCVLE from "flags".  Add to "deprecated"
	except for major opcode 4 and 31.
	(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
bfd/
	* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
	to match other 32-bit archs.
	* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
	(ppc_elf_object_p): Call it.
	(ppc_elf_special_sections): Use APUINFO_SECTION_NAME.  Fix
	overlong line.
	(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
	* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
	* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
	_bfd_elf_ppc_at_tprel_transform): Move to..
	* elf-bfd.h: ..here.
	(_bfd_elf_ppc_set_arch): Declare.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
	PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
	PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
	(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
	by vle_opcodes, and that vle flag doesn't enable opcodes.  Don't
	add vle_opcodes twice.
	(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
ld/
	* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
	* testsuite/ld-powerpc/apuinfo-vle2.s: New.
	* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
2016-06-07 22:04:38 +09:30
Bernhard Heckel 2091da296f Frame static link: Handle null pointer.
2016-06-07  Bernhard Heckel  <bernhard.heckel@intel.com>

gdb/Changelog:
	* findvar.c (follow_static_link): Check for valid pointer.
2016-06-07 13:36:05 +02:00
Matthew Wahab 4d1464f294 [ARM] Add command line option for RAS extension.
This patch adds the architecture extension "+ras" to enable RAS
support. It is enabled by default for -march=armv8.2-a and available but
disabled by default for armv8-a and armv8.1-a.

gas/
	* config/tc-arm.c (arm_ext_v8_2): Rename to arm_ext_ras.
	(arm_ext_ras): Renamed from arm_ext_v8_2.
	(insns): Update for arm_ext_v8_2 renaming.
	(arm_extensions): Add "ras".
	* doc/c-arm.texi (ARM Options): Add an entry for "ras".
	* testsuite/gas/arm/armv8-a+ras.d: New.
	* testsuite/gas/arm/armv8_2-a.d: Add explicit command line
	options.

include/
	* opcode/arm.h (ARM_EXT2_RAS): New.  Also align preceding
	entries.
	(ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.

opcodes/
	* arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
	ARM_EXT_RAS in relevant entries.
2016-06-07 09:56:42 +01:00
GDB Administrator e5f5f1fc49 Automatic date update in version.in 2016-06-07 00:00:16 +00:00
Simon Marchi 38b022b445 Add method/format information to =record-started
Eclipse CDT now supports enabling execution recording using two methods
(full and btrace) and both formats for btrace (bts and pt).  In the
event that recording is enabled behind the back of the GUI (by the user
on the command line, or a script), we need to know which method/format
are being used, so it can be correctly reflected in the interface.  This
patch adds this information to the =record-started async record.

Before:

  =record-started,thread-group="i1"

After:

  =record-started,thread-group="i1",method="btrace",format="bts"
  =record-started,thread-group="i1",method="btrace",format="pt"
  =record-started,thread-group="i1",method="full"

The "format" field is only present when the current method supports
multiple formats (only the btrace method as of now).

gdb/ChangeLog:

	* NEWS: Mention the new fields in =record-started.
	* common/btrace-common.h (btrace_format_short_string): New function
	declaration.
	* common/btrace-common.c (btrace_format_short_string): New
	function.
	* mi/mi-interp.c (mi_record_changed): Output method and format
	fields in the =record-started record.
	* record-btrace.c (record_btrace_open): Adapt record_changed
	notification.
	* record-full.c (record_full_open): Likewise.
	* record.c (cmd_record_stop): Likewise.

gdb/doc/ChangeLog:

	* gdb.texinfo (GDB/MI Async Records): Document method and
	format fields in =record-started.
	* observer.texi (record_changed): Add method and format
	parameters.

gdb/testsuite/ChangeLog:

	* gdb.mi/mi-record-changed.exp: Adjust =record-started output
	matching.
2016-06-06 17:10:18 -04:00
H.J. Lu e2cbcd9156 Support x86-64 TLS code sequences without PLT
We can generate x86-64 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:

call *__tls_get_addr@GOTPCREL(%rip)

instead of direct call:

call __tls_get_addr[@PLT]

Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.

For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call.  For local dynamic model, we
simply use 5-byte indirect call.

TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
4 0x66 prefixes, instead of 3, before mov instruction in 64-bit and
generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit.  Since linker may convert

call *__tls_get_addr@GOTPCREL(%rip)

to

addr32 call __tls_get_addr

when producing static executable, both patterns are recognized.

bfd/

	* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add tls_get_addr.
	(elf_x86_64_link_hash_newfunc): Initialize tls_get_addr to 2.
	(elf_x86_64_check_tls_transition): Check indirect call and
	direct call with the addr32 prefix for general and local dynamic
	models.  Set the tls_get_addr feild.
	(elf_x86_64_convert_load_reloc): Always use addr32 prefix for
	indirect __tls_get_addr call via GOT.
	(elf_x86_64_relocate_section): Handle GD->LE, GD->IE and LD->LE
	transitions with indirect call and direct call with the addr32
	prefix.

ld/

	* testsuite/ld-x86-64/pass.out: New file.
	* testsuite/ld-x86-64/tls-def1.c: Likewise.
	* testsuite/ld-x86-64/tls-gd1.S: Likewise.
	* testsuite/ld-x86-64/tls-ld1.S: Likewise.
	* testsuite/ld-x86-64/tls-main1.c: Likewise.
	* testsuite/ld-x86-64/tls.exp: Likewise.
	* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.dd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.sd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.td: Likewise.
	* testsuite/ld-x86-64/tlsbinpic2.s: Likewise.
	* testsuite/ld-x86-64/tlsgd10.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd10.s: Likewise.
	* testsuite/ld-x86-64/tlsgd11.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd11.s: Likewise.
	* testsuite/ld-x86-64/tlsgd12.d: Likewise.
	* testsuite/ld-x86-64/tlsgd12.s: Likewise.
	* testsuite/ld-x86-64/tlsgd13.d: Likewise.
	* testsuite/ld-x86-64/tlsgd13.s: Likewise.
	* testsuite/ld-x86-64/tlsgd14.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd14.s: Likewise.
	* testsuite/ld-x86-64/tlsgd5c.s: Likewise.
	* testsuite/ld-x86-64/tlsgd6c.s: Likewise.
	* testsuite/ld-x86-64/tlsgd9.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd9.s: Likewise.
	* testsuite/ld-x86-64/tlsld4.dd: Likewise.
	* testsuite/ld-x86-64/tlsld4.s: Likewise.
	* testsuite/ld-x86-64/tlsld5.dd: Likewise.
	* testsuite/ld-x86-64/tlsld5.s: Likewise.
	* testsuite/ld-x86-64/tlsld6.dd: Likewise.
	* testsuite/ld-x86-64/tlsld6.s: Likewise.
	* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlspic2.dd: Likewise.
	* testsuite/ld-x86-64/tlspic2.rd: Likewise.
	* testsuite/ld-x86-64/tlspic2.sd: Likewise.
	* testsuite/ld-x86-64/tlspic2.td: Likewise.
	* testsuite/ld-x86-64/tlspic3.s: Likewise.
	* testsuite/ld-x86-64/tlspie2.s: Likewise.
	* testsuite/ld-x86-64/tlspie2a.d: Likewise.
	* testsuite/ld-x86-64/tlspie2b.d: Likewise.
	* testsuite/ld-x86-64/tlspie2c.d: Likewise.
	* testsuite/ld-x86-64/tlsgd5.dd: Updated.
	* testsuite/ld-x86-64/tlsgd6.dd: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run libtlspic2.so, tlsbin2,
	tlsgd5b, tlsgd6b, tlsld4, tlsld5, tlsld6, tlsgd9, tlsgd10,
	tlsgd11, tlsgd14, tlsgd12, tlsgd13, tlspie2a, tlspie2b and
	tlspie2c.
2016-06-06 11:07:16 -07:00
Christian Groessler 67cb102be0 2016-06-06 Christian Groessler <chris@groessler.org>
* ChangeLog: Fix entry from 2016-06-04.
2016-06-06 09:47:25 +02:00