This patch adds GNU attribute support to m68k and utilises it to tag the
floating-point calling convention used (hard-float or soft-float). It enables
the linker to ensure linked objects use a consistent floating-point ABI and
allows tools like GDB to infer the ABI used from the ELF file. It is based on
similar work done for PowerPC.
bfd/
* elf32-m68k.c (m68k_elf_merge_obj_attributes): New function.
(elf32_m68k_merge_private_bfd_data): Merge GNU attributes.
binutils/
* readelf.c (display_m68k_gnu_attribute): New function.
(process_arch_specific): Call display_m68k_gnu_attribute for EM_68K.
gas/
* config/tc-m68k.c (m68k_elf_gnu_attribute): New function.
(md_pseudo_table): Handle "gnu_attribute".
* doc/as.texi: Document GNU attribute for M68K.
include/
* elf/m68k.h: Add enum for GNU object attribute with floating point
tag name and values.
ld/
* testsuite/ld-m68k/attr-gnu-4-0.s: New file.
* testsuite/ld-m68k/attr-gnu-4-1.s: Likewise.
* testsuite/ld-m68k/attr-gnu-4-2.s: Likewise.
* testsuite/ld-m68k/attr-gnu-4-00.d: Likewise.
* testsuite/ld-m68k/attr-gnu-4-01.d: Likewise.
* testsuite/ld-m68k/attr-gnu-4-02.d: Likewise.
* testsuite/ld-m68k/attr-gnu-4-10.d: Likewise.
* testsuite/ld-m68k/attr-gnu-4-11.d: Likewise.
* testsuite/ld-m68k/attr-gnu-4-12.d: Likewise.
* testsuite/ld-m68k/attr-gnu-4-20.d: Likewise.
* testsuite/ld-m68k/attr-gnu-4-21.d: Likewise.
* testsuite/ld-m68k/attr-gnu-4-22.d: Likewise.
* testsuite/ld-m68k/m68k.exp: Run the new tests.
By the look of it, git commit 39ff0b8123 broke 32-bit host
--enable-targets=all binutils builds.
/usr/local/bin/ld: ../opcodes/.libs/libopcodes.a(riscv-dis.o): in function `parse_riscv_dis_option':
/home/alan/src/binutils-gdb/opcodes/riscv-dis.c:102: undefined reference to `riscv_get_priv_spec_class'
collect2: error: ld returned 1 exit status
Makefile:925: recipe for target 'objdump' failed
The problem is that elfxx-riscv.c is not built for a 32-bit host
without --enable-64-bit-bfd or unless RISCV is given specifically as a
target. No such trimming of 64-bit only targets is done in opcodes.
One solution is to move these support functions to cpu-riscv.c, which
runs into "error: implicit declaration of function ‘xmalloc’". Now,
xmalloc is not supposed to be used in libbfd or libopcodes - it's rude
to crash out of an application that calls libbfd or libopcodes
functions without giving it a chance to deal with out-of-memory
itself. So I removed the xmalloc and instead used a fixed size
buffer. If you are worried about adding 36 bytes for the buffer to
the riscv_get_priv_spec_class_from_numbers stack frame size, then you
have no idea of the likely xmalloc + malloc stack frame size! Trying
to reduce memory usage is commendable, but in this instance
riscv_estimate_digit and malloc for a temp buffer uses a lot more
memory than a fixed max-size buffer.
* elfxx-riscv.c (struct priv_spec_t, priv_specs),
(riscv_get_priv_spec_class, riscv_get_priv_spec_class_from_numbers),
(riscv_get_priv_spec_name): Move to..
* cpu-riscv.c: ..here.
(riscv_get_priv_spec_class_from_numbers): Don't xmalloc temp buffer.
Use %u to print unsigned numbers.
The following GDB behaviour was observed:
(gdb) x/1i 0x0001014a
0x1014a <main+8>: jal 0x10132 <foo>
(gdb) show architecture
The target architecture is set automatically (currently riscv:rv32)
(gdb) set architecture riscv:rv32
The target architecture is assumed to be riscv:rv32
(gdb) x/1i 0x0001014a
0x1014a <main+8>: 0x37e5
(gdb)
Notice that initially we can disassemble the instruction (it's a
compressed jal instruction), but after setting the architecture we can
no longer disassemble the instruction.
This is particularly puzzling as GDB initially thought the
architecture was 'riscv:rv32', but when we force the architecture to
be that, the disassembly stops working.
This issue was introduced with this commit:
commit c35d018b1a
Date: Mon Jan 27 15:19:30 2020 -0800
RISC-V: Fix gdbserver problem with handling arch strings.
In this commit we try to make riscv_scan handle cases where we see
architecture strings like 'riscv:rv32imc' (for example). Normally
this wouldn't match as bfd_default_scan requires an exact match, so we
extended riscv_scan to ignore trailing characters.
Unfortunately the default riscv arch is called 'riscv', is 64-bit,
and has its mach type set to 0, which I think is intended to pair with
code is riscv-dis.c:riscv_disassemble_insn that tries to guess if we
are 32 or 64 bit.
What happens then is that 'riscv:rv32' is first tested against 'riscv'
using bfd_default_scan, this doesn't match, we then compare this to
'riscv', but allowing trailing characters to be ignored, this matches,
and our 'riscv:rv32' matches against the default (64-bit)
architecture.
The solution I propose is to prevent the default architecture from
taking part in this "ignore trailing characters" extra match case,
only the more specific 'riscv:rv32' and 'riscv:rv64' get this extra
matching.
bfd/ChangeLog:
* cpu-riscv.c (riscv_scan): Don't allow shorter matches using the
default architecture.
Dynamic tags, DT_JMPREL, PLTREL and PLTRELSZ, are needed only if there
are relocation entries for PLT. Don't generate them if there are no
relocation entries for PLT.
bfd/
PR ld/26083
* elf32-csky.c (csky_elf_size_dynamic_sections): Call
_bfd_elf_add_dynamic_tags.
ld/
PR ld/26083
* testsuite/ld-csky/tls-ie-v1.d: Updated.
* testsuite/ld-csky/tls-ie.d: Likewise.
Dynamic tags, DT_JMPREL, PLTREL and PLTRELSZ, are needed only if there
are relocation entries for PLT. Don't generate them if there are no
relocation entries for PLT.
bfd/
PR ld/26083
* elf32-cris.c (elf_cris_size_dynamic_sections): Call
_bfd_elf_add_dynamic_tags.
ld/
PR ld/26083
* testsuite/ld-cris/libdso-15b.d: Updated.
* testsuite/ld-cris/libdso-1c.d: Likewise.
* testsuite/ld-cris/libdso-1d.d: Likewise.
* testsuite/ld-cris/libdso-15c.d: New file.
C_OPR_ASH is supposed to be an arithmetic shift. By the look of it,
this operator implemented logical shifts since the original binutils
support was added. This patch corrects that and avoids some nonsense
ubsan complaints. I chose to implement infinite precision shifts
rather than masking shift counts to the word size as the spec I had is
silent on what is supposed to happen with overlarge shift counts.
* vms-alpha.c (_bfd_vms_slurp_etir <ETIR__C_OPR_ASH>): Implement
shifts without undefined behaviour.
bfd
* mach-o.c: Support the new load commands by reading a linkedit data
command for them.
binutils
* od-macho.c: Dump linkedit data for new load commands.
include
* mach-o/loader.h: Add declarations of two new Mach-O load
commands.
We do know some conflicts among different privileged specs. For linker,
the safest approach is that don't allow the object linked with others which
may cause conflicts. But this may cause inconvenience since not all objects
with conflicting priv specs are linked will cause problems. But it is hard
to know the detailed conflict cases for linker, so we probably need a option
to tell linker that we do know there are no conflicts, or we are willing to
take risks to link the objects with conflicted priv specs. But the option
is still under discussion.
Therefore, we can report warnings rather than errors when linking the objects
with conflicted priv specs. This not only makes the linker more flexible,
but also warns people that the conflicts may happen. We also need to update
the output priv spec version once the input priv spec is newer.
bfd/
* elfxx-riscv.c (struct priv_spec_t priv_specs[]): Move them from
opcodes/riscv-opc.c to bfd/elfxx-riscv.c, since we need it in linker.
(riscv_get_priv_spec_class): Likewise.
(riscv_get_priv_spec_name): Likewise.
(riscv_get_priv_spec_class_from_numbers): New function, convert
the version numbers into string, then call riscv_get_priv_spec_class
to get the priv spec class.
* elfxx-riscv.h (riscv_get_priv_spec_class): Move forward declaration
from include/opcode/riscv.h to bfd/elfxx-riscv.h.
(riscv_get_priv_spec_name): Likewise.
(riscv_get_priv_spec_class_from_numbers): New forward declaration.
(opcode/riscv.h): Include it in the header rather than elfxx-riscv.c.
* elfnn-riscv.c (riscv_merge_attributes): Get the priv spec classes
of input and output objects form their priv spec attributes by
riscv_get_priv_spec_class_from_numbers. Report warning rather than
errors when linking objects with differnet priv spec versions. We do
know v1.9.1 may have conflicts to other versions, so report the
warning, too. After that, update the output priv spec version to the
newest one so far.
gas/
* config/tc-riscv.c (buf_size, buf): Remove the unused variables.
(riscv_set_default_priv_spec): Get the priv spec version from the
priv spec attributes by riscv_get_priv_spec_class_from_numbers.
include/
* opcode/riscv.h (riscv_get_priv_spec_class): Move the function
forward declarations to bfd/elfxx-riscv.h.
(riscv_get_priv_spec_name): Likewise.
opcodes/
* riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
* riscv-dis.c: Include elfxx-riscv.h.
ld/
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-01.d: Updated.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-02.d: Updated.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-03.d: Updated.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-04.d: Updated.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-05.d: Updated.
* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-06.d: Updated.
There is no guarantee that the priv attributes should be defined in order.
Therefore, we shouldn't have the order assumption when handling them in the
riscv_merge_attributes. Set priv_attrs_merged to TRUE if we have handled
all of the priv attributes.
bfd/
* elfnn-riscv.c (riscv_merge_attributes): Once we meet one of the
priv attributes, we will check the conflicts for all of them (major,
minor and revision), and then set the priv_attrs_merged to TRUE to
indicate that we have handled all of the priv attributes. Remove
the unused boolean priv_may_conflict, in_priv_zero and out_priv_zero.
I have been looking at a Fedora bug report[1] from a user who was
receiving warning messages from the BFD library about incompatible
plugins. It turns out that they had both 32-bit and 64-bit versions
of the same plugin installed, and the BFD library was attempting to
load all of them.
After thinking about it for a while, it seemed to me that the simplest
solution was to not warn about incompatible plugins whilst attempting
to create a list of viable plugins.
[1]: https://bugzilla.redhat.com/show_bug.cgi?id=1836618
* plugin.c (try_load_plugin): Suppress the error message about
being unable to open a plugin if creating a list of viable
plugins.
2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (XSHAL_ABI, XTHAL_ABI_UNDEFINED)
(XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New macros.
(elf32xtensa_abi): New global variable.
(xtensa_abi_choice): New function.
(elf_xtensa_create_plt_entry): Use xtensa_abi_choice instead of
XSHAL_ABI to select PLT code.
gas/
* config/tc-xtensa.c (XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New
macros.
(elf32xtensa_abi): New declaration.
(option_abi_windowed, option_abi_call0): New enum constants.
(md_longopts): Add entries for --abi-windowed and --abi-call0.
(md_parse_option): Add handlers for --abi-windowed and
--abi-call0.
(xtensa_add_config_info): Use xtensa_abi_choice instead of
XSHAL_ABI to format ABI tag.
* doc/as.texi (Target Xtensa options): Add --abi-windowed and
--abi-call0 to the list of options.
* doc/c-xtensa.texi: Add description for options --abi-windowed
and --abi-call0.
* testsuite/gas/xtensa/abi-call0.d: New test definition.
* testsuite/gas/xtensa/abi-windowed.d: New test definition.
* testsuite/gas/xtensa/abi.s: New test source.
include/
* elf/xtensa.h (xtensa_abi_choice): New declaration.
ld/
* emultempl/xtensaelf.em (XSHAL_ABI): Remove macro definition.
(XTHAL_ABI_UNDEFINED, XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New
macros.
(elf32xtensa_abi): New declaration.
(xt_config_info_unpack_and_check): Set elf32xtensa_abi if it is
undefined. Use xtensa_abi_choice instead of XSHAL_ABI to test
ABI tag consistency.
(xtensa_add_config_info): Use xtensa_abi_choice instead of
XSHAL_ABI to format ABI tag.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_ABI_WINDOWED,
OPTION_ABI_CALL0 and declare elf32xtensa_abi.
(PARSE_AND_LIST_LONGOPTS): Add entries for --abi-windowed and
--abi-call0.
(PARSE_AND_LIST_OPTIONS): Add help text for --abi-windowed and
--abi-call0.
(PARSE_AND_LIST_ARGS_CASES): Add handlers for --abi-windowed and
--abi-call0.
* ld.texi: Add description for options --abi-windowed and
--abi-call0.
The PowerPC PE support is so old and bitrotted that it ought to be
removed. Test results for a cross from x86_64 with no C cross
compiler currently shows 109 fails. I don't think anyone cares about
the target.
This FIXME in bfd/peXXigen.c has been around since 1999, git commit
277d1b5e45:
/* FIXME: This file has various tests of POWERPC_LE_PE. Those tests
worked when the code was in peicode.h, but no longer work now that
the code is in peigen.c. PowerPC NT is said to be dead. If
anybody wants to revive the code, you will have to figure out how
to handle those issues. */
and this one in gas/config/tc-ppc.c since 1995, git commit
cd557d83d6:
* FIXME: I just noticed this. This doesn't work at all really. It it
* setting bits that bfd probably neither understands or uses. The
* correct approach (?) will have to incorporate extra fields attached
* to the section to hold the system specific stuff. (krk)
* config.bfd: Obsolete powerpcle-*-pe targets.
PR 26103
* elflink.c (elf_link_add_archive_symbols): Exclude undefined
symbols that were defined in discarded sections.
* cofflink.c (coff_link_check_archive_element): Likewise.
(coff_link_add_symbols): Set indx to -3 for symbols defined in
discarded sections.
(_bfd_coff_write_global_sym): Don't emit such symbols.
libcoff-in.h (struct coff_link_hash_entry): Update indx comment.
libcoff.h: Regenerate.
Update ia64 ELF backend to set DF_TEXTREL for dynamic relocs against
readonly sections like other backends.
* elfnn-ia64.c (elfNN_ia64_link_hash_table): Remove reltext.
(allocate_dynrel_entries): Set DF_TEXTREL instead of reltext.
(elfNN_ia64_size_dynamic_sections): Check DF_TEXTREL instead
of reltext.
Add ifunc_resolvers to elf_link_hash_table and use it for both x86 and
ppc64. Before glibc commit b5c45e837, DT_TEXTREL is incompatible with
IFUNC resolvers. Set ifunc_resolvers if there are IFUNC resolvers and
issue a warning for IFUNC resolvers with DT_TEXTREL.
bfd/
PR ld/18801
* elf-bfd.h (elf_link_hash_table): Add ifunc_resolvers.
(_bfd_elf_allocate_ifunc_dyn_relocs): Remove the
bfd_boolean * argument. Set ifunc_resolvers if there are IFUNC
resolvers.
* elf-ifunc.c (_bfd_elf_allocate_ifunc_dyn_relocs): Updated.
Set ifunc_resolvers if there are FUNC resolvers.
* elf64-ppc.c (ppc_link_hash_table): Remove local_ifunc_resolver.
(build_global_entry_stubs_and_plt): Replace local_ifunc_resolver
with elf.ifunc_resolvers.
(write_plt_relocs_for_local_syms): Likewise.
(ppc64_elf_relocate_section): Likewise.
(ppc64_elf_finish_dynamic_sections): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
Updated.
* elfxx-x86.c (elf_x86_allocate_dynrelocs): Likewise.
(_bfd_x86_elf_size_dynamic_sections): Check elf.ifunc_resolvers
instead of readonly_dynrelocs_against_ifunc.
* elfxx-x86.h (elf_x86_link_hash_table): Remove
readonly_dynrelocs_against_ifunc.
ld/
PR ld/18801
* testsuite/ld-i386/i386.exp: Run ifunc-textrel-1a,
ifunc-textrel-1b, ifunc-textrel-2a and ifunc-textrel-2b.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/ld-i386/ifunc-textrel-1a.d: Likewise.
* testsuite/ld-i386/ifunc-textrel-1b.d: Likewise.
* testsuite/ld-i386/ifunc-textrel-2a.d: Likewise.
* testsuite/ld-i386/ifunc-textrel-2b.d: Likewise.
* testsuite/ld-x86-64/ifunc-textrel-1.s: Likewise.
* testsuite/ld-x86-64/ifunc-textrel-1a.d: Likewise.
* testsuite/ld-x86-64/ifunc-textrel-1b.d: Likewise.
* testsuite/ld-x86-64/ifunc-textrel-2.s: Likewise.
* testsuite/ld-x86-64/ifunc-textrel-2a.d: Likewise.
* testsuite/ld-x86-64/ifunc-textrel-2b.d: Likewise.
* testsuite/ld-i386/pr18801a.d: Expect warning for IFUNC
resolvers.
* testsuite/ld-i386/pr18801b.d: Likewise.
* estsuite/ld-x86-64/pr18801a.d: Likewise.
* estsuite/ld-x86-64/pr18801b.d: Likewise.
For ppc64 I set flags when recording the dynamic relocation rather
than when allocating space. That allows you to distinguish three
cases:
1) The dynamic ifunc relocation is in an executable and will always be
to an ifunc resolver in the executable.
2) The dynamic ifunc relocation is in a shared library which provides
an ifunc resolver, but that may be overridden at runtime to use a
resolver in another binary.
3) The dynamic ifunc relocation is not to a locally defined ifunc
resolver.
Case (3) won't cause a segfault trying to run resolver code that is
non-exec on older glibc.
I made case (1) an error for ppc64, but since newer glibc ld.so does
allow running ifunc resolvers when segments are writable I suppose I
should downgrade that to a warning like case (2).
* elf64-ppc.c (struct ppc_link_hash_table): Delete
maybe_local_ifunc_resolver field.
(build_global_entry_stubs_and_plt): Set local_ifunc_resolver in
cases where maybe_local_ifunc_resolver was set.
(ppc64_elf_relocate_section): Likewise.
(ppc64_elf_finish_dynamic_sections): Downgrade ifunc with textrel
error to a warning.
All ELF backends with TLS descriptor support have
/* The offset into splt of the PLT entry for the TLS descriptor
resolver. Special values are 0, if not necessary (or not found
to be necessary yet), and -1 if needed but not determined
yet. */
bfd_vma tlsdesc_plt;
/* The GOT offset for the lazy trampoline. Communicated to the
loader via DT_TLSDESC_GOT. The magic value (bfd_vma) -1
indicates an offset is not allocated. */
bfd_vma tlsdesc_got;
in symbol hash entry. Move tlsdesc_plt/tlsdesc_got to elf_link_hash_entry
to reduce code duplication.
* elf-bfd.h (elf_link_hash_entry): Add tlsdesc_plt and
tlsdesc_got.
* elf32-arm.c (elf32_arm_link_hash_table): Remove tlsdesc_plt
and dt_tlsdesc_got.
(elf32_arm_size_dynamic_sections): Updated. Clear
root.tlsdesc_plt for DF_BIND_NOW.
(elf32_arm_finish_dynamic_sections): Updated.
(elf32_arm_output_arch_local_syms): Likewise.
* elf32-nds32.c (nds32_elf_size_dynamic_sections): Updated.
Clear root.tlsdesc_plt for DF_BIND_NOW.
(nds32_elf_finish_dynamic_sections): Updated.
* elf32-nds32.h (elf_nds32_link_hash_table): Remove
dt_tlsdesc_plt and dt_tlsdesc_got.
* elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Updated.
* elfnn-aarch64.c (elf_aarch64_link_hash_table): Remove
tlsdesc_plt and dt_tlsdesc_got.
(elfNN_aarch64_allocate_dynrelocs): Updated.
(elfNN_aarch64_finish_dynamic_sections): Likewise.
(elfNN_aarch64_size_dynamic_sections): Updated. Clear
root.tlsdesc_plt for DF_BIND_NOW. Don't check DF_BIND_NOW
twice.
* elfxx-x86.c (elf_x86_allocate_dynrelocs): Updated.
(_bfd_x86_elf_size_dynamic_sections): Likewise.
(_bfd_x86_elf_finish_dynamic_sections): Likewise.
* elfxx-x86.h (elf_x86_link_hash_table): Remove tlsdesc_plt and
tlsdesc_got.
Get
00000000000007c0 d elf32_tic6x_bed
0000000000000000 d elf32_tic6x_elf_bed
00000000000003e0 d elf32_tic6x_linux_bed
instead of
00000000000007c0 d elf32_bed
0000000000000000 d elf32_tic6x_elf_bed
00000000000003e0 d elf32_tic6x_linux_bed
* elf32-tic6x.c (elf32_bed): Defined the default to
elf32_tic6x_bed.
elf64-hppa should use root.splt and root.srelplt instead of plt_sec and
plt_rel_sec so that elflink.c can see splt and srelplt. This fixed:
FAIL: ld-elf/pr19539
* elf64-hppa.c (elf64_hppa_link_hash_table): Remove plt_sec and
plt_rel_sec.
(elf64_hppa_check_relocs): Replace plt_sec/plt_rel_sec with
root.splt/root.srelplt.
(elf64_hppa_create_dynamic_sections): Likewise.
(elf64_hppa_size_dynamic_sections): Likewise.
(elf64_hppa_finish_dynamic_symbol): Likewise.
(elf_hppa_final_link): Likewise.
(elf_hppa_final_link_relocate): Likewise.
These relocations should have had REL in their names, to reflect the
fact that they are pc-relative. Fix that now by adding _PCREL.
I've added some back-compatibility code to support anyone using
.reloc with the old relocations.
include/
* elf/ppc64.h (elf_ppc64_reloc_type): Rename
R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
bfd/
* reloc.c: Rename
BFD_RELOC_PPC64_GOT_TLSGD34 to BFD_RELOC_PPC64_GOT_TLSGD_PCREL34,
BFD_RELOC_PPC64_GOT_TLSLD34 to BFD_RELOC_PPC64_GOT_TLSLD_PCREL34,
BFD_RELOC_PPC64_GOT_TPREL34 to BFD_RELOC_PPC64_GOT_TPREL_PCREL34,
BFD_RELOC_PPC64_GOT_DTPREL34 to BFD_RELOC_PPC64_GOT_DTPREL_PCREL34.
* elf64-ppc.c: Update throughout for reloc renaming.
(ppc64_elf_reloc_name_lookup): Handle old reloc names.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c: Update throughout for reloc renaming.
elfcpp/
* powerpc.h: Rename
R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
gold/
* powerpc.cc: Update throughout for reloc renaming.
