OpenE2K/binutils-gdb
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8782bfcfc4
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36 Commits

Author SHA1 Message Date
Andrew Cagney
8782bfcfc4 Add -Wnodiscard option so that warning about discarded instructions 
can be suppressed.
Allow ``<insn-spec> { <nmemonic> | <model> }'' in instruction file.
 1997-10-09 08:35:33 +00:00
Felix Lee
8f80453197 * configure.in: i386-windows is a cross, so don't expect 
libiberty to be there.
	* configure: updated.
 1997-09-23 03:48:59 +00:00
Andrew Cagney
4410c4b925 Correctly locate `_' in generated names. 1997-09-19 04:41:01 +00:00
Andrew Cagney
6a4c8f1e29 Change semantic function name to semantic_<INSN>_<FMT> instead of 
semantic_<FMT>_<INSN>.
 1997-09-19 00:50:24 +00:00
Andrew Cagney
3484de0091 Differentiate between a non-zero string and a constant zero field. 1997-09-16 02:14:18 +00:00
Andrew Cagney
0604253676 * igen.c (gen_run_c): Handle non-multi-sim case. 1997-09-15 22:40:14 +00:00
Andrew Cagney
a2ab5e65eb Update to reflect change to sim/common/aclocal.m4 (allow sim/common 
directory to specify its own unqiue config.h file).
 1997-09-15 08:25:04 +00:00
Andrew Cagney
cf5c6e6e5d Generate instruction profile call with each instruction. 1997-09-12 02:26:31 +00:00
Andrew Cagney
8f050205eb (gen_itable_h): Output an enum defining the max size of the itable 
string members.
 1997-09-10 22:07:06 +00:00
Andrew Cagney
687f3f1cef Add multi-sim support to simulator. 1997-09-08 17:40:24 +00:00
Andrew Cagney
9f3f352539 Passify cross compilation and GCC -Wall 1997-09-01 03:21:59 +00:00
Andrew Cagney
0bdfae1167 Clean up formatting of instruction traces. 1997-06-06 00:31:08 +00:00
Andrew Cagney
efe4f1cbf8 Add a simple dissasembler to igen 1997-05-29 07:06:41 +00:00
Andrew Cagney
2f2e6c5d5b Extend xor-endian and per-cpu support in core module. 
Allow negated test when watching value within core.
 1997-05-27 06:48:20 +00:00
Andrew Cagney
cd0d873d0f Preliminary suport for xor-endian suport in core module. 1997-05-23 09:19:43 +00:00
Andrew Cagney
b526378484 Incorrect test for zero-r0 code gen. 1997-05-23 02:01:04 +00:00
Andrew Cagney
37a684b84d o Make tic80 insn file more `cache ready' 
o	Have igen always zero r0 instead of constantly checking if
	the designated register is r0.
 1997-05-16 03:27:40 +00:00
Andrew Cagney
381f42ef5d o Clean-up tic80 fp tracing 
o	Fill in more tic80 insns
 1997-05-07 13:58:52 +00:00
Michael Meissner
7b167b0900 Add semantic tracing to the tic80 1997-05-06 19:27:57 +00:00
Michael Meissner
d0adfefd44 Fix typo; pass trace_line request as arg; pass common stuff in static struct 1997-05-06 11:55:21 +00:00
Michael Meissner
a77241718f Enable --trace-linenum support 1997-05-06 10:21:57 +00:00
Michael Meissner
d23af88239 Fix problems -Wall found 1997-05-05 18:16:10 +00:00
Andrew Cagney
255925e912 Tidy code gen. 1997-04-30 08:39:51 +00:00
Andrew Cagney
abe293a0c6 Enable more instructions. 1997-04-24 12:06:27 +00:00
Andrew Cagney
480e740cc1 More Tic80 instructions. 1997-04-23 13:56:14 +00:00
Andrew Cagney
15c1649391 TIc80 simulator checkpoint - runs 3 instructions - trap, addu, br.a. 1997-04-22 17:46:07 +00:00
David Edelsohn
d4f1c49e78 * igen.c (print_itrace): Use TRACE_FOO_P and trace_printf. 1997-04-17 14:03:16 +00:00
Ian Lance Taylor
c42d511971 * Makefile.in (INSTALL): Set to @INSTALL@. 
(INSTALL_XFORM, INSTALL_XFORM1): Remove.
 1997-04-15 19:20:58 +00:00
David Edelsohn
30bb74eca4 * gen-support.c (gen_support_c): sim-state.h renamed to sim-main.h. 
* gen-idecode.c (gen_idecode_c): Likewise.
	* igen.c (gen_semantics_c): Likewise.
 1997-04-03 02:52:07 +00:00
Andrew Cagney
ac0e48ce6f Correctly validate 64bit instructions 1997-03-17 16:14:47 +00:00
Andrew Cagney
a77aa7ec4b * configure: Re-generate. 
* Make-common.in (CSEARCH): Do not include the gdb directory in
        the search path.
        * Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE,
        SIM_WARNING): Drop, requiring the simulator specific Makefile.in
        to explicitly incorporate these.

        * aclocal.m4 (--enable-sim-alignment); New option. Strongly
        specify the alignment restrictions of the target architecture -
        without this option all alignment restrictions are accomodated.
        (--enable-sim-assert): New option.  Conditionally compile in
        assertion statements.
        (--enable-sim-float): New option. Strongly specify the target's
        floating point support.
        (--enable-sim-hardware): New option.  Specify the hardware devices
        included in the simulation.
        (--enable-sim-packages): New option.  Specify the hardware
        packages included in the simulation.
        (--enable-sim-regparm): New option.  Specify that parameters be
        passed in registers instead of on the stack.
        (--enable-sim-reserved-bits): New option. Specify that reserved
        bits within an instruction are are correctly set.
        (--enable-sim-smp): New option. Specify the level of SMP support
        to be included in the simulator.
        (--enable-sim-stdcall): New option.  Specify an alternative
        function call convention.
        (--enable-sim-xor-endian): New option.  Configure xor-endian
        support used by some targets to implement bi-endian support.
 1997-03-17 15:29:29 +00:00
Andrew Cagney
f3120217c8 Update names 1997-03-14 16:51:21 +00:00
Andrew Cagney
3df381976f * ld-insn.c (parse_insn_format): Accept '*' as an alternative of 
`/' in bit fields.  `/' denotes a wild bit.
 1997-03-14 02:00:07 +00:00
Andrew Cagney
3bd4dff4ef Loose the bugs file. 1997-03-07 07:34:19 +00:00
Andrew Cagney
978a4d8b93 The remainder of igen taken from the PowerPC simulator directory. 1997-02-21 02:50:27 +00:00
Andrew Cagney
a4c97499d9 Instruction decode generator taken from the PowerPC simulator 
and being made more generic.
 1997-02-21 02:49:21 +00:00