Commit Graph

4 Commits

Author SHA1 Message Date
Joel Brobecker 61baf725ec update copyright year range in GDB files
This applies the second part of GDB's End of Year Procedure, which
updates the copyright year range in all of GDB's files.

gdb/ChangeLog:

        Update copyright year range in all GDB files.
2017-01-01 10:52:34 +04:00
Nick Clifton 5ab6d79e70 More AArch64 simulator improvements.
* cpustate.c (aarch64_get_FP_half): New function.  Read a vector
	register as a half precision floating point number.
	(aarch64_set_FP_half): New function.  Similar, but for setting
	a half precision register.
	(aarch64_get_thread_id): New function.  Returns the value of the
	CPU's TPIDR register.
	(aarch64_get_FPCR): New function.  Returns the value of the CPU's
	floating point control register.
	(aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
	register.
	* cpustate.h: Add prototypes for new functions.
	* sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
	* memory.c: Use unaligned core access functions for all memory
	reads and writes.
	* simulator.c (HALT_NYI): Generate an error message if tracing
	will not tell the user why the simulator is halting.
	(HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
	(INSTR): New time-saver macro.
	(fldrb_abs): New function.  Loads an 8-bit value using a scaled
	offset.
	(fldrh_abs): New function.  Likewise for 16-bit values.
	(do_vec_SSHL): Allow for negative shift values.
	(do_vec_USHL): Likewise.
	(do_vec_SHL): Correct computation of shift amount.
	(do_vec_SSHR_USHR): Correct decision of signed vs unsigned
	shifts and computation of shift value.
	(clz): New function.  Counts leading zero bits.
	(do_vec_CLZ): New function.  Implements CLZ (vector).
	(do_vec_MOV_element): Call do_vec_CLZ.
	(dexSimpleFPCondCompare): Implement.
	(do_FCVT_half_to_single): New function.  Implements one of the
	FCVT operations.
	(do_FCVT_half_to_double): New function.  Likewise.
	(do_FCVT_single_to_half): New function.  Likewise.
	(do_FCVT_double_to_half): New function.  Likewise.
	(dexSimpleFPDataProc1Source): Call new FCVT functions.
	(do_scalar_SHL): Handle negative shifts.
	(do_scalar_shift): Handle SSHR.
	(do_scalar_USHL): New function.
	(do_double_add): Simplify to just performing a double precision
	add operation.  Move remaining code into...
	(do_scalar_vec): ... New function.
	(dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
	functions.
	(system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
	registers.
	(system_set): New function.
	(do_MSR_immediate): New function.  Stub for now.
	(do_MSR_reg): New function.  Likewise. Partially implements MSR
	instruction.
	(do_SYS): New function.  Stub for now,
	(dexSystem): Call new functions.
2016-03-23 17:37:30 +00:00
Joel Brobecker 618f726fcb GDB copyright headers update after running GDB's copyright.py script.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2016-01-01 08:43:22 +04:00
Nick Clifton 2e8cf49e13 Add an AArch64 simulator to GDB.
sim	* configure.tgt: Add aarch64 entry.
	* configure: Regenerate.
	* sim/aarch64/configure.ac: New configure template.
	* sim/aarch64/aclocal.m4: Generate.
	* sim/aarch64/config.in: Generate.
	* sim/aarch64/configure: Generate.
	* sim/aarch64/cpustate.c: New file - functions for accessing
	AArch64 registers.
	* sim/aarch64/cpustate.h: New header.
	* sim/aarch64/decode.h: New header.
	* sim/aarch64/interp.c: New file - interface between GDB and
	simulator.
	* sim/aarch64/Makefile.in: New makefile template.
	* sim/aarch64/memory.c: New file - functions for simulating
	aarch64 memory accesses.
	* sim/aarch64/memory.h: New header.
	* sim/aarch64/sim-main.h: New header.
	* sim/aarch64/simulator.c: New file - aarch64 simulator
	functions.
	* sim/aarch64/simulator.h: New header.

include/gdb * sim-aarch64.h: New file.

sim/test * configure: Regenerate.
	* sim/aarch64: New directory.
2015-11-24 08:47:59 +00:00