All programs in binutils+gdb git repo now support gABI compression
with the SHF_COMPRESSED bit. This patch makes the zlib-gabi option
as compression default for gas, gold, ld and objcopy, instead of the
zlib-gnu option whose outputs are incompatible with gABI.
binutils/
* objcopy.c (copy_file): Set BFD_COMPRESS_GABI if not
zlib-gnu.
* doc/binutils.texi: Change --compress-debug-sections and
--compress-debug-sections=zlib to zlib-gabi.
binutils/testsuite/
* binutils-all/compress.exp: Update.
gas/
* as.c (parse_args): Make --compress-debug-sections and
--compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* doc/as.texinfo: Change --compress-debug-sections and
--compress-debug-sections=zlib to zlib-gabi.
gold/
* compressed_output.cc (Output_compressed_section::set_final_data_size):
Make --compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* testsuite/Makefile.am (flagstest_compress_debug_sections.check):
Expect ".debug_.*" with the SHF_COMPRESSED bit, instead of
".zdebug_".
* testsuite/Makefile.in: Regenerated.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Make
--compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* ld.texinfo: Change --compress-debug-sections=zlib to zlib-gabi.
ld/testsuite/
* ld-elf/zlibbegin.rS: Updated to .debug_.* with the
SHF_COMPRESSED bit.
* ld-elf/zlibnormal.rS: Likewise.
PR ld/18466
* emultempl/pe.em (pe_find_data_imports): Generate an error if a
symbol name is too long to handle.
* emultempl/pep.em (pep_find_data_imports): Likewise.
gas * config/tc-msp430.c (MAX_OP_LEN): Increase to 4096.
(msp430_make_init_symbols): New function.
(msp430_section): Call it.
(msp430_frob_section): Likewise.
ld * emulparams/msp430elf.sh (TEMPLATE_NAME): Change to msp430.
* scripttempl/msp430.sc (.text): Add .lower.text and .either.text.
(.data): Add .lower.data and .either.data.
(.bss): Add .lower.bss and .either.bss.
(.rodata): Add .lower.rodata and .either.rodata.
* emultempl/msp430.em: New file. Implements a new orphan
placement algorithm that divides sections between lower and upper
memory regions.
* Makefile.am (emsp430elf.c): Depend upon msp430.em.
*emsp430X.c): Likewise.
* Makefine.in: Regenerate.
Taking them out showed a bug in the powerpc64 backend with .branch_lt
being removed from output_bfd but not from previously set up segment
section maps. Removing the bfd sections meant their sh_flags (and
practically everything else) remaining zero, ie. not SHF_ALLOC,
triggering complaints about "`.branch_lt' can't be allocated in
segment".
include/elf/
* internal.h (ELF_SECTION_IN_SEGMENT_1): Ensure PT_LOAD and
similar segments only contain alloc sections.
ld/
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation):
Call gld${EMULATION_NAME}_map_segments regardless of need_laying_out.
ld/testsuite/
* ld-powerpc/tocnovar.d: Revert last change.
This patch adds --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]
to ld for ELF targets to support generating compressed DWARF debug
sections. We always generate .zdebug_* section since section names have
been finalized and they can't be changed easily when compression is
being performed.
bfd/
* bfd-in.h (compressed_debug_section_type): New.
* compress.c (bfd_compress_section_contents): Add an argument
for linker write compression and always generate .zdebug_*
section when linking.
(bfd_init_section_compress_status): Pass FALSE to
bfd_compress_section_contents.
(bfd_compress_section): New function.
* elf.c (elf_fake_sections): For linking, set SEC_ELF_COMPRESS
on DWARF debug sections if COMPRESS_DEBUG is set and rename
section if COMPRESS_DEBUG_GABI_ZLIB isn't set.
(assign_file_positions_for_non_load_sections): Set sh_offset
to -1 if SEC_ELF_COMPRESS is set.
(assign_file_positions_except_relocs): Likwise.
(_bfd_elf_assign_file_positions_for_relocs): Renamed to ...
(_bfd_elf_assign_file_positions_for_non_load): This. Change
return time to bfd_boolean. Compress the section if
SEC_ELF_COMPRESS is set.
(_bfd_elf_write_object_contents): Updated.
(_bfd_elf_set_section_contents): Write section contents to
the buffer if SEC_ELF_COMPRESS is set.
* merge.c: Include "elf-bfd.h".
(sec_merge_emit): Add arguments for contents and offset. Write
to contents with offset if contents isn't NULL.
(_bfd_write_merged_section): Write section contents to the
buffer if SEC_ELF_COMPRESS is set. Pass contents and
output_offset to sec_merge_emit.
* elflink.c (bfd_elf_final_link): Allocate the buffer for
output section contents if SEC_ELF_COMPRESS is set.
* section.c (SEC_ELF_COMPRESS): New.
* bfd-in2.h: Regenerated.
gas/
* as.h (compressed_debug_section_type): Removed.
include/
* bfdlink.h (bfd_link_info): Add compress_debug.
ld/
* ld.texinfo: Document --compress-debug-sections=.
* ldmain.c (main): Set BFD_COMPRESS on output_bfd if
COMPRESS_DEBUG is set. Set BFD_COMPRESS_GABI on output_bfd
for COMPRESS_DEBUG_GABI_ZLIB.
* lexsup.c (elf_static_list_options): Add
--compress-debug-sections=.
* emultempl/elf32.em (OPTION_COMPRESS_DEBUG): New.
(xtra_long): Add "compress-debug-sections".
(gld${EMULATION_NAME}_handle_option): Handle
OPTION_COMPRESS_DEBUG.
ld/testsuite/
* ld-elf/compress.exp (build_tests): Add tests for
--compress-debug-sections=.
(run_tests): Likewise.
Add additonal tests for --compress-debug-sections=.
* ld-elf/gabiend.rt: New file.
* ld-elf/gabinormal.rt: Likewise.
* ld-elf/gnubegin.rS: Likewise.
* ld-elf/gnunormal.rS: Likewise.
* ld-elf/zlibbegin.rS: Likewise.
* ld-elf/zlibnormal.rS: Likewise.
This is a linker-only solution to the incompatibility between shared
library protected visibility variables and using .dynbss and copy
relocs for non-PIC access to shared library variables.
bfd/
* elf32-ppc.c (struct ppc_elf_link_hash_entry): Add has_addr16_ha
and has_addr16_lo. Make has_sda_refs a bitfield.
(ppc_elf_check_relocs): Set new flags.
(ppc_elf_link_hash_table_create): Update default_params.
(ppc_elf_adjust_dynamic_symbol): Clear protected_def in cases
where we won't be making .dynbss entries or editing code. Set
params->pic_fixup when we'll edit code for protected var access.
(allocate_dynrelocs): Allocate got entry for edited code and
discard dyn_relocs.
(struct ppc_elf_relax_info): Add picfixup_size.
(ppc_elf_relax_section): Rename struct one_fixup to struct
one_branch_fixup. Rename fixups to branch_fixups. Size space for
pic fixups.
(ppc_elf_relocate_section): Edit non-PIC accessing protected
visibility variables to PIC. Don't emit dyn_relocs for code
we've edited.
* elf32-ppc.h (struct ppc_elf_params): Add pic_fixup.
ld/
* emultempl/ppc32elf.em: Handle --no-pic-fixup.
(params): Init new field.
(ppc_before_allocation): Enable relaxation for pic_fixup.
Some early revisions of the Cortex-A53 have an erratum (843419). The
details of the erratum are quite complex and involve dynamic
conditions. For the purposes of the workaround we have simplified the
static conditions to an ADRP in the last two instructions of a 4KByte
page, followed within four instructions by a load/store dependent on
the ADRP.
This patch adds support to conservatively scan for and workaround
Cortex A53 erratum 843419. There are two different workaround
strategies used. The first is to rewrite ADRP instructions which form
part of an erratum sequence with an ADR instruction. In situations
where the ADR provides insufficient offset the dependent load or store
instruction from the sequence is moved to a stub section and branches
are inserted from the original sequence to the relocated instruction
and back again.
Stub section sizes are rounded up to a multiple of 4096 in order to
ensure that the act of inserting work around stubs does not create
more errata sequences.
Workaround stubs are always inserted into the stub section associated
with the input section containing the erratum sequence. This ensures
that the fully relocated form of the veneered load store instruction
is available at the point in time when the stub section is written.
Older compilers that warn wrongly will just need -Wno-error. No way
am I going to init every single field, then have to edit this code
whenever bfd_link_hash_entry changes. Another option, making the
struct static, isn't very nice since it means larger binaries and
worse code.
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Don't
init ehdr_start_save.
The ehdr_start_save variable does not need to be initialized. However,
not initializing it will trigger a compiler warning when using older
versions of GCC. Self-assignment unfortunately doesn't work for Clang
as Clang has a warning similar to -Winit-self as part of -Wall.
* emultempl/elf32.em (gld*_before_allocation): Zero-initialize
the ehdr_start_save variable.
bfd * elf32-v850.c (v850_set_note): New function. Creates a Renesas
style note entry.
(v850_elf_make_note_section): New function. Creates a note
section.
(v850_elf_create_sections): New function. Create a note section
if one is not already present.
(v850_elf_set_note): New function. Adds a note to a bfd.
(v850_elf_copy_private_bfd_data): New function. Copies V850
notes.
(v850_elf_merge_notes): New function. Merges V850 notes.
(print_v850_note): New function. Displays a V850 note.
(v850_elf_print_notes): New function. Displays all notes attached
to a bfd.
(v850_elf_merge_private_bfd_data): Call v850_elf_merge_notes.
(v850_elf_print_private_bfd_data): Call v850_elf_print_notes.
(v850_elf_fake_sections): Set the type of the V850 note section.
* bfd-in.h (v850_elf_create_sections): Add prototype.
(v850_elf_set_note): Add prototype.
* bfd-in2.h: Regenerate.
binutils* readelf.c (get_machine_flags): Remove deprecated V850 machine
flags.
(get_v850_section_type_name): New function. Handles V850 special
sections.
(get_section_type_name): Add support for V850.
(get_v850_elf_note_type): New function. Returns the name of a
V850 note.
(print_v850_note): New function. Prints a V850 note.
(process_v850_notes): New function. Prints V850 notes.
(process_note_sections): Add support for V850.
binutils/testsute
* binutils-all/objcopy.exp: Skip the strip-10 test for the V850.
gas * config/tc-v850.c (soft_float): New variable.
(v850_data_8): New variable.
(md_show_usage): Add -msoft-float/-mhard-float.
(md_parse_option): Likewise.
(md_begin): Set the default value of soft_float.
(v850_md_end): New function. Creates a note section.
* config/tc-v850.h (md_end): Define.
* doc/c-v850.texi: Document -msoft-float/-mhard-float.
gas/testsuite
* gas/elf/elf.exp: Add special version of the section2 test for
the V850.
* gas/elf/section2.e-v850: New file.
include/elf
* v850.h (EF_RH850_SIMD): Delete deprecated flag.
(EF_RH850_CACHE): Likewise.
(EF_RH850_MMU): Likewise.
(EF_RH850_DATA_ALIGN8): Likewise.
(SHT_RENESAS_IOP): Fix typo in name.
(SHT_RENESAS_INFO): Define.
(V850_NOTE_SECNAME): Define.
(SIZEOF_V850_NOTE): Define.
(V850_NOTE_NAME): Define.
(enum v850_notes): New enum.
(NUM_V850_NOTES): Define.
ld/ChangeLog
2015-02-24 Nick Clifton <nickc@redhat.com>
* Makefile.am (ev850.c): Add dependency upon
$(srcdir)/emultempl/v850elf.em.
(ev850_rh850.c): Likewise.
* Makefile.in: Regenerate.
* emultempl/v850elf.em: New file.
* emulparams/v850.sh (EXTRA_EM_FILE): Define.
* emulparams/v850_rh850.sh (EXTRA_EM_FILE): Define.
* scripttempl/v850.sc: Add .note.renesas section.
* scripttempl/v850_rh850.sc: Likewise.
ld/testsuite
* ld-elf/extract-symbol-1sec.d: Expect to fail on the V850.
Moving .toc out of .got caused us to lose toc sorting and multi-toc
support.
* emultempl/ppc64elf.em (toc_section_name): New var.
(ppc_after_open): Set it.
(ppc_before_allocation): Use it.
(gld${EMULATION_NAME}_after_allocation): Here too.
The changes to reorder sections for better relro protection on powerpc64,
3e2b0f31, 23283c1b, and 5ad18f16, run into a problem with xlc.
xlc -qdatalocal puts global variables into .toc, which means that .toc
must be writable. The simplest way to accomplish this is to edit the
linker script to remove .toc sections from .got on detecting xlc object
files.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add "object_in_toc".
* elf64-ppc.c (ppc64_elf_add_symbol_hook): Assume that global symbols
in .toc indicate xlc compiled code that might require a rw .toc.
ld/
* emulparams/elf64ppc.sh (INITIAL_READWRITE_SECTIONS): Define.
* emultempl/ppc64elf.em (params): Init new field.
(ppc_after_open): New function.
(LDEMUL_AFTER_OPEN): Define.
* ldlang.c (lang_final): Whitespace fix.
ld/testsuite/
* ld-powerpc/tocvar.d, * ld-powerpc/tocvar.s: New test.
* ld-powerpc/tocnovar.d, * ld-powerpc/tocnovar.s: New test.
* ld-powerpc/powerpc.exp: Run tocvar and tocnovar.
If no object files have .eh_frame, but some shared library does, then
ld creates a .eh_frame_hdr section using the shared library bfd. This
is silly since shared library .eh_frame sections don't contribute to
the output .eh_frame and thus no .eh_frame_hdr is needed.
Also, the bfd section list and count is cleared for shared libraries,
and a zero section count used as a flag in lang_check to omit a call
to bfd_merge_private_bfd_data for shared libraries. If we create a
section on a shared lib bfd then ld will wrongly attempt to merge the
shared library private bfd data.
PR 17742
* ld/emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Exclude
shared libraries in loop looking for .eh_frame sections.
Similarly for build-id loop.
The AVR target has an elf header flag to indicate if an object was
assembler ready for linker relaxation. If a partial link is performed
then it is important that the link-relax flag in the output object is
set correctly, otherwise, during the final link, we might try to perform
linker relaxation on code that was not assembled suitably.
As the link-relax elf header covers the entire object file we must be
conservative when setting the flag in the output object, so, for a
partial link, any input object that does not have the link-relax flag
set will cause the output object to also not have the link-relax flag
set.
This conservative approach could be softened in future, we only need to
disable the link relax flag if an input file is not marked link-relax
ready, and the input file contains a relaxable section. However, I've
left this optimisation for a later day.
For the final link I've overloaded the use of the link-relax elf header
flag, in a final executable, the flag now indicates if the executable
was built with linker relaxation on or not.
ld/ChangeLog:
* emultempl/avrelf.em: Add include of elf/avr.h.
(avr_finish): New function.
(LDEMUL_FINISH): Added.
ld/testsuite/ChangeLog:
* ld-avr/relax-elf-flags-01.d: New file.
* ld-avr/relax-elf-flags-02.d: New file.
* ld-avr/relax-elf-flags-03.d: New file.
* ld-avr/relax-elf-flags-04.d: New file.
* ld-avr/relax-elf-flags-05.d: New file.
* ld-avr/relax-elf-flags-06.d: New file.
* ld-avr/relax-elf-flags-07.d: New file.
* ld-avr/relax-elf-flags-08.d: New file.
* ld-avr/relax-elf-flags-a.s: New file.
* ld-avr/relax-elf-flags-b.s: New file.
Alignment of plt stubs was broken, firstly because the option was
being dropped due to the alignment value not being set in the "params"
struct used in elf64-ppc.c, and secondly due to not calculating the
number of alignment boundary crossings correctly.
bfd/
* elf64-ppc.c (plt_stub_pad): Correct.
ld/
* ld.texinfo: Correct --plt-align documentation.
* emultempl/ppc64elf.em (plt_stub_align): Delete. Use and set
params.plt_stub_align instead.
2014-10-22 Tejas Belagod <tejas.belagod@arm.com>
bfd/
* bfd-in.h (bfd_elf64_aarch64_set_options): Add a parameter.
* bfd-in2.h (bfd_elf64_aarch64_set_options): Likewise.
* elfnn-aarch64.c (aarch64_erratum_835769_stub): New.
(elf_aarch64_stub_type): Add new type
aarch64_stub_erratum_835769_veneer.
(elf_aarch64_stub_hash_entry): New fields for erratum 835769.
(aarch64_erratum_835769_fix): New data struct to record erratum
835769.
(elf_aarch64_link_hash_table: Global flags for 835769.
(aarch64_build_one_stub): Add case for 835769.
(aarch64_size_one_stub): Likewise.
(aarch64_mem_op_p, aarch64_mlxl_p,
aarch64_erratum_sequence,erratum_835769_scan):
New. Decode and scan functions for erratum 835769.
(elf_aarch64_create_or_find_stub_sec): New.
(elfNN_aarch64_size_stubs): Look for erratum 835769 and record
them.
(bfd_elfNN_aarch64_set_options: Set global flag for 835769.
(erratum_835769_branch_to_stub_data,
make_branch_to_erratum_835769_stub):New. Connect up all the
erratum stubs to occurances by branches.
(elfNN_aarch64_write_section): New hook.
(aarch64_map_one_stub): Output erratum stub symbol.
(elfNN_aarch64_size_dynamic_sections): Init mapping symbol
information for erratum 835769.
(elf_backend_write_section): Define.
ld/
* emultempl/aarch64elf.em: Add command-line option for erratum
835769.
ld/testsuite/
* ld-aarch64/aarch64-elf.exp (aarch64elftests): Drive erratum
835769 tests.
* ld-aarch64/erratum835769.d: New.
* ld-aarch64/erratum835769.s: New.
For binary ouput, we don't have an ELF bfd output so can't access
elf_elfheader. The elf64-ppc.c changes are really just a tidy,
triggered by looking at all places where the abiversion bits are
accessed.
bfd/
* elf64-ppc.c (ppc64_elf_before_check_relocs): Do .opd processing
even when output is not ppc64 ELF. Remove redundant tests on
type of input bfd.
ld/
PR 17488
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Don't attempt
to access ELF header e_flags when not ppc64 ELF output.
Refactor each relaxation pattern to raise the maintainability.
In origin, all patterns is analysed in nds32_elf_relax_section,
so it is hard to debug and maintain. Therefore, we classify all
patterns into different functions in this patch.
Moreover, we adjust all optimizations into nds32_elf_relax_section
to take these optimizations in turn. This can promise all relaxation
being done after calling gld${EMULATION_NAME}_after_allocation.
The section name used to store the build-id on pe/coff is arbitrary, as it's
contents should be located using the pe/coff header's DataDirectory debug data
entry, not by using the section name.
But '.build-id' is not a good choice for that section name, as it is 9
characters long, and hence truncated to 8 characters when
--disable-long-section-names is used (which is the default, when producing an
executable with no dwarf debug sections, e.g. using ld --strip-all --build-id)
This truncation then breaks 'objcopy --only-keep-debug', which does use the
section name, due to concerns that keeping an arbitrary section which contains
the debug directory is not sensible.
binutils/ChangeLog
2014-09-01 Jon TURNEY <jon.turney@dronecode.org.uk>
* objcopy.c (is_nondebug_keep_contents_section): Change pe/coff
build-id section name from '.build-id' to '.buildid'.
ld/ChangeLog
2014-09-01 Jon TURNEY <jon.turney@dronecode.org.uk>
* emultempl/pe.em (write_build_id, setup_build_id): Change pe/coff
build-id section name from '.build-id' to '.buildid'.
* emultempl/pep.em (write_build_id, setup_build_id): Ditto.
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
I noticed recently that .eh_frame FDEs generated by the linker for
call stubs and .glink weren't being indexed in .eh_frame_hdr, due to
bfd_elf_discard_info being run before the linker generated .eh_frame
sections were available for parsing. This patch moves code around in
elf64-ppc.c and ppc64elf.em to avoid that problem.
Another problem fixed here is that --gc-sections parses .eh_frame
early, and the existing machinery allows only one go at parsing the
.eh_frame sections. That resulted in the linker generated .eh_frame
CIEs not being merged and no .eh_frame_hdr index entries for those
FDEs. It turns out that all the info from parsing .eh_frame is
attached to the section, so order of parsing isn't important, and
after parsing sec_info_type being set will prevent a section being
parsed again. At least, when parsing doesn't hit an error. So there
isn't really any need for "parsed_eh_frame". "merge_cies" is also
redundant, which means _bfd_elf_{begin,end}_eh_frame_parsing can also
disappear.
bfd/
* elf-bfd.h (struct eh_frame_hdr_info): Delete merge_cies and
parsed_eh_frames.
(_bfd_elf_begin_eh_frame_parsing): Delete.
(_bfd_elf_end_eh_frame_parsing): Delete.
* elf-eh-frame.c (_bfd_elf_begin_eh_frame_parsing): Delete.
(_bfd_elf_end_eh_frame_parsing): Delete.
(_bfd_elf_parse_eh_frame): Don't test parsed_eh_frame. Test
!info->relocatable in place of merge_cies.
* elflink.c (bfd_elf_gc_sections, bfd_elf_discard_info): Adjust.
* elf64-ppc.c (glink_eh_frame_cie): Pad to multiple of 8.
(ppc64_elf_size_stubs): Likewise pad stub FDE.
(ppc64_elf_build_stubs): Move code setting glink .eh_frame to..
(ppc64_elf_size_stubs): ..here and..
(ppc64_elf_finish_dynamic_sections): ..here.
ld/
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation): Call
bfd_elf_discard_info after generating glink .eh_frame. Delete
redundant test on ppc64_elf_setup_section_lists status.
addresses outside of the 32-bit range before memory exhaustion. This
results in a higher entropy implementation of ASLR when used with the
DYNAMIC_BASE flag.
* include/coff/pe.h: Add HIGH_ENTROPY_VA flag
* ld/emultempl/pep.em: Add --high-entropy-va switch
* ld/ld.texinfo: Document the --high-entropy-va switch
Presents .eh_frame input sections to the optimisation machinery in
elf-eh-frame.c in the order they are given by the linker script.
PR 16563
bfd/
* elflink.c (bfd_elf_discard_info): Process .eh_frame and .stab
in the order they are mapped to output sections.
ld/
* ldlang.c (map_head_is_link_order): Rename from
stripped_excluded_sections.
(lang_clear_os_map): New function, extracted from..
(strip_excluded_output_sections): ..here.
* ldlang.h (lang_clear_os_map): Declare.
* ldwrite.c (ldwrite): Call lang_clear_os_map.
* emultempl/sh64elf.em (sh64_elf_${EMULATION_NAME}_after_allocation):
Likewise.
is_inconsistent_linkonce_section makes an assumption that section name
that starts with ".gnu.linkonce.prop." has one more dot in its suffix.
However gas generates such section name by insertion of "prop." right
after ".gnu.linkonce." part of the name of the original section. So, for
section named ".gnu.linkonce.this_module" corresponding property section
name does not satisfy the assumption. Such section names are common in
linux modules. This bug was exposed by the patch "a35d5e8 Fix alignment
for the first section frag on xtensa", that makes gas produce property
section for each section that has ".align" directive in it.
Use suffix that immediately follows ".gnu.linkonce.prop." when there are
no more dots following it.
2014-07-10 Max Filippov <jcmvbkbc@gmail.com>
ld/
* emultempl/xtensaelf.em (is_inconsistent_linkonce_section):
correctly handle missing dot in section name after
".gnu.linkonce.prop.".
The undefined function symbols (with non-zero value) on global entry
stubs are discarded by objdump when disassembling, so give objdump
another symbol to mark the stubs.
Also fixes a couple of bugs:
- entry_section was set to .opd for ELFv2, which meant a hard error
rather than a warning when _start wasn't defined.
- global entry stubs were not built if they were the only type of
stub in an executable.
bfd/
* elf64-ppc.c (ppc_stub_type): Add ppc_stub_global_entry.
(struct ppc_link_hash_table): Increase size of stub_count array.
(build_global_entry_stubs): Emit symbol on global entry stub.
(ppc64_elf_build_stubs): NULL check htab->brlt. Add global entry
stub stats.
ld/
* emultempl/ppc64elf.em (stub_added): Delete.
(gld${EMULATION_NAME}_finish): Call ppc64_elf_build_stubs even when
none of the usual stubs have been added. Only change entry_section
for ELFv1.
inserted. This is for compatibility with other, non-GNU tools. Deterministic
binaries can still be created by using the new --no-insert-timestamp command line
option.
* emultempl/pe.em: Initialise insert_timestamp to true.
Add a --no-insert-timestamp command line option.
* emultempl/pep.em: Likewise.
* ld.texinfo: Document that --insert-timestamp is enabled by
default and that it now has an inverse command line option.
* NEWS: Mention the new behaviour.
1) _SDA_BASE_ and _SDA2_BASE_ and defined automatically, in a similar
manner to the way _GLOBAL_OFFSET_TABLE_ is handled. It's a little
more complicated to remove the symbols because _SDA_BASE_ needs to
be there if either .sdata or .sbss is present, and similarly for
_SDA2_BASE.
2) The linker created .sdata and .sdata2 sections used for
R_PPC_EMB_SDAI16 and R_PPC_EMB_SDA2I16 pointers are created early.
Nowadays we strip unneeded sections from the output, so it isn't
necessary to delay creating the sections.
3) The output section for targets of various SDA relocs is now checked
as per the ABI(s). We previously allowed .sdata.foo and similar,
most likely because at some stage we were checking input sections.
Also, the patch fixes a long-standing bug in size_input_sections
that affects the values of symbols defined in stripped input
sections.
PR 16952
bfd/
* elf32-ppc.c (ppc_elf_create_linker_section): Move earlier.
Remove redundant setting of htab->elf.dynobj. Don't align.
Define .sdata symbols using _bfd_elf_define_linkage_sym.
(ppc_elf_create_glink): Call ppc_elf_create_linker_section.
(create_sdata_sym): Delete.
(elf_allocate_pointer_linker_section): Rename from
elf_create_pointer_linker_section. Align section.
(ppc_elf_check_relocs): Don't call ppc_elf_creat_linker_section
directly here, or create_sdata_sym. Set ref_regular on _SDA_BASE_
and _SDA2_BASE_.
(ppc_elf_size_dynamic_sections): Remove ATTRIBUTE_UNUSED on param.
Remove unnecessary tests on _SDA_BASE_ sym.
(maybe_strip_sdasym, ppc_elf_maybe_strip_sdata_syms): New functions.
(ppc_elf_relocate_section): Tighten SDA reloc symbol section checks.
* elf32-ppc.h (ppc_elf_set_sdata_syms): Delete.
(ppc_elf_maybe_strip_sdata_syms): Declare.
ld/
* emulparams/elf32ppccommon.sh (_SDA_BASE_, _SDA2_BASE_): Delete.
* emultempl/ppc32elf.em (ppc_before_allocation): Call
ppc_elf_maybe_strip_sdata_syms.
* ldlang.c (size_input_section): Correct output_offset value
for excluded input sections.
ld/
* emultempl/alphaelf.em (alpha_after_parse): Enable 2 relax passes.
bfd/
* elf64-alpha.c (elf64_alpha_size_got_sections): New may_merge
parameter; honor it and disable got merging when false.
(elf64_alpha_relax_got_load): Do not relax to GPREL relocs during
the first pass of relaxation.
(elf64_alpha_relax_with_lituse): Likewise. Move relaxed relocs to
the end of the LITERAL+LITUSE chain.
(elf64_alpha_relax_section): Only process LITERAL relocs during the
second pass of relaxation.
I got the ppc476 workaround wrong. bctr (and bctrl) as the last
instruction in a page can hit the icache bug if the preceding mtctr
insn is close by, and the destination is in the first few instructions
on the next page. This scenario can occur with code generated by gcc
to implement switch statements, or in code generated to call by
function pointer.
To prevent the bctr problem it is also necessary to remove other
instructions that otherwise would be safe.
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Remove bctr from list
of safe ppc476 insns at end of page. Also remove non-branch insns.
Expand comments.
ld/
* emultempl/ppc32elf.em (no_zero_padding, ppc_finish): New functions.
(LDEMUL_FINISH): Define.
Alan Modra
H.J. Lu
Nick Clifton
Catherine Moore
Marcus Shawcroft
Ed Schouten
Marcus Shawcroft
Andrew Burgess
Igor Zamyatin
Jiong Wang
Kuan-Lin Chen
Jon TURNEY
Maciej W. Rozycki
Max Filippov
Linda Zhang
DJ Delorie
Richard Henderson
Steve Ellcey