gold/
PR gold/19019
* layout.h (Layout::add_target_specific_dynamic_tag): New function.
* layout.cc (Layout::add_target_specific_dynamic_tag): New function.
* mips.cc (Target_mips::make_symbol): Adjust function signature.
* sparc.cc (Target_sparc::Target_sparc): Initialize register_syms_.
(Target_sparc::do_is_defined_by_abi): Remove test for
STT_SPARC_REGISTER.
(Target_sparc::Register_symbol): New struct type.
(Target_sparc::register_syms_): New data member.
(Target_sparc<64, true>::sparc_info): Set has_make_symbol to true.
(Target_sparc::make_symbol): New function.
(Target_sparc::do_finalize_sections): Add register symbols and new
dynamic table entries.
* symtab.h (Sized_symbol::init_undefined): Add value parameter.
(Symbol_table::add_target_global_symbol): New function.
(Symbol_table::target_symbols_): New data member.
* symtab.cc (Sized_symbol::init_undefined): Add value parameter.
(Symbol_table::Symbol_table): Initialize target_symbols_.
(Symbol_table::add_from_object): Pass additional parameters to
Target::make_symbol.
(Symbol_table::define_special_symbol): Likewise.
(Symbol_table::add_undefined_symbol_from_command_line): Pass 0 for
undefined symbol value.
(Symbol_table::set_dynsym_indexes): Process target-specific symbols.
(Symbol_table::sized_finalize): Likewise.
(Symbol_table::sized_write_globals): Likewise.
* target.h (Sized_target::make_symbol): Add name, st_type, object,
st_shndx, and value parameters.
include/
2016-03-03 Than McIntosh <thanm@google.com>
* plugin-api.h: Add new hooks to the plugin transfer vector to
to support querying section alignment and section size.
(ld_plugin_get_input_section_alignment): New hook.
(ld_plugin_get_input_section_size): New hook.
(ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
and LDPT_GET_INPUT_SECTION_SIZE.
(ld_plugin_tv): Add tv_get_input_section_alignment and
tv_get_input_section_size.
gold/
2016-03-03 Than McIntosh <thanm@google.com>
* plugin.cc (Plugin::load): Include hooks for get_input_section_size
and get_input_section_alignment in transfer vector.
(get_input_section_alignment): New function.
(get_input_section_size): New function.
* testsuite/Makefile.am: Add plugin_layout_with_alignment.sh test.
* testsuite/Makefile.in: [Regenerate.]
* testsuite/plugin_section_alignment.cc: New test file.
* testsuite/plugin_layout_with_alignment.cc: New test file.
* testsuite/plugin_layout_with_alignment.sh: New test file.
Let the plugin know that a file is not being included in the link by
returning LDPS_NO_SYMS from get_symbols().
include/
* plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
gold/
* plugin.h (Pluginobj::get_symbol_resolution_info): Add version
parameter.
* plugin.cc (get_symbols_v3): New function.
(Plugin::load): Add LDPT_GET_SYMBOLS_V3.
(Pluginobj::get_symbol_resolution_info): Return LDPS_NO_SYMS when using
new version.
x86_64_mov_to_lea5.o and x86_64_mov_to_lea6.o must be assembled with
-mrelax-relocations=yes since when assembler is configured with
--disable-x86-relax-relocations, R_X86_64_GOTPCRELX relocation won't
be generated. This linker optimization requires R_X86_64_GOTPCRELX
relocation.
This patch also removed the duplicated x86_64_overflow_pc32.o target.
* testsuite/Makefile.am (x86_64_mov_to_lea5.o): Pass
-mrelax-relocations=yes to $(TEST_AS).
(x86_64_mov_to_lea6.o): Likewise.
(x86_64_overflow_pc32.o): Remove duplicated target.
* testsuite/Makefile.in: Regenerated.
gold/ChangeLog:
* s390.cc (Target_s390::match_view_u): New helper method.
(Target_s390::do_is_call_to_non_split): New method.
(Target_s390::ss_code_st_r14): New const.
(Target_s390::ss_code_l_r14): New const.
(Target_s390::ss_code_bras_8): New const.
(Target_s390::ss_code_l_basr): New const.
(Target_s390::ss_code_a_basr): New const.
(Target_s390::ss_code_ear): New const.
(Target_s390::ss_code_c): New const.
(Target_s390::ss_code_larl): New const.
(Target_s390::ss_code_brasl): New const.
(Target_s390::ss_code_jg): New const.
(Target_s390::ss_code_jgl): New const.
(Target_s390::ss_match_mcount): New helper method.
(Target_s390::ss_match_l): New helper method.
(Target_s390::ss_match_ahi): New helper method.
(Target_s390::ss_match_alfi): New helper method.
(Target_s390::ss_match_cr): New helper method.
(Target_s390::do_calls_non_split): New method.
* testsuite/Makefile.am: Added new tests.
* testsuite/split_s390.sh: New test.
* testsuite/split_s390_1_a1.s: New test.
* testsuite/split_s390_1_a2.s: New test.
* testsuite/split_s390_1_n1.s: New test.
* testsuite/split_s390_1_n2.s: New test.
* testsuite/split_s390_1_z1.s: New test.
* testsuite/split_s390_1_z2.s: New test.
* testsuite/split_s390_1_z3.s: New test.
* testsuite/split_s390_1_z4.s: New test.
* testsuite/split_s390_2_ns.s: New test.
* testsuite/split_s390_2_s.s: New test.
* testsuite/split_s390x_1_a1.s: New test.
* testsuite/split_s390x_1_a2.s: New test.
* testsuite/split_s390x_1_n1.s: New test.
* testsuite/split_s390x_1_n2.s: New test.
* testsuite/split_s390x_1_z1.s: New test.
* testsuite/split_s390x_1_z2.s: New test.
* testsuite/split_s390x_1_z3.s: New test.
* testsuite/split_s390x_1_z4.s: New test.
* testsuite/split_s390x_2_ns.s: New test.
* testsuite/split_s390x_2_s.s: New test.
2016-02-11 Rahul Chaudhry <rahulchaudhry@google.com>
* aarch64.cc (Target_aarch64::scan_erratum_843419_span):
Remove info message for every erratum 843419 found and fixed.
On x32, a pc-relative reference to an undef weak symbol (value 0)
with a negative addend (typically -4) generates a spurious overflow
error because Symbol_value::value() returns a 32-bit negative number
as an unsigned number, which gets zero-extended before subtracting
the PC value. This patch fixes the problem by special-casing the
negative addend, and adding it to the value after widening it to
64 bits. Symbol_value::value() does not need the addend if it's
negative, since it is only important when processing section
symbols for merge sections, where a positive addend provides the
input section offset of the merged constant.
gold/
* x86_64.cc (X86_64_relocate_functions::pcrela32_check): Fix x32
overflow checking when symbol value + addend < 0.
In order to get around the optimizer and newer compiler warnings
about shift counts, the overflow checking code had resorted to
some messy shifting, and with the never-before-seen instantiations
of the template functions, we were still running afoul of the
compiler checks.
This patch replaces those messy shift sequences with a simple
class template that provides the min and max limits for any
bit size up to 64, with a specialization for 64 that prevents
the compiler from complaining.
gold/
PR gold/19577
* reloc.h (Limits): New class.
(Bits::has_overflow32): Use min/max values from Limits.
(Bits::has_unsigned_overflow32): Likewise.
(Bits::has_signed_unsigned_overflow32): Likewise.
(Bits::has_overflow): Likewise.
(Bits::has_unsigned_overflow): Likewise.
(Bits::has_signed_unsigned_overflow64): Likewise.
The problem here is that x32 is really using 64-bit addressing,
while pretending to be 32-bit. Even though the object file format
is 32-bit, we need to do the overflow checking with 64-bit
arithmetic (because that's what the hardware will be using).
This patch overrides the pcrela32_check functions in reloc.h
with target-specific versions that do 64-bit checking.
I've also updated the test case to use -Tdata instead of adding
a huge .space directive, to reduce the size of the .o files.
gold/
PR gold/19567
* reloc.h (Relocate_functions::Overflow_check): Add comments.
* x86_64.cc (X86_64_relocate_functions): New class.
(Target_x86_64::Relocate::relocate): Use the new class.
* testsuite/Makefile.am (x86_64_overflow_pc32): Add -Tdata option.
(x32_overflow_pc32): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/x32_overflow_pc32.sh: New script.
* testsuite/x86_64_overflow_pc32.s: Remove .space directive.
This is needed by s390 split-stack support, to distinguish call
and load-address relocations.
gold/ChangeLog:
* i386.cc (Target_i386::is_call_to_non_split): Add view and view_size
parameters.
* reloc.cc (Sized_relobj_file::split_stack_adjust_reltype): Pass view
and view_size to is_call_to_non_split.
* target.cc (Target::is_call_to_non_split): Add view and view_size
parameters.
* target.h (class Target): Likewise.
* icf.cc (get_rel_addend): New function.
(get_section_contents): Move merge section addend computation to a
new function. Ignore negative values for SHT_REL and SHT_RELA addends.
Fix bug to not read past the length of the section.
Fix bug related to addend computation for MERGE sections.
This tightens the condition under which ld optimizes PIC entry code
to non-PIC.
bfd/
* elf64-ppc.c (ppc64_elf_relocate_section): Further restrict
ELFv2 entry optimization.
gold/
* powerpc.cc (relocate): Further restrict ELFv2 entry optimization.
The stub generated during relaxation uses absolute addressing mode for
shared libraries, which is not correct. Use pc-relative addressing
instead.
gold/ChangeLog:
2016-01-15 Han Shen <shenhan@google.com>
PR gold/19472 - DSOs need pc-relative stubs.
* aarch64.cc (Reloc_stub::stub_type_for_reloc): Return
PC-relative stub type for DSOs and pie executables.
gold/
PR gold/19353
* aarch64.cc (Target_aarch64::relocate_tls): Don't insist that
we have a TLS segment for GD-to-IE optimization.
* i386.cc (Target_i386::tls_gd_to_ie): Remove tls_segment parameter.
Adjust all calls.
(Target_i386::tls_desc_gd_to_ie): Likewise.
(Target_i386::relocate_tls): Don't insist that we have a TLS segment
for TLSDESC GD-to-IE optimizations.
* x86_64.cc (Target_x86_64::tls_gd_to_ie): Remove tls_segment parameter.
Adjust all calls.
(Target_x86_64::tls_desc_gd_to_ie): Likewise.
(Target_x86_64::relocate_tls): Don't insist that we have a TLS segment
for TLSDESC GD-to-IE optimizations.
For MIPS-64, the r_info field in the relocation format is
replaced by several individual fields, including r_sym and
r_type. To enable support for this format, I've refactored
target-independent code to remove almost all uses of the r_info
field. (I've left alone a couple of routines used only for
incremental linking, which I can update if/when the MIPS target
adds support for incremental linking.)
For routines that are already templated on a Classify_reloc class
(namely, gc_process_relocs, relocate_section, and
relocate_relocs), I've extended the Classify_reloc interface to
include sh_type (which no longer needs to be a separate template
parameter) as well as get_r_sym() and get_r_type() methods for
extracting the r_sym and r_type fields. For
scan_relocatable_relocs, I've extended the
Default_scan_relocatable_relocs class by converting it to a class
template with Classify_reloc as a template parameter. For the
remaining routines that need to access r_sym, I've added a
virtual Target::get_r_sym() method with an override for the MIPS
target.
In elfcpp, I've added Mips64_rel, etc., accessor classes and
corresponding internal data structures. The MIPS target uses
these new classes within its own Mips_classify_reloc class.
The Mips64_ accessor classes also expose the r_ssym, r_type2,
and r_type3 fields from the relocation.
These changes should be functionally the same for all but the
MIPS target.
elfcpp/
* elfcpp.h (Mips64_rel, Mips64_rel_write): New classes.
(Mips64_rela, Mips64_rela_write): New classes.
* elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): New structs.
gold/
* gc.h (get_embedded_addend_size): Remove sh_type parameter.
(gc_process_relocs): Remove sh_type template parameter.
Use Classify_reloc to access r_sym, r_type, and r_addend fields.
* object.h (Sized_relobj_file::split_stack_adjust): Add target
parameter.
(Sized_relobj_file::split_stack_adjust_reltype): Likewise.
* reloc-types.h (Reloc_types::copy_reloc_addend): (SHT_REL and SHT_RELA
specializations) Remove.
* reloc.cc (Emit_relocs_strategy): Rename and move to target-reloc.h.
(Sized_relobj_file::emit_relocs_scan): Call Target::emit_relocs_scan().
(Sized_relobj_file::emit_relocs_scan_reltype): Remove.
(Sized_relobj_file::split_stack_adjust): Add target parameter.
Adjust all callers.
(Sized_relobj_file::split_stack_adjust_reltype): Likewise. Call
Target::get_r_sym() to get r_sym field from relocations.
(Track_relocs::next_symndx): Call Target::get_r_sym().
* target-reloc.h (scan_relocs): Remove sh_type template parameter;
add Classify_reloc template parameter. Use for accessing r_sym and
r_type.
(relocate_section): Likewise.
(Default_classify_reloc): New class (renamed and moved from reloc.cc).
(Default_scan_relocatable_relocs): Remove sh_type template parameter.
(Default_scan_relocatable_relocs::Reltype): New typedef.
(Default_scan_relocatable_relocs::reloc_size): New const.
(Default_scan_relocatable_relocs::sh_type): New const.
(Default_scan_relocatable_relocs::get_r_sym): New method.
(Default_scan_relocatable_relocs::get_r_type): New method.
(Default_emit_relocs_strategy): New class.
(scan_relocatable_relocs): Replace sh_type template parameter with
Scan_relocatable_relocs class. Use it to access r_sym and r_type
fields.
(relocate_relocs): Replace sh_type template parameter with
Classify_reloc class. Use it to access r_sym and r_type fields.
* target.h (Target::is_call_to_non_split): Replace r_type parameter
with pointer to relocation. Adjust all callers.
(Target::do_is_call_to_non_split): Likewise.
(Target::emit_relocs_scan): New virtual method.
(Sized_target::get_r_sym): New virtual method.
* target.cc (Target::do_is_call_to_non_split): Replace r_type parameter
with pointer to relocation.
* aarch64.cc (Target_aarch64::emit_relocs_scan): New method.
(Target_aarch64::Relocatable_size_for_reloc): Remove.
(Target_aarch64::gc_process_relocs): Use Default_classify_reloc.
(Target_aarch64::scan_relocs): Likewise.
(Target_aarch64::relocate_section): Likewise.
(Target_aarch64::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_aarch64::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_aarch64::relocate_relocs): Use Default_classify_reloc.
* arm.cc (Target_arm::Arm_scan_relocatable_relocs): Remove sh_type
template parameter.
(Target_arm::emit_relocs_scan): New method.
(Target_arm::Relocatable_size_for_reloc): Replace with...
(Target_arm::Classify_reloc): ...this.
(Target_arm::gc_process_relocs): Use Classify_reloc.
(Target_arm::scan_relocs): Likewise.
(Target_arm::relocate_section): Likewise.
(Target_arm::scan_relocatable_relocs): Likewise.
(Target_arm::relocate_relocs): Likewise.
* i386.cc (Target_i386::emit_relocs_scan): New method.
(Target_i386::Relocatable_size_for_reloc): Replace with...
(Target_i386::Classify_reloc): ...this.
(Target_i386::gc_process_relocs): Use Classify_reloc.
(Target_i386::scan_relocs): Likewise.
(Target_i386::relocate_section): Likewise.
(Target_i386::scan_relocatable_relocs): Likewise.
(Target_i386::relocate_relocs): Likewise.
* mips.cc (Mips_scan_relocatable_relocs): Remove sh_type template
parameter.
(Mips_reloc_types): New class template.
(Mips_classify_reloc): New class template.
(Target_mips::Reltype): New typedef.
(Target_mips::Relatype): New typedef.
(Target_mips::emit_relocs_scan): New method.
(Target_mips::get_r_sym): New method.
(Target_mips::Relocatable_size_for_reloc): Replace with
Mips_classify_reloc.
(Target_mips::copy_reloc): Use Mips_classify_reloc.
(Target_mips::gc_process_relocs): Likewise.
(Target_mips::scan_relocs): Likewise.
(Target_mips::relocate_section): Likewise.
(Target_mips::scan_relocatable_relocs): Likewise.
(Target_mips::relocate_relocs): Likewise.
(mips_get_size_for_reloc): New function, factored out from
Relocatable_size_for_reloc::get_size_for_reloc.
(Target_mips::Scan::local): Use Mips_classify_reloc.
(Target_mips::Scan::global): Likewise.
(Target_mips::Relocate::relocate): Likewise.
* powerpc.cc (Target_powerpc::emit_relocs_scan): New method.
(Target_powerpc::Relocatable_size_for_reloc): Remove.
(Target_powerpc::gc_process_relocs): Use Default_classify_reloc.
(Target_powerpc::scan_relocs): Likewise.
(Target_powerpc::relocate_section): Likewise.
(Powerpc_scan_relocatable_reloc): Convert to class template.
(Powerpc_scan_relocatable_reloc::Reltype): New typedef.
(Powerpc_scan_relocatable_reloc::reloc_size): New const.
(Powerpc_scan_relocatable_reloc::sh_type): New const.
(Powerpc_scan_relocatable_reloc::get_r_sym): New method.
(Powerpc_scan_relocatable_reloc::get_r_type): New method.
(Target_powerpc::scan_relocatable_relocs): Use
Powerpc_scan_relocatable_reloc.
(Target_powerpc::relocate_relocs): Use Default_classify_reloc.
* s390.cc (Target_s390::emit_relocs_scan): New method.
(Target_s390::Relocatable_size_for_reloc): Remove.
(Target_s390::gc_process_relocs): Use Default_classify_reloc.
(Target_s390::scan_relocs): Likewise.
(Target_s390::relocate_section): Likewise.
(Target_s390::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_s390::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_s390::relocate_relocs): Use Default_classify_reloc.
* sparc.cc (Target_sparc::emit_relocs_scan): New method.
(Target_sparc::Relocatable_size_for_reloc): Remove.
(Target_sparc::gc_process_relocs): Use Default_classify_reloc.
(Target_sparc::scan_relocs): Likewise.
(Target_sparc::relocate_section): Likewise.
(Target_sparc::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_sparc::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_sparc::relocate_relocs): Use Default_classify_reloc.
* tilegx.cc (Target_tilegx::emit_relocs_scan): New method.
(Target_tilegx::Relocatable_size_for_reloc): Remove.
(Target_tilegx::gc_process_relocs): Use Default_classify_reloc.
(Target_tilegx::scan_relocs): Likewise.
(Target_tilegx::relocate_section): Likewise.
(Target_tilegx::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_tilegx::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_tilegx::relocate_relocs): Use Default_classify_reloc.
* x86_64.cc (Target_x86_64::emit_relocs_scan): New method.
(Target_x86_64::Relocatable_size_for_reloc): Remove.
(Target_x86_64::gc_process_relocs): Use Default_classify_reloc.
(Target_x86_64::scan_relocs): Likewise.
(Target_x86_64::relocate_section): Likewise.
(Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc):
Remove.
(Target_x86_64::scan_relocatable_relocs): Use Default_classify_reloc.
(Target_x86_64::relocate_relocs): Use Default_classify_reloc.
* testsuite/testfile.cc (Target_test::emit_relocs_scan): New method.
gold/
PR gold/18780
* arm.cc (Target_arm::do_make_data_plt): Choose PLT generator based
on value of --long-plt flag.
(Output_data_plt_arm_standard::do_get_plt_entry_size): Moved to
Output_data_plt_arm_short.
(Output_data_plt_arm_standard::do_fill_plt_entry): Likewise.
(Output_data_plt_arm_standard::plt_entry): Likewise.
(Output_data_plt_arm_standard::do_fill_first_plt_entry): Fix
variable reference.
(Output_data_plt_arm_short): New class.
(Output_data_plt_arm_short::do_fill_plt_entry): Error out on too large
PLT offsets instead of asserting.
(Output_data_plt_arm_long): New class.
* options.h (General_options): Define --long-plt flag.
gold/
* object.cc (Sized_relobj_file::Sized_relobj_file): Initialize
output_views_.
* object.h (Object::get_output_view): New function.
(Object::do_get_output_view): New function.
(Sized_relobj_file::do_get_output_view): New function.
(Sized_relobj_file::output_views_): New data member.
* reloc.cc: (Sized_relobj_file::do_relocate): Store pointer to
output views in class object.
(Sized_relobj_file::do_get_output_view): New function.
In an fixed position executable, the entry code does not need to be
PIC and can thus lose a dependency on r12.
* powerpc.cc (Target_powerpc::Relocate::relocate): Edit ELFv2
entry code.
(Target_powerpc::relocate_relocs): Edit relocs to suit.
Some linker code editing needs to change multiple insns. In some
cases multiple relocations are involved and it is not sufficient to
make the changes independently as relocations are processed, because
doing so might lead to a partial edit. So in order to safely edit we
need all the relocations available in relocate(). Also, to emit
edited relocs corresponding to the edited code sequence we need some
way to pass information from relocate() to relocate_relocs(),
particularly if the edit depends on insns. We can't modify input
relocs in relocate() as they are mmapped PROT_READ, nor it is
particularly clean to write relocs to the output at that stage. So
add a Relocatable_relocs* field to relinfo to mark edited relocs.
Given that relocate is passed the raw reloc pointer, it makes sense to
remove the rel/rela parameter and r_type too. However, that means the
mips relocate() needs to know whether SHT_REL or SHT_RELA relocs are
being processed. So add a rel_type for mips, which also has the
benefit of removing relocate() overloading there.
This patch adds the infrastructure without making use of it.
Note that relinfo->rr will be NULL if not outputting relocations.
* object.h (struct Relocate_info): Add "rr".
* reloc.h (Relocatable_relocs::set_strategy): New accessor.
* reloc.cc (Sized_relobj_file::do_relocate_sections): Init
relinfo.rr for relocate_section and relocate_relocs.
* powerpc.cc (relocate): Add rel_type and preloc parameters.
Delete rela and r_type params, instead recalculate these from
preloc.
(relocate_relocs): Delete Relocatable_relocs* param, instead
use relinfo->rr.
* aarch64.cc: Likewise.
* arm.cc: Likewise.
* i386.cc: Likewise.
* mips.cc: Likewise.
* s390.cc: Likewise.
* sparc.cc: Likewise.
* target.h: Likewise.
* tilegx.cc: Likewise.
* x86_64.cc: Likewise.
* testsuite/testfile.cc: Likewise.
* target-reloc.h (relocate_section): Adjust to suit.
(apply_relocation, relocate_relocs): Likewise.
gold/
* object.cc (Sized_relobj::do_for_all_local_got_entries): Use
Local_got_entry_key for searching in local_got_offsets_.
* object.h (class Local_got_entry_key): New class.
(Relobj::local_has_got_offset): New overloaded method.
(Relobj::local_got_offset): Likewise.
(Relobj::set_local_got_offset): Likewise.
(Relobj::do_local_has_got_offset): Add addend argument.
(Relobj::do_local_got_offset): Likewise.
(Relobj::do_set_local_got_offset): Likewise.
(Sized_relobj::do_local_has_got_offset): Add addend argument, and use
Local_got_entry_key for searching through local_got_offsets_.
(Sized_relobj::do_local_got_offset): Likewise.
(Sized_relobj::do_set_local_got_offset): Likewise.
(Sized_relobj::Local_got_offsets): Change type of the key from
unsigned int to Local_got_entry_key, and add hash and equal_to.
* output.cc (Got_entry::write): Take addend into account for
calculating value of the local symbol for GOT.
(Output_data_got::add_local): New definition of overloaded method.
(Output_data_got::add_local_with_rel): Likewise.
(Output_data_got::add_local_pair_with_rel): Likewise.
* output.h (Output_data_got::add_local): New declaration of overloaded
method.
Gold does not support all the emulations that Gnu ld does, and supports
only one spelling per target. The -m option is used only in the rare case
where there are no ELF input files, and we produce an empty output file.
In those cases, users are expected to supply a -m option naming one of
the supported emulations. In the many cases where a build script provides
an unnecessary -m option naming an emulation that gold does not support,
we will simply ignore the option, as we did before the reverted patch.
gold/
PR gold/19119
PR gold/19172
PR gold/19197
Revert commit 6457197210144f50a696097c0d308d81d46d5510:
2015-10-16 H.J. Lu <hongjiu.lu@intel.com>
* options.h (General_options): Remove "obsolete" from -m.
* parameters.cc (set_parameters_target): Check if input target
is compatible with output emulation set by "-m emulation".
With --no-apply-dynamic-relocs on aarch64 targets, gold will not apply
link-time values for absolute relocations that become dynamic relocations.
This provides a workaround for broken Android dynamic linkers that use
the link-time value as an extra addend to the relocation.
gold/
PR gold/19163
* aarch64.cc (Target_aarch64::Relocate::relocate): Don't apply
certain relocations if --no-apply-dynamic-relocs is set.
* options.h (--apply-dynamic-relocs): New aarch64-specific option.
The GOT entry size is target-dependent. This patch adds a got_entry_size
function to Sized_target class so that a target can provide a value
different from default.
PR gold/19184
* incremental.cc (Got_plt_view_info): Add got_entry_size.
(Local_got_offset_visitor::visit): Replace got_entry_size_
with info_.got_entry_size.
(Local_got_offset_visitor::got_entry_size_): Removed.
(Global_got_offset_visitor::visit): Replace got_entry_size_
with info_.got_entry_size.
(Global_got_offset_visitor::got_entry_size_): Removed.
(Output_section_incremental_inputs::write_got_plt): Initialize
view_info.got_entry_size.
* target.h (Sized_target::got_entry_size): New virtual function.
* x86_64.cc (Target_x86_64::got_entry_size): New function.
The R_386_GOT32 and R_386_GOT32X relocations may be used without base
register:
movl bar@GOT, %eax
Its calculation is G + A, instead of G + A - GOT, and it can only used
to generate non-PIC executable. Include the .got.plt section address
for R_386_GOT32 and R_386_GOT32X relocations without base register.
Don't allow R_386_GOT32 and R_386_GOT32X relocations without base
register when making a PIC output.
PR gold/19177
* i386.cc (Target_i386::Relocate::relocate): Check R_386_GOT32
and R_386_GOT32X relocations without base register.
This patch updates gold to treat the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in
https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0
the same as R_X86_64_GOTPCREL. FIXME: Gold should perform the
transformations as suggested.
elfcpp/
* x86_64.h (R_X86_64_GOTPCRELX): New.
(R_X86_64_REX_GOTPCRELX): Likewise.
gold/
* x86_64.cc (Target_x86_64<size>::Scan::get_reference_flags):
Treat R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX the same
as R_X86_64_GOTPCREL.
(Target_x86_64<size>::Scan::local): Likewise.
(Target_x86_64<size>::Scan::possible_function_pointer_reloc):
Likewise.
(Target_x86_64<size>::Scan::global): Likewise.
(Target_x86_64<size>::Relocate::relocate): Likewise.
(Target_x86_64<size>::Relocatable_size_for_reloc::get_size_for_reloc):
Likewise.
This patch updates gold to treat the R_386_GOT32X relocation proposed in
https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I
the same as R_386_GOT32. FIXME: Gold should perform the transformations
as suggested.
elfcpp/
* i386.h (R_386_GOT32X): New.
gold/
* i386.cc (Target_i386::Scan::get_reference_flags(): Treat
R_386_GOT32X the same as R_386_GOT32.
(Target_i386::Scan::local): Likewise.
(Target_i386::Scan::possible_function_pointer_reloc): Likewise.
(Target_i386::Scan::global): Likewise.
(Target_i386::Relocate::relocate): Likewise.
(Target_i386::Relocatable_size_for_reloc::get_size_for_reloc):
Likewise.
x86_64_mov_to_lea1.o is a 64-bit x86-64 object and x86_64_mov_to_lea2.o
is a 32-bit x86-64 object. x86_64_mov_to_lea11 should use
x86_64_mov_to_lea2.o and x86_64_mov_to_lea12 should use
x86_64_mov_to_lea1.o.
* testsuite/Makefile.am (x86_64_mov_to_lea11): Replace
x86_64_mov_to_lea1.o with x86_64_mov_to_lea2.o.
(x86_64_mov_to_lea12): Replace x86_64_mov_to_lea2.o with
x86_64_mov_to_lea1.o.
* testsuite/Makefile.in: Regenerated.
Gold shouldn't ignore "-m emulation" command line option, which may
lead to incorrect output.
PR gold/19119
* options.h (General_options): Remove "obsolete" from -m.
* parameters.cc (set_parameters_target): Check if input target
is compatible with output emulation set by "-m emulation".
When applying a GOTDATA_OP* relocation to a local symbol, the addend
is being applied after getting the value of the symbol. When the
relocation refers to a merge section, however, the addend must be
provided when computing the symbol value, since the contents of
the section may have been rearranged.
gold/
PR gold/18855
* sparc.cc (Sparc_relocate_functions::gdop_hix22): Remove addend
parameter.
(Sparc_relocate_functions::gdop_lox10): Likewise.
(Target_sparc::Relocate::relocate): Use addend when computing
symbol value for R_SPARC_GOTDATA_OP*.
The previous commit to fix PR gold/18886 converted STT_IFUNC
to STT_FUNC when resolving to a symbol defined in a shared library.
This leads to an internal error if the shared library symbol is
seen first, as we do not convert the symbol at all.
We need to override the STT_IFUNC in add_from_dynobj() instead of
in override_base().
gold/
PR gold/18930
PR gold/18886
* resolve.cc (Symbol::override_base): Don't convert IFUNC symbols here.
* symtab.cc (Symbol_table::add_from_dynobj): Convert them here instead.
Turn IFUNC symbols from shared libraries into normal FUNC symbols when
we are resolving symbol references, instead of when we are writing out
the symbol table.
PR gold/18886
* resolve.cc (Symbol::override_base): Turn IFUNC symbols from
shared libraries into normal FUNC symbols.
* symtab.cc (Symbol_table::sized_write_symbol): Assert IFUNC
symbols aren't from shared libraries.
Gold version of a4b6fadd. Don't emit long branch or plt branch stubs
to save/restore functions. Copy them instead.
PR 18878
* powerpc.cc (Target_powerpc): Add savres_section_ and accessor.
(Target_powerpc::Branch_info::make_stub): Determine whether long
branch stub is for save/restore function.
(Branch_stub_ent): Add save_res_, and extra parm to constructor.
(Stub_table): Add need_save_res_.
(Stub_table:clear_stubs): Clear need_save_res_.
(Stub_table:set_address_and_size): Add save/restore section size.
(Stub_table::add_long_branch_entry): Add save_res param. Set
need_save_res_, but don't add space for save/restore stubs.
(Stub_table::find_long_branch_entry): Return offset to local copy
of save/restore func.
(Stub_table::do_write): Don't output save/restore stubs. Instead
copy the save/restore functions.
(Output_data_save_res:contents): New accessor.
(Target_powerpc::define_save_restore_funcs): Set savres_section_.
If a script specifies both address and region for an output section
declaration, gold ignores the region specification. This can lead to
bogus "moves backward" errors. This patch fixes gold so that if a
section specifies both address and region, it will place the section
at the specified address in the region, and update the location counter
within the region.
gold/
PR gold/18847
* script-sections.cc (Memory_region::set_address): New method.
(Script_sections::find_memory_region): Add explicit_only parameter.
(Output_section_definition::set_section_addresses): Handle case where
script specifies both address and vma region.
* script-sections.h (Script_sections::find_memory_region): Add
explicit_only parameter.
When a shared library is listed twice on the command line, the linker
ignores the second mention. If the first mention is in the scope of
an --as-needed option, and the second one is under the scope of a
--no-as-needed option, the --no-as-needed should take effect, but
doesn't. This patch keeps track of the objects we've already seen,
and updates the --as-needed flag so that if a shared object is ever
seen with --no-as-needed, it will be marked as such.
gold/
PR gold/18859
* object.cc (Input_objects::add_object): Store objects in a map,
indexed by soname; update as-needed flag when necessary.
* object.h (Object::clear_as_needed): New method.
(Input_objects::so_names_): Change from set to map.
When processing assignment expressions in a linker script, gold processes
absolute assignments early, but when one of those assignments involves the
address of a section that has not yet been finalized, we get an internal
error in address. This patch fixes the problem by gracefully returning
from expression evaluation even if the address is not yet valid, and
deferring the assignment in such a case.
gold/
PR gold/14746
* expression.cc (Expression::Expression_eval_info): Add
is_valid_pointer field.
(Expression::eval_maybe_dot): Add is_valid_pointer parameter.
Adjust all callers.
(Addr_expression::value_from_output_section): Check whether address
is valid.
* script.cc (Symbol_assignment::set_if_absolute): Defer assignment
if evaluation failed due to address that is not yet valid.
* script.h: (Expression::eval_maybe_dot): Add is_valid_pointer
parameter.
When a user object overrides a versioned definition in a shared object,
it's possible to trigger an internal error because the versioned
definition we saw didn't override the unversioned definition. This
was introduced by the fix for PR 18703. This patch fixes the problem
by reordering the tests so that we do not check ret->is_default()
until we're confident that the symbol is in fact versioned.
gold/
PR gold/18866
PR gold/18703
* symtab.cc (Symbol_table): Reorder conditions to avoid internal error.
A symbol value in an ELF final linked binary is absolute, in contrast
to a relocatable object file where the value is section relative. For
--emit-relocs it is therefore incorrect to use the value of a section
symbol as the addend when adjusting relocs against input section
symbols to output section symbols.
PR gold/18846
* target-reloc.h (relocate_relocs <RELOC_ADJUST_FOR_SECTION_RELA>):
Subtract os->address() from addend.
* powerpc.cc (relocate_relocs): Likewise.
If a symbol is defined with ".symver foo,foo@VER", the assembler
creates two symbols in the object: one unversioned, and one with
the (non-default) version "VER". If foo is listed in a version
script, gold would then make the first of those symbols the
default version, and would ignore the second symbol as a
duplicate, without making it a non-default version. While this is
arguably reasonable behavior, it doesn't match Gnu ld behavior,
so this patch fixes that by allowing the second definition to
override the first by resetting the "default version" indication.
Several test cases from the Gnu ld testsuite also exposed another
related problem, where a symbol defined with ".symver foo,foo@",
placed into a shared library, is not handled properly by gold.
This patch also fixes that case, binding the symbol to the base
version.
gold/
PR gold/18703
* dynobj.cc (Versions::record_version): Handle symbol defined with
base version.
(Versions::symbol_section_contents): Likewise.
* symtab.h (Symbol::set_is_not_default): New class method.
(Symbol_table::resolve): Add is_default_version parameter.
(Symbol_table::should_override): Likewise.
* resolve.cc (Symbol_table::resolve): Add is_default_version parameter,
and pass to should_override. Adjust all callers and explicit
instantiations.
(Symbol_table::should_override): Add is_default_value parameter;
allow default version in a dynamic object to override existing
definition from same object.
* symtab.cc (Symbol_table::add_from_object): Handle case where same
symbol is defined as unversioned and non-default version in the same
object.
* testsuite/Makefile.am (ver_test_13): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/ver_test_4.cc: Add test for symbol with base version.
* testsuite/ver_test_4.sh: Likewise.
* testsuite/ver_test_13.c: New source file.
* testsuite/ver_test_13.script: New version script.
* testsuite/ver_test_13.sh: New test case.
GCC 5 will fold symbol address comparison, assuming each symbol has a
different address, which leads to abort. We should use separate
functions to compare symbol address.
PR gold/18663
* testsuite/Makefile.am (script_test_1_SOURCES): Set to
script_test_1a.cc script_test_1b.cc.
(script_test_11_r.o): Replace script_test_11.o with
script_test_11a.o script_test_11b.o.
(script_test_11.o): Removed.
(script_test_11a.o): New.
(script_test_11b.o): Likewise.
* testsuite/Makefile.in: Regenerated.
* testsuite/script_test_1.h: New file.
* testsuite/script_test_1b.cc: Likewise.
* testsuite/script_test_11.h: Likewise.
* testsuite/script_test_11b.c: Likewise.
* testsuite/script_test_1.cc: Renamed to ...
* testsuite/script_test_1a.cc: This.
Include "script_test_1.h".
(main): Call check_int and check_ptr.
* testsuite/script_test_11.c: Renamed to ...
* testsuite/script_test_11a.c: This.
Include "script_test_11.h".
(main): Call ptr_equal.
GCC 5 will generate a relocation for protected symbol:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65248
when compiling for a shared library. It is undefined to access protected
symbol in IFUNC selector function inside a shared library.
PR gold/18628
* testsuite/ifuncdep2.c (global): Change protected to hidden.
* testsuite/ifuncmod1.c (global): Likewise.
* testsuite/ifuncmod5.c (global): Likewise.
When creating the special __start_ and __stop_ section symbols, gold
does not check the version script to see if they should be local
instead of global.
2015-07-21 Cary Coutant <ccoutant@gmail.com>
gold/
PR gold/18548
* symtab.cc (Symbol_table::do_define_in_output_data): Check for
forced local symbol even when oldsym != NULL.
(Symbol_table::do_define_in_output_segment): Likewise.
(Symbol_table::do_define_as_constant): Likewise.
Fix internal error when linking an archive library with no preceding objects.
gold/
PR gold/18698
* archive.cc (Library_base::should_include_member): Don't use entry
point for relocatable links, or if target is not yet valid.
* parameters.cc (Parameters::entry): Check target_valid().
gold/
PR gold/18696
* archive.cc (Library_base::should_include_member): Don't use entry
point for relocatable links, or if target is not yet valid.
* parameters.cc (Parameters::entry): Check target_valid().
gold/ChangeLog:
* aarch64.cc (AArch64_insn_utilities::is_adr): New method.
(AArch64_insn_utilities::aarch64_adr_encode_imm): New method.
(AArch64_insn_utilities::aarch64_adrp_decode_imm): New method.
(E843419_stub): New sub-class of Erratum_stub.
(AArch64_relobj::try_fix_erratum_843419_optimized): New method.
(AArch64_relobj::section_needs_reloc_stub_scanning): Try optimized fix.
(AArch64_relobj::create_erratum_stub): Add 1 argument.
(Target_aarch64::scan_erratum_843419_span): Pass in adrp insn offset.
For relocatable link, we should clear the SHF_COMPRESSED flag bit from
input group section.
PR gold/18689
* layout.cc (Layout::layout): Clear the SHF_COMPRESSED flag bit
from input group section for relocatable link.
* testsuite/Makefile.am (check_SCRIPTS): Add pr18689.sh.
(check_DATA): Add pr18689.stdout.
(MOSTLYCLEANFILES): Add pr18689a.o pr18689b.o.
(pr18689.stdout): New rule.
(pr18689a.o): Likewise.
(pr18689b.o): Likewise.
(pr18689.o): Likewise.
* testsuite/pr18689.c: New file.
* testsuite/pr18689.sh: Likewise.
* testsuite/Makefile.in: Regenerated.
All programs in binutils+gdb git repo now support gABI compression
with the SHF_COMPRESSED bit. This patch makes the zlib-gabi option
as compression default for gas, gold, ld and objcopy, instead of the
zlib-gnu option whose outputs are incompatible with gABI.
binutils/
* objcopy.c (copy_file): Set BFD_COMPRESS_GABI if not
zlib-gnu.
* doc/binutils.texi: Change --compress-debug-sections and
--compress-debug-sections=zlib to zlib-gabi.
binutils/testsuite/
* binutils-all/compress.exp: Update.
gas/
* as.c (parse_args): Make --compress-debug-sections and
--compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* doc/as.texinfo: Change --compress-debug-sections and
--compress-debug-sections=zlib to zlib-gabi.
gold/
* compressed_output.cc (Output_compressed_section::set_final_data_size):
Make --compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* testsuite/Makefile.am (flagstest_compress_debug_sections.check):
Expect ".debug_.*" with the SHF_COMPRESSED bit, instead of
".zdebug_".
* testsuite/Makefile.in: Regenerated.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Make
--compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* ld.texinfo: Change --compress-debug-sections=zlib to zlib-gabi.
ld/testsuite/
* ld-elf/zlibbegin.rS: Updated to .debug_.* with the
SHF_COMPRESSED bit.
* ld-elf/zlibnormal.rS: Likewise.
This patch adds SHF_COMPRESSED section decompression to gold.
PR gold/18321
* compressed_output.h (decompress_input_section): Add arguments
for ELF class, big endian and sh_flags.
* compressed_output.cc (decompress_input_section): Likewise.
Support the SHF_COMPRESSED section.
* dynobj.h (Dynobj): Add elfsize and is_big_endian member
functions.
* plugin.h (Pluginobj): Likewise.
* layout.cc (Layout::get_output_section_flags): Also clear the
SHF_COMPRESSED bit.
* object.h (Compressed_section_info): Add flag to store sh_flags.
(Object): Add pure virtual elfsize and is_big_endian member
functions.
* object.cc (need_decompressed_section): Don't skip the ".zdebug"
prefix here.
(build_compressed_section_map): Check SHF_COMPRESSED for
uncompressed size. Store sh_flags in Compressed_section_info.
Pass size, big_endian and sh_flags to decompress_input_section.
Skip the ".debug"/".zdebug" prefix when passing section name to
need_decompressed_section.
(Sized_relobj_file<size, big_endian>::do_find_special_section):
Don't check ".zdebug_*" sections.
(Object::decompressed_section_contents): Pass ELF class, big
endian and sh_flags to decompress_input_section.
* reloc.cc (Sized_relobj_file<size, big_endian>::write_sections):
Likewise.
* testsuite/Makefile.am (check_DATA): Add
debug_msg_cdebug_gabi.err and gdb_index_test_2_gabi.stdout.
(MOSTLYCLEANFILES): Add debug_msg_cdebug_gabi.err and
gdb_index_test_2_gabi.stdout.
(debug_msg_cdebug_gabi.o): New.
(odr_violation1_cdebug_gabi.o): Likewise.
(odr_violation2_cdebug_gabi.o): Likewise.
(debug_msg_cdebug_gabi.err): Likewise.
(check_SCRIPTS): Add gdb_index_test_2_gabi.sh.
(gdb_index_test_cdebug_gabi.o): Likewise.
(gdb_index_test_2_gabi): Likewise.
(gdb_index_test_2_gabi.stdout): Likewise.
* testsuite/gdb_index_test_2_gabi.sh: New file.
* testsuite/Makefile.in: Regenerated.
The psABI (AAELF) says this about mapping symbols:
4.6.5.1 Section-relative mapping symbols
Mapping symbols defined in a section define a sequence of
half-open address intervals that cover the address range of the
section. Each interval starts at the address defined by the
mapping symbol, and continues up to, but not including, the
address defined by the next (in address order) mapping symbol or
the end of the section. A section must have a mapping symbol
defined at the beginning of the section; however, if the section
contains only data then the mapping symbol may be omitted.
That makes it pretty clear that, in the absence of a mapping symbol,
the entire section can be treated as data.
gold/ChangeLog:
* aarch64.cc (AArch64_relobj::scan_errata): Drop missing symbol warning.
* arm.cc (Arm_relobj::scan_section_for_cortex_a8_erratum): Drop missing
symbol warning.
H.J. Lu
Cary Coutant
Rafael Ávila de Espíndola
Evgenii Stepanov
Marcin Kościelnicki
Han Shen
Sriraman Tallam
Alan Modra
Peter Collingbourne
Roland McGrath
Vladimir Radosavljevic
Peter Bergner
Nick Clifton
Andreas Schwab
Simon Dardis
Doug Kwan
Yiran Wang