b0e28b39b7
gas/testsuite/
...
* gas/arm/dis-data.d: Update test name. Do not expect
.word output.
* gas/arm/dis-data2.d, gas/arm/dis-data2.s,
gas/arm/dis-data3.d, gas/arm/dis-data3.s: New tests.
opcodes/
* opcodes/arm-dis.c (struct arm_private_data): New.
(print_insn_coprocessor, print_insn_arm): Update to use struct
arm_private_data.
(is_mapping_symbol, get_map_sym_type): New functions.
(get_sym_code_type): Check the symbol's section. Do not check
mapping symbols.
(print_insn): Default to disassembling ARM mode code. Check
for mapping symbols separately from other symbols. Use
struct arm_private_data.
2010-01-29 16:47:55 +00:00
99b253c514
PR 11136
...
* config/tc-arm.c (neon_check_type): Handle a neon_shape value of
NS_NULL.
* gas/arm/neon-omit.s: Add instruction that causes crash.
* gas/arm/neon-omit.d: Add expected disassembly.
2010-01-29 16:02:41 +00:00
09be49c9dd
* gas/pe/section-align-1.d: Don't test section flags.
...
* gas/pe/section-align-2.d: Likewise.
2010-01-28 19:00:03 +00:00
1c4809636b
Allow VL=1 on scalar FMA instructions.
...
gas/testsuite/
2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/fma-scalar-intel.d: New.
* gas/i386/fma-scalar.d: Likewise.
* gas/i386/fma-scalar.s: Likewise.
* gas/i386/x86-64-fma-scalar-intel.d: Likewise.
* gas/i386/x86-64-fma-scalar.d: Likewise.
* gas/i386/x86-64-fma-scalar.s: Likewise.
* gas/i386/i386.exp: Run fma-scalar, fma-scalar-intel,
x86-64-fma-scalar and x86-64-fma-scalar-intel.
opcodes/
2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (EXVexWdqScalar): New.
(vex_scalar_w_dq_mode): Likewise.
(prefix_table): Update entries for PREFIX_VEX_3899,
PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
PREFIX_VEX_38BD and PREFIX_VEX_38BF.
(intel_operand_size): Handle vex_scalar_w_dq_mode.
(OP_EX): Likewise.
2010-01-28 15:33:23 +00:00
70ecb3842d
PR 11225
...
* objdump.c (only): Replace with linked list.
(only_size, only_used): Replace with only_list.
(process_section_p): Set seen field on matches sections.
(add_only): New function.
(free_only_list): New function.
(disassemble_section): Check only_list.
(main): Use add_only and free_only_list.
* gas/pe/aligncomm-c.d: Dump all sections.
* ld-sh/refdbg-0-dso.d: Dump all sections.
2010-01-28 15:25:20 +00:00
31907d5e90
gas/ChangeLog:
...
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_section): Accept digits and use
to override default section alignment power if specified.
* doc/as.texinfo (.section directive): Update documentation.
gas/testsuite/ChangeLog:
* gas/pe/section-align-1.s: New test source file.
* gas/pe/section-align-1.d: Likewise control script.
* gas/pe/section-align-2.s: Likewise ...
* gas/pe/section-align-2.d: ... and likewise.
* gas/pe/pe.exp: Invoke new testcases.
2010-01-27 22:01:38 +00:00
539f890d01
Allow VL=1 on AVX scalar instructions.
...
gas/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (avxscalar): New.
(OPTION_MAVXSCALAR): Likewise.
(build_vex_prefix): Select vector_length for scalar instructions
based on avxscalar.
(md_longopts): Add OPTION_MAVXSCALAR.
(md_parse_option): Handle OPTION_MAVXSCALAR.
(md_show_usage): Add -mavxscalar=.
* doc/c-i386.texi: Document -mavxscalar=.
gas/testsuite/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/avx-scalar-intel.d: New.
* gas/i386/avx-scalar.d: Likewise.
* gas/i386/avx-scalar.s: Likewise.
* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
* gas/i386/x86-64-avx-scalar.d: Likewise.
* gas/i386/x86-64-avx-scalar.s: Likewise.
* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
x86-64-avx-scalar and x86-64-avx-scalar-intel.
opcodes/
2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (XMScalar): New.
(EXdScalar): Likewise.
(EXqScalar): Likewise.
(EXqScalarS): Likewise.
(VexScalar): Likewise.
(EXdVexScalarS): Likewise.
(EXqVexScalarS): Likewise.
(XMVexScalar): Likewise.
(scalar_mode): Likewise.
(d_scalar_mode): Likewise.
(d_scalar_swap_mode): Likewise.
(q_scalar_mode): Likewise.
(q_scalar_swap_mode): Likewise.
(vex_scalar_mode): Likewise.
(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
q_scalar_mode, q_scalar_swap_mode.
(OP_XMM): Handle scalar_mode.
(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
and q_scalar_swap_mode.
(OP_VEX): Handle vex_scalar_mode.
2010-01-27 14:34:40 +00:00
80de6e001d
Set the first 3byte VEX prefix individually.
...
2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
0xc4 individually.
2010-01-24 15:44:05 +00:00
caca49762b
Add more AVX tests.
...
2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/avx.s: Add more tests.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/avx-intel.d: Updated.
* gas/i386/avx.d: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
2010-01-23 18:04:05 +00:00
c865e45b1b
bfd/
...
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1.
(_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE.
* coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and
bitsize to 1.
(xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE.
gas/
* write.h (fix_at_start): Declare.
* write.c (fix_new_internal): Add at_beginning parameter.
Use it instead of REVERSE_SORT_RELOCS. Fix the handling of
seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
(fix_new, fix_new_exp): Update accordingly.
(fix_at_start): New function.
* config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
(ppc_ref): New function, for OBJ_XCOFF.
(md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
* config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.
gas/testsuite/
* gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test.
* gas/ppc/aix.exp: Run it.
ld/testsuite/
* ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od,
ld-powerpc/aix-ref-1.s: New tests.
* ld-powerpc/aix52.exp: Run them.
2010-01-23 12:05:33 +00:00
53e5c8fee6
* config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only
...
on 64-bit Solaris/x86.
Include obj-format.h earlier.
2010-01-21 20:58:34 +00:00
706e820514
Correct month.
2010-01-21 17:32:32 +00:00
73bb672904
Add xsave64 and xrstor64.
...
gas/testsuite/
2010-02-21 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-xsave.s: Add tests for xsave64 and xrstor64.
* gas/i386/x86-64-xsave-intel.d: Updated.
* gas/i386/x86-64-xsave.d: Likewise.
opcodes/
2010-02-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
* i386-opc.tbl: Add xsave64 and xrstor64.
* i386-tbl.h: Regenerated.
2010-01-21 17:30:14 +00:00
55786da2bf
2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* readelf.c (get_machine_flags): Handle EF_S390_HIGH_GPRS.
2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h (EF_S390_HIGH_GPRS): Added macro definition.
2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c (s390_elf_final_processing): New function.
* config/tc-s390.h (elf_tc_final_processing): New macro definition.
(s390_elf_final_processing): Added prototype.
2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* elf32-s390.c (elf32_s390_merge_private_bfd_data): New function.
(bfd_elf32_bfd_merge_private_bfd_data): New macro definition.
2010-01-21 11:40:28 +00:00
760f3a89bc
Add changelog entries for PR 11109. Patch itself was accidentally committed earlier.
...
Remove Spurious whitespace in ChangeLog-2009.
2010-01-20 11:21:37 +00:00
37a1f2771f
2010-01-18 Tristan Gingold <gingold@adacore.com>
...
* config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
2010-01-19 09:14:54 +00:00
a6461c0251
2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
...
gas/
* config/tc-i386.c (md_assemble): Before accessing the IMM field
check that it's not an XOP insn.
gas/testsuite/
* gas/i386/x86-64-xop.d: Add missing patterns.
* gas/i386/x86-64-xop.s: Same.
* gas/i386/xop.d: Same.
* gas/i386/xop.s: Same.
opcodes/
* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
* i386-tbl.h: Regenerated.
2010-01-15 21:24:13 +00:00
62fb9fe1fc
* config/bfin-aux.h: Remove argument names in function
...
declarations.
* config/bfin-lex.l (parse_int): Fix shadowed variable name
warning.
* config/bfin-parse.y (value_match): Remove argument names
in declaration.
(notethat): Likewise.
(yyerror): Likewise.
2010-01-14 04:52:57 +00:00
43579b2591
gas/testsuite/
...
* gas/arm/thumb-nop.s: Add .syntax unified.
2010-01-13 19:07:31 +00:00
afa62d5e34
gas/
...
* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.
gas/testsuite/
* gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
* gas/arm/relax_branch_align.d: Expect a default NOP instruction.
* gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
Thumb-2.
ld/testsuite/
* ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
-mcpu=cortex-a8.
2010-01-13 19:01:10 +00:00
52b010e442
* config/tc-h8300.c (h8300_elf_section): New function - issue a
...
warning message if a new section is created without setting any
attributes for it.
(md_pseudo_table): Intercept section creation pseudos.
(md_pcrel_from): Replace abort with an error message.
* config/obj-elf.c (obj_elf_section_name): Export this function.
* config/obj-elf.h (obj_elf_section_name): Prototype.
* gas/elf/section0.d: Skip this test for the h8300.
* gas/elf/section1.d: Likewise.
* gas/elf/section6.d: Likewise.
* gas/elf/elf.exp: Skip section2 and section5 tests when the
target is the h8300.
* ld-scrips/sort.exp: Skip these tests when the target is the
h8300.
2010-01-13 14:08:54 +00:00
cc761f759c
PR 11122
...
* listing.c (print_source): Add one to line number.
2010-01-12 01:10:55 +00:00
3725885a65
Sync Libtool from GCC.
...
/:
* libtool.m4: Sync from git Libtool.
* ltmain.sh: Likewise.
* ltoptions.m4: Likewise.
* ltversion.m4: Likewise.
* lt~obsolete.m4: Likewise.
sim/iq2000/:
* configure: Regenerate.
sim/d10v/:
* configure: Regenerate.
sim/m32r/:
* configure: Regenerate.
sim/frv/:
* configure: Regenerate.
sim/:
* avr/configure: Regenerate.
* cris/configure: Regenerate.
* microblaze/configure: Regenerate.
sim/h8300/:
* configure: Regenerate.
sim/mn10300/:
* configure: Regenerate.
sim/erc32/:
* configure: Regenerate.
sim/arm/:
* configure: Regenerate.
sim/m68hc11/:
* configure: Regenerate.
sim/lm32/:
* configure: Regenerate.
sim/sh64/:
* configure: Regenerate.
sim/v850/:
* configure: Regenerate.
sim/cr16/:
* configure: Regenerate.
sim/moxie/:
* configure: Regenerate.
sim/m32c/:
* configure: Regenerate.
sim/mips/:
* configure: Regenerate.
sim/mcore/:
* configure: Regenerate.
sim/sh/:
* configure: Regenerate.
gprof/:
* Makefile.in: Regenerate.
* configure: Regenerate.
opcodes/:
* Makefile.in: Regenerate.
* configure: Regenerate.
gas/:
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
ld/:
* configure: Regenerate.
gdb/testsuite/:
* gdb.cell/configure: Regenerate.
binutils/:
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
bfd/:
* Makefile.in: Regenerate.
* configure: Regenerate.
bfd/doc/:
* Makefile.in: Regenerate.
2010-01-09 21:11:44 +00:00
5256a5b03f
Change to "Copyright 2010".
2010-01-08 19:40:08 +00:00
69dd98654a
2010-01-06 Quentin Neill <quentin.neill@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Add amdfam15.
(i386_align_code): Add PROCESSOR_AMDFAM15 cases.
* config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
* doc/c-i386.texi: Add amdfam15.
opcodes/
* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
* i386-init.h: Regenerated.
testsuite/
* gas/i386/i386.exp: Add new amdfam15 test cases.
* gas/i386/nops-1-amdfam15.d: New.
2010-01-06 22:52:47 +00:00
e3e535bc58
* arm-dis.c (print_insn): Fixed search for next
...
symbol and data dumping condition, and the
initial mapping symbol state.
* gas/arm/dis-data.d: New test case.
* gas/arm/dis-data.s: New file.
2010-01-06 15:02:45 +00:00
4316f0d240
2010-01-04 Daniel Gutson <dgutson@codesourcery.com>
...
gas/
* config/tc-arm.c (do_neon_logic): Accept imm value
in the third operand too.
(operand_parse_code): OP_RNDQ_IMVNb renamed to
OP_RNDQ_Ibig.
(parse_operands): OP_NILO case removed, applied renaming.
(insns): Neon shape changed for some logic instructions.
gas/testsuite/
* gas/arm/neon-logic.d: New test case.
* gas/arm/neon-logic.s: New file.
2010-01-04 23:31:04 +00:00
b1a769ed35
2010-01-04 Daniel Gutson <dgutson@codesourcery.com>
...
gas/
* config/tc-arm.c (do_neon_ldx_stx): Added
validation for vector load/store insns.
gas/testsuite/
* gas/arm/neon-addressing-bad.d: New test case.
* gas/arm/neon-addressing-bad.s: New file.
* gas/arm/neon-addressing-bad.l: New file.
2010-01-04 22:19:03 +00:00
0dc9305793
bfd/
...
* archures.c: Add bfd_mach_ppc_e500mc64.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entry for
bfd_mach_ppc_e500mc64.
gas/
* config/tc-ppc.c (md_show_usage): Document -me500mc64.
opcodes/
* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
2010-01-04 02:32:56 +00:00
88714cb802
2010-01-03 Daniel Gutson <dgutson@codesourcery.com>
...
gas/
* config/tc-arm.c (struct arm_it): New flag 'is_neon'.
(NEON_ENC_*): Macros renamed to _NEON_ENC_*.
(NEON_ENCODE): New macro.
(check_neon_suffixes): New macro.
(do_vfp_cond_or_thumb): Set the 'is_neon' flag.
(do_vfp_nsyn_opcode): Likewise.
(do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
(do_vfp_nsyn_cmp): Likewise.
(do_neon_shl_imm): Likewise.
(do_neon_qshl_imm): Likewise.
(neon_dyadic_misc): Likewise.
(do_neon_mac_maybe_scalar): Likewise.
(do_neon_qdmulh): Likewise.
(do_neon_qmovn): Likewise.
(do_neon_qmovun): Likewise.
(do_neon_movn): Likewise.
(neon_mac_reg_scalar_long): Likewise.
(do_neon_vmull): Likewise.
(do_neon_trn): Likewise.
(do_neon_ldx_stx): Likewise.
(neon_dp_fixup): Changed signature and set the flag.
(neon_three_same): Call the above with new signature.
(neon_two_same): Likewise.
(neon_imm_shift): Likewise.
(neon_mul_mac): Likewise.
(do_neon_abs_neg): Likewise.
(neon_mixed_length): Likewise.
(do_neon_ext): Likewise.
(do_neon_mov): Likewise.
(do_neon_tbl_tbx): Likewise.
(do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
(neon_compare): Likewise.
(do_neon_shll): Likewise.
(do_neon_cvt): Likewise.
(do_neon_mvn): Likewise.
(do_neon_dup): Likewise.
(md_assemble): Call check_neon_suffixes ().
gas/testsuite/
* gas/arm/neon-suffix-bad.d: New test case.
* gas/arm/neon-suffix-bad.s: New file.
* gas/arm/neon-suffix-bad.l: New file.
2010-01-04 00:39:28 +00:00
43ecc30f09
Move 2009 binutils ChangeLog to ChangeLog-2009.
2010-01-01 18:06:10 +00:00
99f1a7a78a
2009-12-28 Daniel Gutson <dgutson@codesourcery.com>
...
* doc/c-arm.texi: Document NEON alignment specifiers.
2009-12-28 18:27:42 +00:00
4a42ebbc0e
Fix Thumb2 bl range options.
...
2009-12-21 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Richard Earnshaw <richard.earnshaw@arm.com>
* config/tc-arm.c (encode_thumb2_b_bl_offset): New. Refactored
from md_apply_fix.
(md_apply_fix): Fixup range checks for Thumb2 version
of unconditional calls. Call encode_thumb2_b_bl_offset for
unconditional branches / function calls.
2009-12-21 12:56:41 +00:00
e3ea77accc
* gas/xc16x/xc16x.exp (*): Add missing " in timeout cases.
2009-12-19 19:34:07 +00:00
2426c15ff8
Replace VexNDS, VexNDD and VexLWP with VexVVVV.
...
gas/
2009-12-19 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check vexvvvv instead
of vexnds and vexndd.
(build_modrm_byte): Check vexvvvv instead of vexnds, vexndd
and vexlwp.
opcodes/
2009-12-19 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove VexNDS, VexNDD and
VexLWP. Add VexVVVV.
* i386-opc.h (VexNDS): Removed.
(VexNDD): Likewise.
(VexLWP): Likewise.
(VEXXDS): New.
(VEXNDD): Likewise.
(VEXLWP): Likewise.
(VexVVVV): Likewise.
(i386_opcode_modifier): Remove vexnds, vexndd and vexlwp.
Add vexvvvv.
* i386-opc.tbl: Replace VexNDS with VexVVVV=1, VexNDD with
VexVVVV=2 and VexLWP with VexVVVV=3.
* i386-tbl.h: Regenerated.
2009-12-19 18:36:27 +00:00
42853c79aa
* gas/mips/eret-2.s: Add an instruction to fill a branch delay
...
slot.
* gas/mips/eret-2.d: Adjust accordingly.
2009-12-19 00:24:09 +00:00
7c0fc5246b
gas/
...
* config/tc-mips.c (s_mips_ent): Also set BSF_FUNCTION for
".aent".
gas/testsuite/
* gas/mips/aent.d: New test.
* gas/mips/aent.s: Source for the new test.
* gas/mips/mips.exp: Run it.
2009-12-19 00:21:29 +00:00
fd4db1a12f
2009-12-18 Steve Ellcey <sje@cup.hp.com>
...
* config/tc-hppa.c: Change access to access_ctr.
2009-12-18 18:11:56 +00:00
ff4a8d2b93
PR binutils/10924
...
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
register.
(do_mrs): Likewise.
(do_mul): Likewise.
* arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
unique register numbers. Extend support for %<>R format to
thumb32 and coprocessor instructions.
* gas/arm/unpredictable.s: Add more unpredictable instructions.
* gas/arm/unpredictable.d: Add expected disassemblies.
2009-12-17 09:52:18 +00:00
2eb952a4d9
Remove ByteOkIntel.
...
gas/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Set i.suffix to 0 in
Intel syntax if size is ignored and b/l/w suffixes are
illegal.
(check_byte_reg): Remove byteokintel check.
opcodes/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove ByteOkIntel.
* i386-opc.h (ByteOkIntel): Removed.
(i386_opcode_modifier): Remove byteokintel.
* i386-opc.tbl: Remove ByteOkIntel.
* i386-tbl.h: Regenerated.
2009-12-16 20:08:32 +00:00
7f399153c6
Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.
...
gas/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
vex0f3a, xop08, xop09 and xop0a with vexopcode.
opcodes/
2009-12-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
Vex0F3A, XOP08, XOP09 and XOP0A. Add VexOpcode.
* i386-opc.h (Vex0F): Removed.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(VexOpcode): New.
(VEX0F): Likewise.
(VEX0F38): Likewise.
(VEX0F3A): Likewise.
(XOP08): Defined as a macro.
(XOP09): Likewise.
(XOP0A): Likewise.
(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
xop09 and xop0a. Add vexopcode.
* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
* i386-tbl.h: Regenerated.
2009-12-16 15:43:16 +00:00
8c43a48b28
Replace VEX2SOURCES with XOP2SOURCES.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Check XOP2SOURCES
instead VEX2SOURCES.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (VEX2SOURCES): Renamed to ...
(XOP2SOURCES): This.
2009-12-16 05:18:11 +00:00
8cd7925b45
Replace Vex2Sources and Vex3Sources with VexSources.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check vexsources
instead of vex3sources.
(build_modrm_byte): Check vexsources instead of vex2sources
and vex3sources.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex3Sources and
Vex2Sources. Add VexSources.
* i386-opc.h ()Vex2Sources: Removed.
(Vex3Sources): Likewise.
(VEX2SOURCES): New.
(VEX3SOURCES): Likewise.
(VexSources): Likewise.
(i386_opcode_modifier): Remove vex2sources and vex3sources.
Add vexsources.
* i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
Vex3Sourceswith VexSources=2.
* i386-tbl.h: Regenerated.
2009-12-16 04:00:35 +00:00
1ef99a7be9
Remove VexW0 and VexW1. Add VexW.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
with vexw.
(build_modrm_byte): Likewise.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
VexW.
* i386-opc.h (VexW0): Removed.
(VexW1): Likewise.
(VEXW0): New.
(VEXW1): Likewise.
(VexW): Likewise.
(i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
Vex=2.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-12-16 02:10:45 +00:00
0175442dfa
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
...
* as.h (mempcpy): New.
* configure.in: Check if mempcpy is declared.
* configure: Regenerated.
* config.in: Likewise.
2009-12-16 00:28:56 +00:00
e3c58833bf
Define VEX128 and VEX256.
...
gas/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Use VEX256.
opcodes/
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (VEX128): New.
(VEX256): Likewise.
2009-12-15 16:36:59 +00:00
ab8e2090b6
PR binutils/10924
...
* arm-dis.c (arm_opcodes): Specify %R in cases where using r15
results in unpredictable behaviour.
(print_insn_arm): Handle %R.
* gas/arm/unpredictable.s: New test case - checks the disassembly
of instructions with unpredictable behaviour.
* gas/arm/unpredictable.d: New file - expected disassembly.
2009-12-14 16:38:23 +00:00
3aa4238e26
Fix PR number typo.
2009-12-14 11:01:25 +00:00
34ab888845
PR gas/11089
...
* config/tc-rx.c (rx_equ): Rename 'expr' to 'expression' in order
to avoid shadowing a global symbol of the same name.
2009-12-14 10:59:37 +00:00
c7d6f51805
* config/tc-microblaze.c (md_assemble): Rename 'imm' to 'immed' in
...
order to avoid shadowing global variable of the same name.
2009-12-14 09:50:18 +00:00
Daniel Jacobowitz
Nick Clifton
Dave Korn
H.J. Lu
Richard Sandiford
Rainer Orth
Andreas Krebbel
Tristan Gingold
Sebastian Pop
Jie Zhang
Alan Modra
Ralf Wildenhues
Daniel Gutson
Ramana Radhakrishnan
Doug Evans
Maciej W. Rozycki
Steve Ellcey