* cgen-trace.h (sim_disasm_read_memory): Update args to be compatible
with disassemble_info:read_memory_func.
* cgen-trace.c (sim_disasm_read_memory): Ditto.
(CGEN_MAIN_SCM): Add rtx-funcs.scm.
(cgen-arch): Pass $(mach) to cgen.sh.
* cgen-engine.h (SEM_BRANCH_FINI): New arg pcvar, all uses updated.
(SEM_BRANCH_INIT_EXTRACT): New macro.
(SEM_BRANCH_INIT): Add taken_p.
(TARGET_SEM_BRANCH_FINI): Provide default definition.
(SEM_BRANCH_FINI): Use it.
(SEM_INSN): Update.
* cgen-run.c (sim_resume): Handle tracing of last insn.
* cgen-scache.h (WITH_SCACHE): Define as 0 if not defined.
* cgen-trace.c (current_abuf): New static global.
(trace_insn_init): Initialize it.
(trace_insn_fini): Use it.
(trace_insn): Set it.
* cgen.sh (arch case): Pass -m ${mach} to cgen.
* genmloop.sh (@cpu@_emit_before): Only define if WITH_SCACHE_PBB.
(@cpu@_emit_after): Ditto.
(simple @cpu@_engine_run_full): New local `pc'. Initialize semantic
labels if WITH_SEM_SWITCH_FULL.
* sim-model.c: Include bfd.h.
(sim_model_init): New function.
(sim_model_install): Record init fn.
* sim-model.h (MACH): New member bfd_name.
* sim-module.c (modules): Initialize model before scache.
(sim-{module,options,trace,profile,utils}.o): Clean up dependencies.
(sim-model.o): Add new rule.
(cgen-{scache,trace,utils}.o): Add new rules.
* aclocal.m4 (SIM_AC_OPTION_{SCACHE,DEFAULT_MODEL}): Add.
* cgen-scache.c (scache_print_profile): Change `sd' arg to `cpu'.
Indent output by 2 spaces.
* cgen-scache.h (scache_print_profile): Update.
* cgen-trace.c (trace_insn_fini): Indent output by 2 spaces.
Use trace_printf, not fprintf.
(trace_extract): Use trace_printf, not cgen_trace_printf.
* genmloop.sh (!FAST case): Increment `insn_count'.
* sim-base.h (sim_state_base): Only include scache_size if WITH_SCACHE.
(sim_cpu_base): Rename member `sd' to `state' to be consistent with
access macro's name.
* sim-core.c (sim_core_init): Use EXTERN_SIM_CORE to define it.
Change return type to SIM_RC.
(sim_core_{install,uninstall}): New functions.
* sim-core.h (sim_core_{install,uninstall}): Declare.
(sim_core_init): Use EXTERN_SIM_CORE to define it.
Change return type to SIM_RC.
* sim-model.h (models,machs,model_install): Declare.
* sim-module.c (modules): Add scache_install, model_install.
(sim_post_argv_init): Set cpu->state backlinks.
* sim-options.c (standard_options): Delete --simcache-size,--max-insns.
(standard_option_handler): Likewise.
* sim-profile.c (PROFILE_{HISTOGRAM,LABEL}_WIDTH): Move to
sim-profile.h.
(*): Assume ANSI C.
(profile_options): Delete --profile-simcache.
(profile_option_handler): Likewise.
(profile_print_insn): Change `sd' arg to `cpu'. Indent output 2
spaces.
(profile_print_{memory,model}): Likewise.
(profile_print_simcache): Delete.
(profile_print_speed): New function.
(profile_print): Rewrite.
* sim-profile.h (PROFILE_scache): Renamed from PROFILE_simcache.
(WITH_PROFILE_SCACHE_P): Renamed from WITH_PROFILE_SIMCACHE_P.
(PROFILE_DATA): Delete members simcache_{hits,misses}.
(PROFILE_COUNT_SIMCACHE_{HIT,MISS}): Delete.
(PROFILE_{CALLBACK,CPU_CALLBACK}): New types.
(profile_print): Update prototype.
Joel Brobecker