e4d013fc0f
Update the copyright notice of some of the files I missed
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in the previous copyright update.
2009-01-14 10:53:10 +00:00
9b254dd1ce
Updated copyright notices for most files.
2008-01-01 22:53:26 +00:00
4744ac1bb0
Switch the license of all files explicitly copyright the FSF
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to GPLv3.
2007-08-24 14:30:15 +00:00
6aba47ca06
Copyright updates for 2007.
2007-01-09 17:59:20 +00:00
4e0bf4c4d0
2002-11-21 Andrew Cagney <ac131313@redhat.com>
...
* filter.c: Re-indent.
* filter.h, filter_host.h, gen-engine.c, gen-engine.h: Ditto.
* gen-icache.c, gen-icache.h, gen-idecode.c: Ditto.
* gen-idecode.h, gen-itable.c, gen-itable.h: Ditto.
* gen-model.c, gen-model.h, gen-semantics.c: Ditto.
* gen-semantics.h, gen-support.c, gen-support.h: Ditto.
* gen.c, gen.h, igen.c, igen.h, ld-cache.c, ld-cache.h: Ditto.
* ld-decode.c, ld-decode.h, ld-insn.c, ld-insn.h, lf.c: Ditto.
* lf.h, misc.c, misc.h, table.c, table.h: Ditto.
2002-11-22 04:20:49 +00:00
feaee4bdbb
2002-11-21 Andrew Cagney <ac131313@redhat.com>
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* Makefile.in: Update copyright. IGEN contributed to the FSF.
* filter.c, filter.h, filter_host.c, filter_host.h: Ditto.
* gen-engine.c, gen-engine.h, gen-icache.c, gen-icache.h: Ditto.
* gen-idecode.c, gen-idecode.h, gen-itable.c: Ditto.
* gen-itable.h, gen-model.c, gen-model.h, gen-semantics.c: Ditto.
* gen-semantics.h, gen-support.c, gen-support.h, gen.c: Ditto.
* gen.h, igen.c, igen.h, ld-cache.c, ld-cache.h: Ditto.
* ld-decode.c, ld-decode.h, ld-insn.c, ld-insn.h, lf.c: Ditto.
* lf.h, misc.c, misc.h, table.c, table.h: Ditto.
2002-11-22 04:09:40 +00:00
051b807af7
2002-08-28 Dave Brolley <brolley@redhat.com>
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* gen-support.c (gen_support_h): Generate
'#define semantic_illegal <PREFIX>_semantic_illegal'.
2002-08-28 16:01:31 +00:00
c906108c21
Initial creation of sourceware repository
1999-04-16 01:35:26 +00:00
071ea11e85
Initial creation of sourceware repository
1999-04-16 01:34:07 +00:00
9ec6741b17
igen: Fix SMP simulator generator support.
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Use the bfd-processor name in the sim-engine switch.
Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
Update
mips: Fill in bfd-processor field of model records so that
they match ../bfd/archures.
1998-01-31 06:23:41 +00:00
687f3f1cef
Add multi-sim support to simulator.
1997-09-08 17:40:24 +00:00
255925e912
Tidy code gen.
1997-04-30 08:39:51 +00:00
15c1649391
TIc80 simulator checkpoint - runs 3 instructions - trap, addu, br.a.
1997-04-22 17:46:07 +00:00
Joel Brobecker