Commit Graph

1229 Commits

Author SHA1 Message Date
James Lemke
5d5a459fd1 Update DMA register addresses 1998-02-11 23:19:52 +00:00
Andrew Cagney
e0deacd295 * sim-load.c (sim_load_file): Print LMA/VMA according to value
used.
1998-02-11 21:10:23 +00:00
Frank Ch. Eigler
43a6998b41 - PKE simulation code almost complete. Still missing:
* handling of super duper packed UNPACK arguments
  * skipping of in-progress instruction on break/stop
  * interrupt generation to 5900
  * PATH2/PATH3 status checking & masking
  * ability to write to FIFO one word (instead of quadword) at a time
1998-02-11 19:42:15 +00:00
Andrew Cagney
86b46474fd Update tests to match recently modified ABI 1998-02-11 07:12:48 +00:00
Andrew Cagney
b41dff6b54 Don't abort() when system call is unknown. 1998-02-11 07:11:28 +00:00
Andrew Cagney
19431a0280 Ensure zero-hardwired bits in DPSW remain zero. 1998-02-11 06:34:30 +00:00
Ian Carmichael
52793fab2f * Many changes to make sky sim build with --enable-sim-warnings. 1998-02-10 20:08:16 +00:00
Andrew Cagney
8904ad6940 D10v memory map changed. Update.
Initialize IMAP/DMAP registers to hardware reset value.
1998-02-10 07:26:55 +00:00
Doug Evans
dc4e95adcc * decode.c, sem.c: Regenerate.
start-sanitize-m32rx
	* cpux.h, decodex.c, readx.c, semx.c: Regenerate.
	* m32rx.c (m32rx_h_accums_set): New function.
	(m32rx_model_mark_[gs]et_h_gr): New function.
	* mloopx.in: Rewrite.
	* Makefile.in (mloopx.o): Build with -parallel.
	* sim-main.h (_sim_cpu): Delete member `par_exec'.
	* tconfig.in (WITH_SEM_SWITCH_FULL): Define as 0 for m32rx.
end-sanitize-m32rx
1998-02-10 03:51:12 +00:00
Doug Evans
6b373fab44 (PAREXEC): Renamed from PARALLEL_EXEC. All uses updated.
(SEMANTIC{,_CACHE}_FN): Fix return type.
1998-02-10 03:37:49 +00:00
Doug Evans
e61871cedc * cgen-sim.h (DECODE): Always use switch for `read' for now.
* cgen.sh (decode): Add s/@arch@/$arch/.
	* genmloop.sh (@cpu@_engine_run): Delete `current_state'.
	(engine_resume): Likewise.  Make `engine' volatile.  Save copy
	of cpu pointer in volatile object.  Initialize read switch if
	-parallel.
1998-02-10 01:43:42 +00:00
Ian Carmichael
dde66fa756 * Make it so vu.bin is an optional file. 1998-02-10 00:13:54 +00:00
Ian Carmichael
2c88fae9ad * Add hardware_init hook. 1998-02-09 23:53:33 +00:00
Doug Evans
dde54cb845 * genmloop.sh (@cpu@_engine_run): Delete `current_state'.
(engine_resume): Likewise.  Make `engine' volatile.  Save copy
	of cpu pointer in volatile object.
1998-02-09 22:51:21 +00:00
Andrew Cagney
452b380811 Fix double dependency for itable.[hc]. Was causing both the mips16 and the
normal mips simulators to be built.
1998-02-07 06:24:51 +00:00
Frank Ch. Eigler
fba9bfed2d - Added almost all code needed for PKE0/1 simulation. Considers
clarifications given in SCEI question/answer batches #1 and #2.
1998-02-07 00:12:14 +00:00
Doug Evans
f3534b6867 sky sanitization 1998-02-06 03:27:55 +00:00
Doug Evans
5759734b2c * Makefile.in (SIM_SKY_OBJS,MIPS_EXTRA_OBJS): New vars.
(SIM_OBJS): Add $(MIPS_EXTRA_OBJS).
	* configure.in: Set mips_extra_objs to sky files if mips64r59*-sky-*.
	* configure: Regenerated.
1998-02-06 03:19:56 +00:00
Doug Evans
72db5610de Prepend sky- to sky header file names. 1998-02-06 03:11:44 +00:00
Doug Evans
803f52b9dc Second pass at moving sky files into mips dir,
prepend sky- to all #include's of sky headers.
1998-02-06 03:09:03 +00:00
Doug Evans
0b0caaf11b delete txvu/dvp/sky stuff, lives in mips dir now, configured with
mips64r5900-sky-elf.
1998-02-06 02:42:34 +00:00
Doug Evans
aea481da17 First pass at moving sky stuff from ../txvu to mips dir. 1998-02-06 02:29:22 +00:00
Andrew Cagney
8c9ee21e2f New files, update .Sanitize 1998-02-05 22:08:33 +00:00
Doug Evans
61b62559ba * cgen-sim.h (EX_FN_NAME): _exc_ -> _ex_.
(SEM_INSN): New macro.
1998-02-05 21:29:18 +00:00
Doug Evans
d542677191 Sanitize m32rx from cpu.h and m32r-sim.h. 1998-02-05 21:16:08 +00:00
Doug Evans
b8a9943dd4 * Makefile.in (m32r.o): Depend on cpu.h
(extract.o): Pass -DSCACHE_P.
	* mloop.in (extract{16,32}): Update call to m32r_decode.
	* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
	* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
	* sim-main.h: #include "ansidecl.h".
	Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
	* Makefile.in (M32RX_OBJS): Build m32rx support now.
	(m32rx.o): New rule.
	* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
	* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
	(m32rx_h_accums_get): New function.
	* mloopx.in: Update call to m32rx_decode.  Rewrite exec loop.
	* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
1998-02-05 21:01:06 +00:00
Ian Carmichael
e46ede536a * Update configure: txvu-elf changed to dvp-elf. 1998-02-04 18:46:18 +00:00
Andrew Cagney
37379a256b IGEN - Replace IMEM (IMEM_IMMED) macro with IMEM<insn-size> macro,
update v850, tic80 and mips simulators.
IGEN - Prepend prefix to more generated symbols and macros
(idecode_issue, instruction_word).
IGEN - Add -Wnowith option to supress warnings about word size
inflicts in input files.
MIPS - Clean up Makefile.in, m16.igen, m16.dc (new), m16run.c (new) so
that a mips16 simulator built using IGEN can be compiled.
1998-02-03 05:39:15 +00:00
Jason Molenda
240dd45fde Add sim-main.h to v850e_files for sanitization. 1998-02-03 01:37:25 +00:00
Andrew Cagney
4634263c4c Make IGEN the generator for all but mips16 simulators.
Clean up botched merge in interp.c:sim_open().
1998-02-02 14:14:17 +00:00
Andrew Cagney
a97f304b04 Add support for configuring the size of the floating point unit (fp_word).
For mips, move fp_registers into a separate array of type fp_word[].
1998-02-02 14:06:52 +00:00
Andrew Cagney
2acd126a47 Rewrite the mipsI/II/III pending-slot code. 1998-02-02 13:49:17 +00:00
Andrew Cagney
192ae475f9 Always compile FP code (test for FP at run-time).
Remove dependance of interp.c on gencode.c's output.
1998-02-02 08:25:33 +00:00
Andrew Cagney
fcb12def35 New test - verify sdl insn. 1998-02-02 06:16:07 +00:00
Andrew Cagney
01737f42d8 mips: Add multi-processor support for r5900. Others might work.
common, igen: Fix MP related bugs.
1998-02-01 03:29:48 +00:00
Andrew Cagney
412c4e940e Add config support for the size of the target address and OF cell. 1998-01-31 14:07:23 +00:00
Andrew Cagney
c4db5b04f8 mips - for r5900 generate igen simulator.
igen - stop crash when simulator isn't multi-sim'ed
1998-01-31 06:56:13 +00:00
Andrew Cagney
9ec6741b17 igen: Fix SMP simulator generator support.
Use the bfd-processor name in the sim-engine switch.
	Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
	Update
mips:	Fill in bfd-processor field of model records so that
	they match ../bfd/archures.
1998-01-31 06:23:41 +00:00
Doug Evans
d034002794 * Makefile.in (M32RX_OBJS): Comment out until m32rx port working.
* arch.h (HAVE_CPU_M32R{,X}): Delete, moved to m32r-opc.h.
	* arch.c (machs): Check ifdef HAVE_CPU_FOO for each entry.
1998-01-29 21:03:41 +00:00
Doug Evans
7649e13e67 * Makefile.in (M32RX_OBJS): Comment out until m32rx port working.
* arch.h (HAVE_CPU_M32RX): Likewise.
	* arch.c (machs): Check ifdef HAVE_CPU_FOO for each entry.
1998-01-29 19:25:37 +00:00
Doug Evans
7caebec6f6 * cgen.sh: Portably read parms past $9. 1998-01-29 12:14:10 +00:00
Michael Meissner
241b462435 Print compare bits in human readible form 1998-01-28 23:48:13 +00:00
Ian Carmichael
8ae6b5cd79 * Very, very early support for vu1 based on sce code.
* Modified Files:
*    ChangeLog Makefile.in hardware.c vu1.c vu1.h
* Added Files:
*    libvpe.c libvpe.h vpe.h vu.h
1998-01-28 02:04:32 +00:00
Ian Carmichael
53a560f95a * Incorporate GPR_SET() macro from mips/sim-main.h 1998-01-27 23:16:23 +00:00
Michael Meissner
629cfff05f Exit status is in r0, not r2 1998-01-26 03:23:55 +00:00
Michael Meissner
88f7d309fd If DEBUG has 0x20 set, turn traps into batch debugging 1998-01-25 00:13:19 +00:00
Doug Evans
ea32bce773 sanitize m32rx piece of _sim_cpu 1998-01-23 23:03:29 +00:00
Doug Evans
84af43e37d add m32rx sanitization to tconfig.in 1998-01-23 23:01:06 +00:00
Doug Evans
ed6f14718b * Make-common.in (stamp-tvals): New rule.
(targ-vals.h,targ-map.c): Depend on it.
	(clean): Remove stamp-tvals.
1998-01-23 22:22:23 +00:00
Michael Meissner
8831cb01b0 First round of d10v ABI changes 1998-01-23 16:30:08 +00:00