Commit Graph

75 Commits

Author SHA1 Message Date
Alexandre Oliva de0492b6fb * interp.c (sim_create_inferior): Record program arguments for
later inspection by the trap handler.
(count_argc): New function.
(prog_argv): Declare static.
(sim_write): Declare.
(trap): Implement argc, argnlen and argn system calls. Do not
abort on unknown system calls--simply return -1.
* syscall.h (SYS_argc, SYS_argnlen, SYS_argn): Define.
2001-01-30 23:03:56 +00:00
Alexandre Oliva 554064594b * interp.c (trap): Implement time. 2001-01-24 13:17:01 +00:00
Ben Elliston 8f1e3ff591 * pendanticism
2000-10-24  Ben Elliston  <bje@redhat.com>

	* gencode.c (tab): Delimit strings with commas where applicable.
2000-10-24 01:02:53 +00:00
Andrew Cagney eb2d80b469 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
Joern Rennecke 63978407cb sh-dsp support, simulator speedup by using host byte order:
sim:
	* Makefile.in (interp.o): Depends on ppi.c .
	(ppi.c): New rule.
	* gencode.c (printonmatch, think, genopc): Deleted.
	(MAX_NR_STUFF): Now 42.
	(tab): Add SH-DSP CPU instructions.
	Amalgamate ldc / stc / lds / sts instructions with similar
	bit patterns.  Fix opcodes of stc Rm_BANK,@-<REG_N>.
	Fix semantics of lds.l @<REG_N>+,MACH (no sign extend).
	(movsxy_tab): New array.
	For movs, change MMMM field to GGGG, and mmmm field to MMMM.
	Added entries for movx, movy and parallel processing insns.
	(ppi_tab): New array.
	(qfunc): Stabilize sort.
	(expand_opcode): Handle [01][01]NN, [01][01]xx and [01][01]yy.
	Handle 'M', 'G' 's' 'X', 'a', 'Y' and 'A'.
	(dumptable): Now takes three arguments.  Changed all callers.
	Emit just one contigous jump table.
	(filltable): Now takes an argument.  Changed all callers.
	Make index static.
	(ppi_moves, expand_ppi_code, ppi_filltable, ppi_gensim): New functions.
	(gensim_caselist): New function, broken out of gensim.
	Handle opcode fields 'x', 'y', 's', 'M', 'G', 'X', 'a', and 'Y'.
	Handle ref '9'.
	(gensim): Handle 'N' in code field and '8' in refs field.
	Call gensim_caselist - twice.
	(ppi_index): New static variable.
	(main): Unsupport default action.
	Add dsp support for -x / -s option.  Add -p option.
	* interp.c (sh_jump_table, sh_dsp_table, ppi_table): Declare.
	(saved_state_type): Rearrange to allow amalgamated ldc / stc /
	lds / sts to work efficiently.
	(target_dsp): New static variable.
	(GBR, VBR, SSR, SPC, MACH, MACL): Reflect saved_state_type change.
	(FPUL, Rn_BANK, SET_Rn_BANK, M, Q, S, T, SR_BL, SR_RB): Likewise.
	(SR_MD, SR_RC, SET_SR_BIT, GET_SR, SET_RC, GET_FPSCR): Likewise.
	(RS, RE, MOD, MOD_ME, DSP_R): Likewise.
	(set_fpscr1): Likewise.  Use target_dsp to check for dsp.
	(MOD_MSi, SIG_BUS_FETCH): Deleted.
	(CREG, SREG, PR, SR_MASK_DMY, SR_MASK_DMX, SR_DMY): New macros.
	(SR_DMX, DSR, MOD_DELTA, GET_DSP_GRD): Likewise.
	(SET_MOD): Reflect saved_state_type change.  Set MOD_DELTA instead
	of MOD_MS, and encode SR_DMY / SR_DMX into high word of MOD_ME.
	(set_sr): Reflect saved_state_type change.  Fix SR_RB handling.
	Use SET_MOD.
	(MA, L, TL, TB): Now controlled by ACE_FAST.
	(SEXT32): Just cast to int.
	(SIGN32): Fixed to only shift by 31.
	(CHECK_INSN_PTR): SIGBUS at insn fetch now represented by insn_end 0.
	(ppi_insn): Declare.
	(ppi.c): Include.
	(init_dsp): Set target_dsp.  When it changes, switch end of
	sh_jump_table with sh_dsp_table.
	(sim_resume) Don't declare sh_jump_table0.  Use sh_jump_table instead.
	Don't Declare PR if it's #defined.
	Fix single-stepping (Was broken in Mar  6 16:59:10 patch).
	(sim_store_register, sim_read_register): Translate accesses to
	reflect saved_state_type change.

	* interp.c (set_sr): Set sr.
	(SET_RC, MOD, MOD_MS, MOD_ME, SET_MOD, MOD_MS, MOD_ME): New macros.
	(set_fpscr1): Don't bank-switch fpu registers when simulating sh-dsp.
	(DSP_R): Fix definition.
	(sim_resume): Remove outdated SET_SR use.

	* interp.c (saved_state): New members for struct member asregs:
	rs, re, insn_end, xram_start, yram_start.
	(struct loop_bounds): New struct.
	(SKIP_INSN): New macro.
	(get_loop_bounds): New function.
	(endianw): Renamed to global_endianw.
	(maskw): negated bits.
	(PC): Now insn_ptr.
	(SR_MASK_RC, SR_RC_INCREMENT, SR_RC, RAISE_EXCEPTION): New macros.
	(RS, RE, DSP_R, DSP_GRD, A1, A0, X0, X1, Y0, Y1, M0, A1G): Likewise.
	(M1, A0G, RIAT, PT2H, PH2T, SET_NIP, CHECK_INSN_PTR): Likewise.
	(SIG_BUS_FETCH): Likewise
	(raise_exception, riat_fast): New functions.
	(raise_buserror, sim_stop): Use raise_exception.
	(PROCESS_SPECIAL_ADDRESS): Use xram_start / yram_start.
	(BUSERROR, WRITE_BUSERROR, READ_BUSERROR):
	Reverse sense of mask argument.
	(FP_OP, set_dr): Use RAISE_EXCEPTION.
	(wlat_fast, wwat_fast, wbat_fast, rlat_fast, rwat_fast, rbat_fast):
	Declare.  Remove redundant masking.
	(wwat_fast, rwat_fast): Add argument endianw.  Changed callers.
	(MA): Updated for change pc -> PC.
	(Delay_Slot): Use RIAT.
	(empty): Deleted.
	(trap): Remove argument little_endian.  Add argument endianw.
	Changed all callers.  Use raise_exception.
	(macw): Add argument endainw.  Changed all callers.
	(init_dsp): New function, extended after broken out of init_pointers.
	(sim_resume): Replace pc with insn_ptr.  Replace little_endian with
	endianw.  Replace nia with nip.  Reverse sense of maskb / maskw /
	maskl.  Implement logic for zero-overhead loops.  Don't try to
	interpret garbage when getting a SIGBUS at insn fetch.
	(sim_open): Call init_dsp.
	* gencode.c (tab): Use SET_NIP instead of nia = .  Use PH2T / PT2H /
	RAISE_EXCEPTION where appropriate.
	Add extra cycles for brai, braf , bsr, bsrf, jmp, jsr.

	* interp.c (sim_store_register, sim_fetch_register):
	Do proper endianness switch.

	* interp.c (saved_state_type): New members for struct member asregs:
	xymem_select, xmem, ymem, xmem_offset, ymem_offset.
	(special_address): Delete.
	(BUSERROR): Now a two-argument predicate.
	(PROCESS_SPECIAL_ADDRESS, WRITE_BUSERROR, READ_BUSERROR): New macros.
	(wlat_little, wwat_little, wbat_any, wlat_big, wwat_big): Delete.
	(process_wlat_addr, process_wwat_addr): New functions.
	(process_wbat_addr, process_rlat_addr, process_rwat_addr): Likewise.
	(process_rbat_addr): Likewise.
	(wlat_fast, wwat_fast, wbat_fast): Use WRITE_BUSERROR.
	(rlat_little, rwat_little, rbat_any, rlat_big, rwat_big): Delete.
	(rlat_fast, rwat_fast, rbat_fast): Use READ_BUSERROR.
	(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Delete SLOW versions.
	(do_rdat, trap): Delete SLOW code.
	(SEXT32, SIGN32): New macros.
	(swap, swap16): Now integer in - integer out.  Changed all callers.
	(strswaplen, strnswap): Delete SLOW versions.
	(init_pointers): Initialize dsp memory selection (preliminary).
	(sim_store_register, sim_fetch_register): Use swap instead of
	big / little endian read / write functions.

	* interp.c (maskl): Deleted.
	(endianw, endianb): New variables.
	(special_address): Now inline.
	(bp_holder): Put raising of buserror there, rename to:
	(raise_buserror).
	(BUSERROR): Now yields a value.  Changed all users.
	(wbat_big): Delete.
	(wlat_fast, wwat_fast, wbat_fast): New functions.
	(rlat_fast, rwat_fast, rbat_fast): Likewise.
	(RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Use new functions.
	(do_rdat, do_wdat): Likewise.  Take maskl argument instead of
	little_endian one.  Changed caller macros.
	(swap, swap16): Use w[rw]lat_big / w[rw]lat_little directly.
	(strswaplen, strnswap): New functions.
	(trap): Use them to fix up endian mismatches;
	disable SYS_execve and SYS_execv; fix double address translation for
	SYS_pipe and SYS_stat.
	(sym_write, sym_read): Add endianness translation.
	(sym_store_register, sym_fetch_register): Add maskl local variable.
	(sim_open): Set endianw and endianb.

gdb:

	* sh-tdep.c (sh_dsp_reg_names, sh3_dsp_reg_names): New arrays.
	(sh_processor_type_table): Add entries for bfd_mach_sh_dsp and
	 bfd_mach_sh3_dsp.
	(sh_show_regs): Floating point registers are called fr0-fr15.
	For sh4, display fpul, fpscr and fr0-fr15 / dr0-dr14 as appropriate.
	Handle sh-dsp and sh3-dsp.
	config/sh/tm-sh.h (REGISTER_VIRTUAL_TYPE): sh-dsp / sh3-dsp
	don't have floating point registers.
	(DSR_REGNUM, A0G_REGNUM, A0_REGNUM, A1G_REGNUM, A1_REGNUM): Define.
	(M0_REGNUM, M1_REGNUM, X0_REGNUM, X1_REGNUM, Y0_REGNUM): Likewise.
	(Y1_REGNUM, MOD_REGNUM, RS_REGNUM, RE_REGNUM, R0B_REGNUM): Likewise.
2000-05-15 21:12:42 +00:00
Stan Shebs d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Jason Molenda 104c1213b4 import gdb-1999-08-30 snapshot 1999-08-31 01:14:27 +00:00
Stan Shebs cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs 7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs 071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Tom Tromey 5da9ce07eb * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* acconfig.h: New file.
	* configure.in: Reverted change of Apr 24; use sinclude again.
1998-04-26 22:03:55 +00:00
Tom Tromey b1df34b9ed * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* configure.in: Don't call sinclude.
1998-04-24 20:39:48 +00:00
Andrew Cagney 412c4e940e Add config support for the size of the target address and OF cell. 1998-01-31 14:07:23 +00:00
Doug Evans 462cfbc4eb * aclocal.m4: Recognize --enable-maintainer-mode.
*/configure: Regenerated.
1998-01-20 06:37:00 +00:00
Andrew Cagney 9e03a68f13 Add LMA_P and DO_WRITE arguments to sim/common/sim-load.c:sim_load_file().
Update all simulators.
Clarify behavour of sim_load in remote-sim.h
1997-10-22 05:26:27 +00:00
Andrew Cagney 92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
1997-09-23 01:25:26 +00:00
Andrew Cagney 794e9ac96a Simplify logic behind the generic configuration option --enable-sim-alignment. 1997-09-22 02:49:57 +00:00
Andrew Cagney b45caf050c Add support for --enable-sim-alignment to simulator common aclocal.m4
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
1997-09-22 00:24:46 +00:00
Felix Lee a1efa0d880 * interp.c (sim_resume): poll_quit() at least once per call;
otherwise gdb can loop sim_resume() uninterruptably.
1997-09-10 03:52:48 +00:00
David Edelsohn 6fea47635b * configure: Regenerated to track ../common/aclocal.m4 changes. 1997-09-05 00:42:05 +00:00
Andrew Cagney 4de6b5d361 Merge SH4 branch simulator in to devo. 1997-09-02 03:49:55 +00:00
Andrew Cagney 8811705410 Fix doco on enable-sim-inline. 1997-08-27 22:43:18 +00:00
Andrew Cagney fafce69ab1 Add ABFD argument to sim_create_inferior. Document.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00
Andrew Cagney 7230ff0faa Flush defunct sim_kill. 1997-08-26 02:05:18 +00:00
Andrew Cagney 247fccdeb5 Add ABFD argument to sim_open call. Pass through to sim_config so
that image properties such as endianness can be checked.

More strongly document the expected behavour of each of the sim_*
interfaces.

Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN.  Use in sim_config.
1997-08-25 23:14:25 +00:00
David Edelsohn 73da4db587 * tconfig.in: New file.
* interp.c (sim_open): Handle missing arg to -E.
1997-04-24 00:56:33 +00:00
Stu Grossman 99f347be32 * Makefile.in: Add clean targets. 1997-04-22 15:56:45 +00:00
Stu Grossman 2717217130 * interp.c: Include float.h and define SIGTRAP if _WIN32.
WIN32 -> _WIN32.
	* (trap):  Do do SYS_chown for _WIN32.
1997-04-19 01:59:09 +00:00
David Edelsohn d90eb3ff6b * interp.c (sim_resume): Fix argument to poll_quit. 1997-04-18 20:33:27 +00:00
Andrew Cagney 8517f62b16 Ref gdb/11763 - can't stop a running simulator:
o	Provide poll_quit callback to simulators
		so that they can poll for SIGINT on
		clueless OS's.

	o	Add sim_stop to simulators so that clients
		can request a halt (eg gdbtk's STOP button)
		Works for PPC!

	o	Re-arange remote-sim.c so that the
		hard work is moved from gdbsim_resume()
		to gdbsim_wait() (where it should be).
1997-04-18 12:24:52 +00:00
David Edelsohn 1d77e69d4a * Makefile.in (SIM_OBJS): Add sim-load.o.
* interp.c (target_byte_order): Delete.
	(sim_kind, myname, little_endian_p): New static locals.
	(init_pointers): Use little_endian_p instead of target_byte_order.
	(sim_resume): Likewise.
	(sim_open): Set sim_kind, myname.  Set little_endian_p from -E arg.
	(sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
	load file into simulator.  Set start address from bfd.
	(sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1997-04-17 10:52:59 +00:00
David Edelsohn 8a7c3105b5 * interp.c (sim_open): New arg `kind'. 1997-04-02 23:39:50 +00:00
David Edelsohn fbda74b1c1 * aclocal.m4: Check for stdlib.h, string.h, strings.h, unistd.h.
(sim-debug): Allow arguments.  Define WITH_DEBUG in addition to
	-DDEBUG.
	* configure: Regenerated to track ../common/aclocal.m4 changes.
1997-04-02 23:17:50 +00:00
Andrew Cagney a35e91c3c7 New file common/sim-config.c sets/checks simulator configuration options.
Update common/aclocal.m4 to better work with sim-config.[hc].
1997-04-02 05:04:25 +00:00
Andrew Cagney c695046ac9 Move SIM_AC_OPTION_ macros out of SIM_AC_COMMON macro - was trashing
optional arguments.
* Regenerate all configure scripts.
1997-03-18 14:28:34 +00:00
Andrew Cagney a77aa7ec4b * configure: Re-generate.
* Make-common.in (CSEARCH): Do not include the gdb directory in
        the search path.
        * Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE,
        SIM_WARNING): Drop, requiring the simulator specific Makefile.in
        to explicitly incorporate these.

        * aclocal.m4 (--enable-sim-alignment); New option. Strongly
        specify the alignment restrictions of the target architecture -
        without this option all alignment restrictions are accomodated.
        (--enable-sim-assert): New option.  Conditionally compile in
        assertion statements.
        (--enable-sim-float): New option. Strongly specify the target's
        floating point support.
        (--enable-sim-hardware): New option.  Specify the hardware devices
        included in the simulation.
        (--enable-sim-packages): New option.  Specify the hardware
        packages included in the simulation.
        (--enable-sim-regparm): New option.  Specify that parameters be
        passed in registers instead of on the stack.
        (--enable-sim-reserved-bits): New option. Specify that reserved
        bits within an instruction are are correctly set.
        (--enable-sim-smp): New option. Specify the level of SMP support
        to be included in the simulator.
        (--enable-sim-stdcall): New option.  Specify an alternative
        function call convention.
        (--enable-sim-xor-endian): New option.  Configure xor-endian
        support used by some targets to implement bi-endian support.
1997-03-17 15:29:29 +00:00
Michael Meissner 601fb8aea6 Regenerate simulator configure scripts; Remove d10v traps 1-3, Make 15 the system call trap, keeping 0 temporarily 1997-03-14 16:21:57 +00:00
David Edelsohn 0b0cc453a4 * interp.c (sim_open): New SIM_DESC result. Argument is now
in argv form.
	(other sim_*): New SIM_DESC argument.
1997-03-13 21:01:38 +00:00
Stu Grossman 295dbbe44c * configure configure.in Makefile.in: Update to new configure
scheme which is more compatible with WinGDB builds.
	* configure.in:  Improve comment on how to run autoconf.
	* configure:  Re-run autoconf to get new ../common/aclocal.m4.
	* Makefile.in:  Use autoconf substitution to install common
	makefile fragment.
1997-01-23 22:09:52 +00:00
J.T. Conklin 2434e38489 * gencode.c (tab): Added several sh3 opcodes.
(think): Added printonmatch for A_SSR and A_SPC.
* interp.c (SSR, SPC): Added definitions.
(saved_state_type): Added ssr and spc registers.
1995-12-04 20:27:38 +00:00
Jim Wilson 9dfb65e661 * gencode.c (tab): In shad/shld definitions, negate R[m] before
the and operation instead of after.  For shad delete cast.  For shld
	use UR instead of R and delete cast.
1995-11-29 20:41:46 +00:00
Jim Wilson 708f6147e4 Patch for Hitachi PR 8433, avoid core dump on HPUX host
* gencode.c (tab): Add explicit NaN support for ftrc instruction.
1995-11-18 02:03:21 +00:00
Stu Grossman fe2f8313f0 * gencode.c: jsr, bsr and bsrf actually save pc+4 in pr, and rts
actually uses pr+0.
1995-11-15 00:47:21 +00:00
Stu Grossman 9999417ef6 * gencode.c: jsr actually saves pc+4, and rts actually uses pr+0. 1995-11-14 23:42:22 +00:00
Jim Wilson 99e6fd41ea Indicate SIGILL instead of calling abort for default case. 1995-10-21 21:38:40 +00:00
Jim Wilson 0e1815de9d * interp.c (callback): Remove last change. It is initialized by
a sim_set_callbacks call.
1995-10-06 19:15:06 +00:00
Jim Wilson 437fb926e6 * interp.c (trap, case SYS_utime): Cast second arg of utime to
void * to avoid compiler error.
1995-10-06 19:13:13 +00:00
Steve Chamberlain 28920b9dbb * interp.c (callback): Initialize to default callback. 1995-10-05 21:14:21 +00:00
Ian Lance Taylor 602677ad44 add maintainer-clean Makefile targets 1995-09-20 17:38:13 +00:00