* h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
fields.
(h8_opcodes). Modify initializer and initializer macros to no
longer initialize the removed fields.
* h8300.h (h8_opcode): Remove 'length' field.
(h8_opcodes): Mark as 'const' (both the declaration and
definition). Modify initializer and initializer macros to no
longer initialize the length field.
2002-11-11 Klee Dienes <kdienes@apple.com>
* h8300-dis.c: Include libiberty.h (for xmalloc).
(struct h8_instruction): New type, used to wrap h8_opcodes with a
length field (computed at run-time).
(h8_instructions): New variable.
(bfd_h8_disassemble_init): Allocate the storage for
h8_instructions. Fill h8_instructions with pointers to the
appropriate opcode and the correct value for the length field.
(bfd_h8_disassemble): Iterate through h8_instructions instead of
h8_opcodes.
* arc.h (arc_ext_opcodes): Declare as extern.
(arc_ext_operands): Declare as extern.
* i860.h (i860_opcodes): Declare as const.
2002-11-18 Klee Dienes <kdienes@apple.com>
* arc-opc.c (arc_ext_opcodes): Define.
(arc_ext_operands): Define.
* i386-dis.c (Suffix3DNow): Declare as const.
* arm-opc.h (arm_opcodes): Declare as const.
(thumb_opcodes): Declare as const.
* h8500-opc.h (h8500_table): Declare as const.
(h8500_table): Use a NULL for the opcode in the terminator, so
that code testing (opcode->name) behaves correctly.
* mcore-opc.h (mcore_table): Declare as const.
* sh-opc.h (sh_table): Declare as const.
* w65-opc.h (optable): Declare as const.
* z8k-opc.h (z8k_table): Declare as const.
From matthew green <mrg@redhat.com>
* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
instructions.
(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
e500x2 Integer select, branch locking, performance monitor,
cache locking and machine check APUs, respectively.
(PPC_OPCODE_EFS): New opcode type for efs* instructions.
(PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
(mips_ip): Likewise.
* mips.h (INSN_MIPS16): New define.
* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
* mips-opc.c (I16): New define.
(mips_builtin_opcodes): Make jalx an I16 insn.
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
(mips_opts): Initialize "ase_mdmx" member.
(file_ase_mdmx): New variable.
(CPU_HAS_MDMX): New macro.
(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
based on command line options and configuration defaults.
(macro_build): Note in comment that use of MDMX in macros is
not currently allowed.
(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
"Z" MDMX operand types.
(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
types.
(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
Add support for "-mdmx" and "-no-mdmx" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mdmx" and ".set nomdmx".
(mips_elf_final_processing): Set MDMX ASE ELF header flag if
file_ase_mdmx was set.
* doc/as.texinfo: Document -mdmx and -no-mdmx options.
* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
nomdmx" directives.
[ gas/testsuite/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mdmx.s: New file.
* gas/mips/mips64-mdmx.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mdmx" test.
[ include/opcode/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
(INSN_MDMX): New constants, for MDMX support.
(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
[ opcodes/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
and 'Z' formats, for MDMX.
(mips_isa_type): Add MDMX instructions to the ISA
bit mask for bfd_mach_mipsisa64.
* mips-opc.c: Add support for MDMX instructions.
(MX): New definition.
* mips-dis.c: Update copyright years to include 2002.
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mips3d" member.
(mips_opts): Initialize "ase_mips3d" member.
(file_ase_mips3d): New variable.
(CPU_HAS_MIPS3D): New macro.
(md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d
based on command line options and configuration defaults.
(macro_build, mips_ip): Accept MIPS-3D instructions if
mips_opts.ase_mips3d is set.
(OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option):
Add support for "-mips3d" and "-no-mips3d" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mips3d" and ".set nomips3d".
(mips_elf_final_processing): Add a comment indicating that a
MIPS-3D ASE ELF header flag should be set, when one exists.
* doc/as.texinfo: Document -mips3d and -no-mips3d options.
* doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set
nomips3d" directives.
[ gas/testsuite/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mips3d.s: New file.
* gas/mips/mips64-mips3d.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mips3d" test.
[ include/opcode/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
instructions.
(OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
may be passed along with the ISA bitmask.
[ opcodes/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add
comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
indicate that they should dissassemble all applicable
MIPS-specified ASEs.
* mips-opc.c: Add support for MIPS-3D instructions.
(M3D): New definition.
* mips-opc.c: Update copyright years.
* config/tc-ppc.c (md_parse_option): BookE is not Motorola specific.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
(PPC_OPCODE_BOOKE64): Likewise.
accept WordReg.
* i386-dis.c (grps): Change "sldt", "str", and "smsw" entries
to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand
category instead of Ew.
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips.exp (sb1-ext-ps): New test to test
SB-1 core's paired-single extensions to the MIPS64 ISA.
* gas/mips/sb1-ext-ps.d: New file.
* gas/mips/sb1-ext-ps.s: New file.
[include/opcode/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips.h (INSN_SB1): New cpu-specific instruction bit.
(OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
if cpu is CPU_SB1.
[opcodes/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Make the ISA used to disassemble
SB-1 binaries include instructions specific to the SB-1.
* mips-opc.c (SB1): New definition.
(mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
"recip.ps", "rsqrt.ps", and "sqrt.ps".
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-06-13 Geoffrey Keating <geoffk@redhat.com>
* cgen-asm.c (cgen_parse_keyword): When looking for the
boundaries of a keyword, allow any special characters
that are actually in one of the allowed keyword.
* cgen-opc.c (cgen_keyword_add): Add any special characters
to the nonalpha_chars field.
Index: cgen/ChangeLog
2001-06-13 Geoffrey Keating <geoffk@redhat.com>
* desc.scm (<keyword> 'gen-defn): Add extra zero into
CGEN_KEYWORD_ENTRY initializers.
Index: include/opcode/ChangeLog
2001-06-13 Geoffrey Keating <geoffk@redhat.com>
* cgen.h (cgen_keyword): Add nonalpha_chars field.
operands is greater than 127.
2001-02-02 Patrick Macdonald <patrickm@redhat.com>
* cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
(CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
(CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
* fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS.
* m32r-desc.h: Regenerate.
* cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
of operands (unsigned char or unsigned short).
(CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
(CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
(QWORD_MNEM_SUFFIX): New macro.
(CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags):
New macros
(CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber.
(IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix,
ImmExt): Renumber.
(Size64, No_qSuf, NoRex64, Rex64): New macros.
(Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros.
(Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32,
InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc,
SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber.
(Reg, WordReg): Add Reg64.
(Imm): Add Imm32S and Imm64.
(EncImm): New.
(Disp): Add Disp64 and Disp32S.
(AnyMem): Add Disp32S.
(RegRex, RegRex64): New macros.
(rex_byte): New type.
* tc-i386.c (set_16bit_code_flag): Kill.
(fits_in_unsigned_long, fits_in_signed_long): New functions.
(reloc): New parameter "signed"; support x86_64.
(set_code_flag): New.
(DEFAULT_ARCH): New macro; default to "i386".
(default_arch): New static variable.
(struct _i386_insn): New fields Operand_PCrel; rex.
(flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT";
(flag_code): New enum and static variable.
(use_rela_relocations): New static variable.
(flag_code_names): New static variable.
(cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64.
(cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to
K6 and Athlon.
(i386_align_code): Return plain "nop" for x86_64.
(mode_from_disp_size): Support Disp32S.
(smallest_imm_type): Support Imm32S and Imm64.
(offset_in_range): Support size of 8.
(set_cpu_arch): Do not clobber to Cpu64/CpuNo64.
(md_pseudo_table): Add "code64"; use set_code_flat.
(md_begin): Emit sane error message on hash failure.
(tc_i386_fix_adjustable): Support x86_64 relocations.
(md_assemble): Support QWORD_MNEM_SUFFIX, REX registers,
instructions supported on particular arch just partially,
output of 64bit immediates, handling of Imm32S and Disp32S type.
(i386_immedaite): Support x86_64 relocations; support 64bit constants.
(i386_displacement): Likewise.
(i386_index_check): Cleanup; support 64bit addresses.
(md_apply_fix3): Support x86_64 relocation and rela.
(md_longopts): Add "32" and "64".
(md_parse_option): Add OPTION_32 and OPTION_64.
(i386_target_format): Call even for ELFs; choose between
elf64-x86-64 and elf32-i386.
(i386_validate_fix): Refuse GOTOFF in 64bit mode.
(tc_gen_reloc): Support rela relocations and x86_64.
(intel_e09_1): Support QWORD.
* i386.h (i386_optab): Replace "Imm" with "EncImm".
(i386_regtab): Add flags field.
* approved by nickc
[opcodes/ChangeLog]
2000-05-16 Frank Ch. Eigler <fche@redhat.com>
* fr30-desc.h: Partially regenerated to account for changed
CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
* m32r-desc.h: Ditto.
[include/opcode/ChangeLog]
2000-05-16 Frank Ch. Eigler <fche@redhat.com>
* cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
(CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
New operand types l,y,&,fe,fE,fx added to support above forms.
(pa_opcodes): Replaced usage of 'x' as source/target for
floating point double-word loads/stores with 'fx'.
Fr
the errors exposed by this addition. These were intel mode
"fi... word ptr", "fi... dword ptr", "jmp Imm seg, Imm offset", "out dx,al".
The failure with intel "out dx,al" was also present in att "out al,dx".
Extend testsuite to catch this case too.
* mips.h (OPCODE_IS_MEMBER): New.
For gas:
* config/tc-mips.c (macro_build): Use OPCODE_IS_MEMBER.
(mips_ip): Use OPCODE_IS_MEMBER.
For opcodes:
* mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
instructions. Add ordered access load and store.
* hppa.h (pa_opcode): Add new entries for addb and addib.
* hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
* hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
Alan Modra
Klee Dienes
Svein Seldal
Richard Sandiford
Elena Zannoni
Stephane Carrez
Thiemo Seufer
Chris Demetriou
Nick Clifton
Andrey Volkov
Jan Hubicka
Graydon Hoare
Matthew Green
Jeff Law
Alexandre Oliva
Timothy Wall
Richard Henderson
Eric Christopher
Andreas Jaeger
Frank Ch. Eigler
Ben Elliston
Geoffrey Keating
John Healy
Hans-Peter Nilsson
Kazu Hirata
Patrick Macdonald
Jeff Johnston
Jakub Jelinek
Jim Wilson
H.J. Lu
Denis Chertykov
Dave Brolley
Donald Lindsay
J.T. Conklin
Andrew Haley
Gavin Romig-Koch
Michael Meissner
Diego Novillo