Commit Graph

12866 Commits

Author SHA1 Message Date
Maciej W. Rozycki
a6ebf6169a MIPS: Convert cross-mode BAL to JALX
Convert cross-mode regular MIPS and microMIPS BAL instructions to JALX,
similarly to how JAL instructions are converted.

	bfd/
	* elfxx-mips.c (mips_elf_perform_relocation): Convert cross-mode
	BAL to JALX.
	(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add a
	corresponding error message.

	gas/
	* config/tc-mips.c (mips_force_relocation, mips_fix_adjustable):
	Adjust comments for BAL to JALX linker conversion.
	(fix_bad_cross_mode_branch_p): Accept cross-mode BAL.
	* testsuite/gas/mips/unaligned-branch-1.l: Update error messages
	expected.
	* testsuite/gas/mips/unaligned-branch-micromips-1.l: Likewise.
	* testsuite/gas/mips/branch-local-4.d: New test.
	* testsuite/gas/mips/branch-local-n32-4.d: New test.
	* testsuite/gas/mips/branch-local-n64-4.d: New test.
	* testsuite/gas/mips/branch-addend.d: New test.
	* testsuite/gas/mips/branch-addend-n32.d: New test.
	* testsuite/gas/mips/branch-addend-n64.d: New test.
	* testsuite/gas/mips/branch-local-4.s: New test source.
	* testsuite/gas/mips/branch-addend.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/unaligned-branch-2.d: Update error
	messages expected.
	* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise.
	* testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise.
	* testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise.
	* testsuite/ld-mips-elf/bal-jalx-addend.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-local.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-pic.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-addend-n32.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-local-n32.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-pic-n32.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-addend-n64.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-local-n64.d: New test.
	* testsuite/ld-mips-elf/bal-jalx-pic-n64.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-3.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: New test.
	* testsuite/ld-mips-elf/unaligned-jalx-2.s: New test source.
	* testsuite/ld-mips-elf/unaligned-jalx-3.s: New test source.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-2.s: New test
	source.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-3.s: New test
	source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-19 16:22:53 +01:00
Maciej W. Rozycki
9d862524f6 MIPS: Verify the ISA mode and alignment of branch and jump targets
Verify that the ISA mode of branch targets is the same as the referring
relocation, so that an attempt to produce a branch between instructions
encoded in different ISA modes each causes an error rather than silently
producing non-functional code.  Make sure that no symbol or addend bits
are silently truncated: terminate with an error if the relocation value
calculated cannot be encoded in the relocatable field of a branch; for
REL targets also applying to any intermediate addend.

Also make jump target's alignment verification consistent with that for
branches.

This change will require an update to some obscure handcoded assembly
sources which make branches to labels placed at data objects, however
for microMIPS code only.  These labels will have to be updated with the
`.insn' directive for containing code to assemble and link successfully.
Such code is broken as any such labels have always been required by the
microMIPS architecture specification[1][2] to be annotated this way for
correct interpretation, and with our old code missing `.insn' directives
caused labels to present different semantics depending on whether they
were referred with branch (ISA bit ignored) or other relocations (ISA
bit respected).

Enforcing these checks however will ensure errors in building software,
like mixed regular MIPS and microMIPS code links with branches between,
will be diagnosed at the build time rather than causing odd run-time
errors such as intermittent crashes.  It will also let cross-mode BAL
instructions be converted to JALX instructions, with a separate change.

References:

[1] "MIPS Architecture for Programmers, Volume II-B: The microMIPS32
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
    Revision 5.04, January 15, 2014, Section 7.1 "Assembly-Level
    Compatibility", p. 533

[2] "MIPS Architecture for Programmers, Volume II-B: The microMIPS64
    Instruction Set", MIPS Technologies, Inc., Document Number: MD00594,
    Revision 5.04, January 15, 2014, Section 8.1 "Assembly-Level
    Compatibility", p. 623

	bfd/
	* elfxx-mips.c (b_reloc_p): Add R_MICROMIPS_PC16_S1,
	R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC7_S1.
	(branch_reloc_p): New function.
	(mips_elf_calculate_relocation): Handle ISA mode determination
	for relocations against section symbols, against absolute
	symbols and absolute relocations.  Also set `*cross_mode_jump_p'
	for branches.
	<R_MIPS16_26, R_MIPS_26, R_MICROMIPS_26_S1>: Suppress alignment
	checks for weak undefined symbols.  Also check target alignment
	within the same ISA mode.
	<R_MIPS_PC16, R_MIPS_GNU_REL16_S2>: Handle cross-mode branches
	in the alignment check.
	<R_MICROMIPS_PC7_S1>: Add an alignment check.
	<R_MICROMIPS_PC10_S1>: Likewise.
	<R_MICROMIPS_PC16_S1>: Likewise.
	(mips_elf_perform_relocation): Report a failure for unsupported
	same-mode JALX instructions and cross-mode branches.
	(_bfd_mips_elf_relocate_section) <bfd_reloc_outofrange>: Add
	error messages for jumps to misaligned addresses.

	gas/
	* config/tc-mips.c (mips_force_relocation): Also retain branch
	relocations against MIPS16 and microMIPS symbols.
	(fix_bad_cross_mode_jump_p): New function.
	(fix_bad_same_mode_jalx_p): Likewise.
	(fix_bad_misaligned_jump_p): Likewise.
	(fix_bad_cross_mode_branch_p): Likewise.
	(fix_bad_misaligned_branch_p): Likewise.
	(fix_validate_branch): Likewise.
	(md_apply_fix) <BFD_RELOC_MIPS_JMP, BFD_RELOC_MIPS16_JMP>
	<BFD_RELOC_MICROMIPS_JMP>: Separate from BFD_RELOC_MIPS_SHIFT5,
	etc.  Verify the ISA mode and alignment of the jump target.
	<BFD_RELOC_MIPS_21_PCREL_S2>: Replace the inline alignment check
	with a call to `fix_validate_branch'.
	<BFD_RELOC_MIPS_26_PCREL_S2>: Likewise.
	<BFD_RELOC_16_PCREL_S2>: Likewise.
	<BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1>
	<BFD_RELOC_MICROMIPS_16_PCREL_S1>: Retain the original addend.
	Verify the ISA mode and alignment of the branch target.
	(md_convert_frag): Verify the ISA mode and alignment of resolved
	MIPS16 branch targets.
	* testsuite/gas/mips/branch-misc-1.s: Annotate non-instruction
	branch targets with `.insn'.
	* testsuite/gas/mips/branch-misc-5.s: Likewise.
	* testsuite/gas/mips/micromips@branch-misc-5-64.d: Update
	accordingly.
	* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
	* testsuite/gas/mips/micromips-branch-relax.s: Annotate
	non-instruction branch target with `.insn'.
	* testsuite/gas/mips/micromips.s: Replace microMIPS JALX targets
	with external symbols.
	* testsuite/gas/mips/micromips-insn32.d: Update accordingly.
	* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
	* testsuite/gas/mips/micromips-trap.d: Likewise.
	* testsuite/gas/mips/micromips.d: Likewise.
	* testsuite/gas/mips/mips16.s: Annotate non-instruction branch
	targets with `.insn'.
	* testsuite/gas/mips/mips16.d: Update accordingly.
	* testsuite/gas/mips/mips16-64.d: Likewise.
	* testsuite/gas/mips/mips16-dwarf2.s: Annotate non-instruction
	branch target with `.insn'.
	* testsuite/gas/mips/relax-swap3.s: Likewise.
	* testsuite/gas/mips/branch-local-2.l: New list test.
	* testsuite/gas/mips/branch-local-3.l: New list test.
	* testsuite/gas/mips/branch-local-n32-2.l: New list test.
	* testsuite/gas/mips/branch-local-n32-3.l: New list test.
	* testsuite/gas/mips/branch-local-n64-2.l: New list test.
	* testsuite/gas/mips/branch-local-n64-3.l: New list test.
	* testsuite/gas/mips/unaligned-jump-1.l: New list test.
	* testsuite/gas/mips/unaligned-jump-2.l: New list test.
	* testsuite/gas/mips/unaligned-jump-3.d: New test.
	* testsuite/gas/mips/unaligned-jump-mips16-1.l: New list test.
	* testsuite/gas/mips/unaligned-jump-mips16-2.l: New list test.
	* testsuite/gas/mips/unaligned-jump-mips16-3.d: New test.
	* testsuite/gas/mips/unaligned-jump-micromips-1.l: New list
	test.
	* testsuite/gas/mips/unaligned-jump-micromips-2.l: New list
	test.
	* testsuite/gas/mips/unaligned-jump-micromips-3.d: New test.
	* testsuite/gas/mips/unaligned-branch-1.l: New list test.
	* testsuite/gas/mips/unaligned-branch-2.l: New list test.
	* testsuite/gas/mips/unaligned-branch-3.d: New test.
	* testsuite/gas/mips/unaligned-branch-r6-1.l: New list test.
	* testsuite/gas/mips/unaligned-branch-r6-2.l: New list test.
	* testsuite/gas/mips/unaligned-branch-r6-3.l: New list test.
	* testsuite/gas/mips/unaligned-branch-r6-4.l: New list test.
	* testsuite/gas/mips/unaligned-branch-r6-5.d: New test.
	* testsuite/gas/mips/unaligned-branch-r6-6.d: New test.
	* testsuite/gas/mips/unaligned-branch-mips16-1.l: New list test.
	* testsuite/gas/mips/unaligned-branch-mips16-2.l: New list test.
	* testsuite/gas/mips/unaligned-branch-mips16-3.d: New test.
	* testsuite/gas/mips/unaligned-branch-micromips-1.l: New list
	test.
	* testsuite/gas/mips/unaligned-branch-micromips-2.l: New list
	test.
	* testsuite/gas/mips/unaligned-branch-micromips-3.d: New test.
	* testsuite/gas/mips/branch-local-2.s: New test source.
	* testsuite/gas/mips/branch-local-3.s: New test source.
	* testsuite/gas/mips/branch-local-n32-2.s: New test source.
	* testsuite/gas/mips/branch-local-n32-3.s: New test source.
	* testsuite/gas/mips/branch-local-n64-2.s: New test source.
	* testsuite/gas/mips/branch-local-n64-3.s: New test source.
	* testsuite/gas/mips/unaligned-jump-1.s: New test source.
	* testsuite/gas/mips/unaligned-jump-2.s: New test source.
	* testsuite/gas/mips/unaligned-jump-mips16-1.s: New test source.
	* testsuite/gas/mips/unaligned-jump-mips16-2.s: New test source.
	* testsuite/gas/mips/unaligned-jump-micromips-1.s: New test
	source.
	* testsuite/gas/mips/unaligned-jump-micromips-2.s: New test
	source.
	* testsuite/gas/mips/unaligned-branch-1.s: New test source.
	* testsuite/gas/mips/unaligned-branch-2.s: New test source.
	* testsuite/gas/mips/unaligned-branch-r6-1.s: New test source.
	* testsuite/gas/mips/unaligned-branch-r6-2.s: New test source.
	* testsuite/gas/mips/unaligned-branch-r6-3.s: New test source.
	* testsuite/gas/mips/unaligned-branch-r6-4.s: New test source.
	* testsuite/gas/mips/unaligned-branch-mips16-1.s: New test
	source.
	* testsuite/gas/mips/unaligned-branch-mips16-2.s: New test
	source.
	* testsuite/gas/mips/unaligned-branch-micromips-1.s: New test
	source.
	* testsuite/gas/mips/unaligned-branch-micromips-2.s: New test
	source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/unaligned-jalx-1.d: Update error message
	expected.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d:
	Likewise.
	* testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d:
	Likewise.
	* testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d: Likewise.
	* testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d: Likewise.
	* testsuite/ld-mips-elf/undefweak-overflow.s: Add jumps,
	microMIPS BAL and MIPS16 instructions.
	* testsuite/ld-mips-elf/undefweak-overflow.d: Update
	accordingly.
	* testsuite/ld-mips-elf/unaligned-branch-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-branch-r6-1.d: New test.
	* testsuite/ld-mips-elf/unaligned-branch-r6-2.d: New test.
	* testsuite/ld-mips-elf/unaligned-branch-mips16.d: New test.
	* testsuite/ld-mips-elf/unaligned-branch-micromips.d: New test.
	* testsuite/ld-mips-elf/unaligned-jump-mips16.d: New test.
	* testsuite/ld-mips-elf/unaligned-jump-micromips.d: New test.
	* testsuite/ld-mips-elf/unaligned-jump.d: New test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-19 14:46:30 +01:00
GDB Administrator
a4717ffb7b Automatic date update in version.in 2016-07-19 00:00:21 +00:00
GDB Administrator
faf1390514 Automatic date update in version.in 2016-07-18 00:00:20 +00:00
GDB Administrator
68cd8f1098 Automatic date update in version.in 2016-07-17 00:00:40 +00:00
Alan Modra
7d0b9ebc1e Don't include libbfd.h outside of bfd, part 6
Some messing with plugin code in order to not need arelt_size in
ld code.  File descriptor handling in ld/plugin.c is tidied too,
simply duping the open fd rather than opening the file again.

bfd/
	* elflink.c: Include plugin-api.h.
	* plugin.c (bfd_plugin_open_input): New function, extracted from..
	(try_claim): ..here.
	* plugin.h: Don't include bfd.h.
	(bfd_plugin_open_input): Declare.
binutils/
	* ar.c: Include plugin-api.h.
	* nm.c: Likewise.
ld/
	* plugin.c: Don't include libbfd.h.  Include plugin-api.h
	before bfd/plugin.h.
	(plugin_object_p): Use bfd_plugin_open_input.
2016-07-16 19:09:00 +09:30
Alan Modra
4212b42d79 Don't include libbfd.h outside of bfd, part 4
Not much to see here, just renaming a function.

bfd/
	* targets.c (bfd_seach_for_target): Rename to..
	(bfd_iterate_over_targets): ..this.  Rewrite doc.
	* bfd-in2.h: Regenerate.
ld/
	* ldlang.c (open_output): Replace bfd_search_for_target with
	bfd_iterate_over_targets.  Localize vars.
2016-07-16 13:29:35 +09:30
Alan Modra
00dad9a491 Don't include libbfd.h outside of bfd, part 2
Make bfd_default_set_arch_mach available to a bunch of gas backend
files.

bfd/
	* archures.c (bfd_default_set_arch_mach): Make available in bfd.h.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-epiphany.c: Don't include libbfd.h.
	* config/tc-frv.c: Likewise.
	* config/tc-ip2k.c: Likewise.
	* config/tc-iq2000.c: Likewise.
	* config/tc-m32c.c: Likewise.
	* config/tc-mep.c: Likewise.
	* config/tc-mt.c: Likewise.
	* config/tc-nios2.c: Likewise.
2016-07-16 13:27:30 +09:30
Alan Modra
76e7a75123 Don't include libbfd.h outside of bfd, part 1
Make BFD_ALIGN available to objcopy.  Fix assertions.  Don't use
bfd_log2 in ppc32elf.em or bfd_malloc in xtensaelf.em and bucomm.c.

bfd/
	* libbfd-in.h (BFD_ALIGN): Move to..
	* bfd-in.h: ..here.
	* elf32-ppc.h (struct ppc_elf_params): Add pagesize.
	* elf32-ppc.c (default_params): Adjust init.
	(ppc_elf_link_params): Set pagesize_p2.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
binutils/
	* ar.c: Don't include libbfd.h.
	* objcopy.c: Likewise.
	* bucomm.c (bfd_get_archive_filename): Use xmalloc rather than
	bfd_malloc.
gas/
	* config/bfin-parse.y: Don't include libbfd.h.
	* config/tc-bfin.c: Likewise.
	* config/tc-rl78.c: Likewise.
	* config/tc-rx.c: Likewise.
	* config/tc-metag.c: Likewise.
	(create_dspreg_htabs, create_scond_htab): Use gas_assert not BFD_ASSERT.
	* Makefile.am: Update dependencies.
	* Makefile.in: Regenerate.
ld/
	* ldlang.c: Don't include libbfd.h.
	* emultempl/nds32elf.em: Likewise.
	* emultempl/ppc64elf.em: Likewise.
	* emultempl/ppc32elf.em: Likewise.
	(pagesize): Delete.
	(params): Update init.
	(ppc_after_open_output): Use params.pagesize.  Don't call bfd_log2.
	(PARSE_AND_LIST_ARGS_CASES): Use params.pagesize.
	* emultempl/sh64elf.em: Don't include libbfd.h.
	(after_allocation): Use ASSERT, not BFD_ASSERT.
	* emultempl/xtensaelf.em: Don't include libbfd.h.
	(replace_insn_sec_with_prop_sec): Use xmalloc, not bfd_malloc.
	* Makefile.am: Update dependencies.
	* Makefile.in: Regenerate.
2016-07-16 13:25:11 +09:30
GDB Administrator
235fa74903 Automatic date update in version.in 2016-07-16 00:00:20 +00:00
Thomas Preud'homme
7635954182 Add support for creating ELF import libraries
2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf-bfd.h (elf_backend_filter_implib_symbols): Declare backend hook.
	(_bfd_elf_filter_global_symbols): Declare.
	* elf.c (_bfd_elf_filter_global_symbols): New function.
	* elflink.c (elf_filter_global_symbols): Likewise.
	(elf_output_implib): Likewise.
	(bfd_elf_final_link): Call above function, failing if it does.
	* elfxx-target.h (elf_backend_filter_implib_symbols): Define macro and
	default it to NULL.
	(elf_backend_copy_indirect_symbol): Fix spacing.
	(elf_backend_hide_symbol): Likewise.
	(elfNN_bed): Initialize elf_backend_filter_implib_symbols backend hook.

include/
	* bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
	out_implib_bfd fields.

2016-07-15  Thomas Preud'homme  <thomas.preudhomme@arm.com>
	    Nick Clifton  <nickc@redhat.com>

ld/
	* emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Open import
	library file for writing and initialize implib_bfd field of link_info
	structure.
	* emultempl/pe.em (pe_implib_filename): Remove variable declaration.
	(OPTION_IMPLIB_FILENAME): Remove macro definition.
	(gld${EMULATION_NAME}_add_options): Remove --out-implib option.
	(gld_${EMULATION_NAME}_list_options): Likewise.
	(gld${EMULATION_NAME}_handle_option): Likewise.
	(gld_${EMULATION_NAME}_finish): Use command_line.out_implib_filename
	instead of pe_implib_filename.
	* emultempl/pep.em (pep_implib_filename): Remove variable declaration.
	(OPTION_IMPLIB_FILENAME): Remove enumerator.
	(gld${EMULATION_NAME}_add_options): Remove --out-implib option.
	(gld_${EMULATION_NAME}_list_options): Likewise.
	(gld${EMULATION_NAME}_handle_option): Likewise.
	(gld_${EMULATION_NAME}_finish): Use command_line.out_implib_filename
	instead of pep_implib_filename.
	* ld.h (args_type): Declare new out_implib_filename field.
	* ld.texinfo (--out-implib): Move documentation to arch-independent
	part and rephrase to apply to ELF targets.
	* ldexp.c (exp_fold_tree_1): Set ldscript_def field to 1 for symbols
	defined in linker scripts.
	* ldlex.h (enum option_values): Declare new OPTION_OUT_IMPLIB
	enumerator.
	* lexsup.c (ld_options): Add entry for new --out-implib switch.
	(parse_args): Handle OPTION_OUT_IMPLIB case.
	* testsuite/ld-elf/elf.exp (Generate empty import library): New test.
	(Generate import library): Likewise.
	* testsuite/ld-elf/implib.s: Likewise.
	* testsuite/ld-elf/implib.rd: New file.
	* testsuite/ld-elf/empty-implib.out: Likewise
2016-07-15 17:50:48 +01:00
Nick Clifton
f7e8b360fe Tidy up debugging in the ARC port of the BFD library.
bfd	* elf32-arc.c (PR_DEBUG): Delete.
	Fix printing of debug information.  Fix formatting of debug
	statements.
	(debug_arc_reloc): Handle symbols that are not from an input file.
	(arc_do_relocation): Remove excessive exclamation points.
	(elf_arc_relocate_section): Print an informative message if the
	relocation fails, even if debugging is not enabled.
	* arc-got.h: Fix formatting.  Fix printing of debug information.
	(new_got_entry_to_list): Use xmalloc.
	* config.bfd: use the big-endian arc vector as the default vector
	for big-endian arc targets.

ld	* testsuite/ld-arc/arc.exp: Always run the sda-relocs test in
	little endian mode.
2016-07-15 12:00:03 +01:00
Alan Modra
06ab6faf83 COFF buffer overflow in mark_relocs
* cofflink.c (mark_relocs): Exclude relocs with -1 r_symndx
	from marking sym_indices.
2016-07-15 17:02:00 +09:30
GDB Administrator
50c1cbe189 Automatic date update in version.in 2016-07-15 00:00:23 +00:00
Maciej W. Rozycki
0c11728627 BFD: Let targets handle relocations against absolute symbols
Fix a generic BFD issue with relocations against absolute symbols, which
are installed without using any individual relocation handler provided
by the backend.  This causes any absolute section's addend to be lost on
REL targets such as o32 MIPS, and also relocation-specific calculation
adjustments are not made.

As an example assembling this program:

$ cat test.s
	.text
foo:
	b	bar
	b	baz

	.set	bar, 0x1234
$ as -EB -32 -o test-o32.o test.s
$ as -EB -n32 -o test-n32.o test.s

produces this binary code:

$ objdump -dr test-o32.o test-n32.o

test-o32.o:     file format elf32-tradbigmips

Disassembly of section .text:

00000000 <foo>:
   0:	10000000 	b	4 <foo+0x4>
			0: R_MIPS_PC16	*ABS*
   4:	00000000 	nop
   8:	1000ffff 	b	8 <foo+0x8>
			8: R_MIPS_PC16	baz
   c:	00000000 	nop

test-n32.o:     file format elf32-ntradbigmips

Disassembly of section .text:

00000000 <foo>:
   0:	10000000 	b	4 <foo+0x4>
			0: R_MIPS_PC16	*ABS*+0x1230
   4:	00000000 	nop
   8:	10000000 	b	c <foo+0xc>
			8: R_MIPS_PC16	baz-0x4
   c:	00000000 	nop
$

where it is clearly visible in `test-o32.o', which uses REL relocations,
that the absolute section's addend equivalent to the value of `bar' -- a
reference to which cannot be fully resolved at the assembly time,
because the reference is PC-relative -- has been lost, as has been the
relocation-specific adjustment of -4, required to take into account the
PC+4-relative calculation made by hardware with branches and seen in the
external symbol reference to `baz' as the `ffff' addend encoded in the
instruction word.  In `test-n32.o', which uses RELA relocations, the
absolute section's addend has been correctly retained.

Give precedence then in `bfd_perform_relocation' and
`bfd_install_relocation' to any individual relocation handler the
backend selected may have provided, while still resorting to the generic
calculation otherwise.  This retains the semantics which we've had since
forever or before the beginning of our repository history, and is at the
very least compatible with `bfd_elf_generic_reloc' being used as the
handler.

Retain the `bfd_is_und_section' check unchanged at the beginning of
`bfd_perform_relocation' since this does not affect the semantics of the
function.  The check returns the same `bfd_reloc_undefined' code the
check for a null `howto' does, so swapping the two does not matter.
Also the check is is mutually exclusive with the `bfd_is_abs_section'
check, since a section cannot be absolute and undefined both at once, so
swapping the two does not matter either.

With this change applied the program quoted above now has the in-place
addend correctly calculated and installed in the field being relocated:

$ objdump -dr fixed-o32.o

fixed-o32.o:     file format elf32-tradbigmips

Disassembly of section .text:

00000000 <foo>:
   0:	1000048c 	b	1234 <bar>
			0: R_MIPS_PC16	*ABS*
   4:	00000000 	nop
   8:	1000ffff 	b	8 <foo+0x8>
			8: R_MIPS_PC16	baz
   c:	00000000 	nop
$

Add a set of MIPS tests to cover the relevant cases, including absolute
symbols with addends, and verifying that PC-relative relocations against
symbols concerned resolve to the same value in the final link regardless
of whether the REL or the RELA relocation form is used.  Exclude linker
tests though which would overflow the in-place addend on REL targets and
use them as dump patterns for RELA targets only.

	bfd/
	* reloc.c (bfd_perform_relocation): Try the `howto' handler
	first with relocations against absolute symbols.
	(bfd_install_relocation): Likewise.

	gas/
	* testsuite/gas/mips/mips16-branch-absolute.d: Update patterns.
	* testsuite/gas/mips/branch-absolute.d: New test.
	* testsuite/gas/mips/branch-absolute-n32.d: New test.
	* testsuite/gas/mips/branch-absolute-n64.d: New test.
	* testsuite/gas/mips/branch-absolute-addend-n32.d: New test.
	* testsuite/gas/mips/branch-absolute-addend-n64.d: New test.
	* testsuite/gas/mips/mips16-branch-absolute-n32.d: New test.
	* testsuite/gas/mips/mips16-branch-absolute-n64.d: New test.
	* testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: New
	test.
	* testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: New
	test.
	* testsuite/gas/mips/micromips-branch-absolute.d: New test.
	* testsuite/gas/mips/micromips-branch-absolute-n32.d: New test.
	* testsuite/gas/mips/micromips-branch-absolute-n64.d: New test.
	* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: New
	test.
	* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: New
	test.
	* testsuite/gas/mips/branch-absolute.s: New test source.
	* testsuite/gas/mips/branch-absolute-addend.s: New test source.
	* testsuite/gas/mips/mips16-branch-absolute-addend.s: New test
	source.
	* testsuite/gas/mips/micromips-branch-absolute.s: New test
	source.
	* testsuite/gas/mips/micromips-branch-absolute-addend.s: New
	test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/branch-absolute.d: New test.
	* testsuite/ld-mips-elf/branch-absolute-n32.d: New test.
	* testsuite/ld-mips-elf/branch-absolute-n64.d: New test.
	* testsuite/ld-mips-elf/branch-absolute-addend.d: New test.
	* testsuite/ld-mips-elf/branch-absolute-addend-n32.d: New test.
	* testsuite/ld-mips-elf/branch-absolute-addend-n64.d: New test.
	* testsuite/ld-mips-elf/micromips-branch-absolute.d: New test.
	* testsuite/ld-mips-elf/micromips-branch-absolute-n32.d: New
	test.
	* testsuite/ld-mips-elf/micromips-branch-absolute-n64.d: New
	test.
	* testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: New
	test.
	* testsuite/ld-mips-elf/micromips-branch-absolute-addend-n32.d:
	New test.
	* testsuite/ld-mips-elf/micromips-branch-absolute-addend-n64.d:
	New test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except
	from `branch-absolute-addend' and
	`micromips-branch-absolute-addend', referred indirectly only.
2016-07-14 20:06:37 +01:00
GDB Administrator
efc67f64c9 Automatic date update in version.in 2016-07-14 00:00:24 +00:00
GDB Administrator
9873a9ab89 Automatic date update in version.in 2016-07-13 00:00:19 +00:00
H.J. Lu
37567a2cdd Align x86-64 .got/.got.plt sections to 8 bytes
Align x86-64 .got and .got.plt sections to their entry size.

	* elf64-x86-64.c (elf_x86_64_create_dynamic_sections): Align
	.got/.got.plt sections to 8 bytes.
2016-07-12 15:33:47 -07:00
Nick Clifton
cf143069f3 Second fix for grammar in error message.
* binary.c (binary_set_section_contents): Second grammar fix.
2016-07-12 15:46:02 +01:00
Douglas B Rupp
f231881ea6 Fix grammar in error message.
* binary.c (binary_set_section_contents): Fix grammar in warning
	message.
2016-07-12 11:05:13 +01:00
GDB Administrator
3eb846840f Automatic date update in version.in 2016-07-12 00:00:19 +00:00
Cupertino Miranda
b9316f5985 Enable relocation overflow messages by default.
bfd/ChangeLog:

2016-06-23  Cupertino Miranda  <cmiranda@synopsys.com>
        elf32-arc.c: made PR_DEBUG always defined.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
2016-07-11 15:24:38 +02:00
Cupertino Miranda
08759e0fc8 Fixes done to TLS.
TLS relocations did not support multiple TLS modes for the same
symbol in a single object file.
Refactored how GOT and TLS is implemented. Removed code duplications between
local and global symbols conditioning.

bfd/ChangeLog:

2016-06-14  Cupertino Miranda  <cmiranda@synopsys.com>
  * arc-got.h: Moved got related structures from elf32-arc.c to
    this file. More precisely, tls_type_e, tls_got_entries, got_entry.
  * (arc_get_local_got_ents,
     got_entry_for_type,
     new_got_entry_to_list,
     tls_type_for_reloc,
     symbol_has_entry_of_type,
     get_got_entry_list_for_symbol,
     arc_got_entry_type_for_reloc,
     ADD_SYMBOL_REF_SEC_AND_RELOC,
     arc_fill_got_info_for_reloc,
     relocate_fix_got_relocs_for_got_info,
     create_got_dynrelocs_for_single_entry,
     create_got_dynrelocs_for_got_info): Added to file.
  * elf32-arc.c: Removed GOT & TLS related structs and functions to
                     arc-got.h.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
2016-07-11 15:24:35 +02:00
GDB Administrator
36897971c8 Automatic date update in version.in 2016-07-11 00:00:19 +00:00
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GDB Administrator
1157523231 Automatic date update in version.in 2016-07-09 00:00:21 +00:00
jamesbowman
458653a9b2 FT32: Correct 32-bit reloc for BFD_RELOC_32
The reloc for BFD_RELOC_32 was using the the 20-bit. This hack causes
problems in gdb.  Fixed it to be the proper 32-bit reloc, R_FT32_32.

bfd/ChangeLog:

	* elf32-ft32.c (ft32_reloc_map): Use R_FT32_32 for BFD_RELOC_32.
2016-07-08 11:53:31 -07:00
GDB Administrator
fc1b27795c Automatic date update in version.in 2016-07-08 00:00:20 +00:00
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819490e217 Automatic date update in version.in 2016-07-07 00:00:21 +00:00
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Andre Vieria
d5a67c0290 [ARM] Purecode compatible long branch veneer for M-profile targets with MOVW.
2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>

	* elf32-arm.c (THUMB32_MOVT): New veneer macro.
	(THUMB32_MOVW): Likewise.
	(elf32_arm_stub_long_branch_thumb2_only_pure): New.
	(DEF_STUBS): Define long_branch_thumb2_only_pure.
	(arm_stub_is_thumb): Add new veneer stub.
	(arm_type_of_stub): Use new veneer.
	(arm_stub_required_alignment): Add new veneer.

2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>

	* testsuite/ld-arm/farcall-thumb2-purecode.d: New test result.
	* testsuite/ld-arm/farcall-thumb2-purecode.s: New test.
	* testsuite/ld-arm/arm-elf.exp: Run it.
2016-07-05 11:39:06 +01:00
Andre Vieria
f0728ee368 [ARM] Change noread to purecode.
bfd/ChangeLog
2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>

        * bfd-in2.h (SEC_ELF_NOREAD): Rename to ...
          (SEC_ELF_PURECODE): ... this.
        * elf32-arm.c (elf32_arm_post_process_headers): Rename SEC_ELF_NOREAD
          to SEC_ELF_NOREAD.
          (elf32_arm_fake_sections): Likewise.
          (elf_32_arm_section_flags): Likewise.
          (elf_32_arm_lookup_section_flags): Likewise.
        * section.c (SEC_ELF_NOREAD): Rename to ...
          (SEC_ELF_PURECODE): ... this.

binutils/ChangeLog
2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>

        * objdump.c (dump_section_header): Rename SEC_ELF_NOREAD
          to SEC_ELF_NOREAD.
        * readelf.c (get_elf_section_flags): Rename ARM_NOREAD to
          ARM_PURECODE and SHF_ARM_NOREAD to SHF_ARM_PURECODE.
          (process_section_headers): Rename noread to purecode.

        * section.c (SEC_ELF_NOREAD): Rename to ...
          (SEC_ELF_PURECODE): ... this.

include/ChangeLog
2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>

        * elf/arm.h (SHF_ARM_NOREAD): Rename to ...
          (SHF_ARM_PURECODE): ... this.

ld/ChangeLog
2016-07-05  Andre Vieria  <andre.simoesdiasvieira@arm.com>

        * testsuite/ld-arm/arm_noread.ld: Renamed to ...
          testsuite/ld-arm/arm_purecode.ld: ... this, and replaced
          all noread's by purecode.
2016-07-05 11:28:46 +01:00
GDB Administrator
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bb44634d9b Automatic date update in version.in 2016-07-04 00:00:15 +00:00
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GDB Administrator
9361a47a03 Automatic date update in version.in 2016-07-02 00:00:22 +00:00
Thomas Preud'homme
5e866f5aee Fix Thumb-2 BL detection
2016-07-01  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf32-arm.c (using_thumb2_bl): New function.
	(arm_type_of_stub): Declare thumb2 variable together and change type
	to bfd_boolean.  Use using_thumb2_bl () to determine whether
	THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be
	checked for BL range.
	(elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine
	the bit size of BL offset.

ld/
	* testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7.
	(Thumb-2 BL on ARMv6-M): New testcase.
	* testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename.
	* testsuite/ld-arm/thumb2-bl.s: Do not select architecture.
2016-07-01 16:13:25 +01:00
GDB Administrator
eefbbb8cbe Automatic date update in version.in 2016-07-01 00:00:22 +00:00
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1a8da38cff Automatic date update in version.in 2016-06-30 00:00:19 +00:00
Nick Clifton
d691934d08 Preserve all mapping symbols in ARM and AArch64 object files.
bfd	* elfnn-aarch64.c (is_aarch64_mapping_symbol): New function.
	Returns TRUE for AArch64 mapping symbols.
	(elfNN_aarch64_backend_symbol_processing): New function.  Marks
	mapping symbols as precious in object files so that they will not
	be stripped.
	(elf_backend_symbol_processing): Define.

	* elf32-arm.c (is_arm_mapping_symbol): New function.  Returns TRUE
	for ARM mapping symbols.
	(elf32_arm_backend_symbol_processing): Make use of the new function.
2016-06-29 11:17:40 +01:00
GDB Administrator
2fafa20b34 Automatic date update in version.in 2016-06-29 00:00:26 +00:00
Nick Clifton
bb95c51a23 Fix typo in previous commit 2016-06-28 17:04:30 +01:00
H.J. Lu
f4ab0e2d1d Skip version check for unreferenced and undefined symbol
No need to check version if symbol is unreferenced and undefined.

bfd/

	PR ld/20306
	* elflink.c (elf_link_check_versioned_symbol): Return false
	for unreferenced undefined symbol.

ld/testsuite/

	* testsuite/ld-gc/gc.exp: Run pr20306 test.
	* ld-gc/pr20306.c: New file.
	* ld-gc/pr20306.d: Likewise.
2016-06-28 08:08:30 -07:00
Nick Clifton
1b857aeed3 Fix more linker testsuite failures.
bfin	* elf32-bfin.c (bfin_adjust_dynamic_symbol): Fail if a COPY reloc
	is needed.

ld	* testsuite/ld-elf/comm-data.exp: Expect comm-data2 test to fail
	for bfin.
	* testsuite/ld-elf/elf.exp: Expect pr14170 and symbolic function
	tests to fail for bfin.
	* testsuite/ld-elf/endsym.d: Expect to fail with cr16, crx, dlx,
	nds32 and visium.
	* testsuite/ld-elf/var1.d: Expect to fail with d30v, dlx, ft32 and
	microblaze.
	* testsuite/ld-pe/pe.exp: Expect foreign symbol test to fail for
	mcore-pe.
2016-06-28 15:55:22 +01:00
Nick Clifton
fca2a38fdb Mark ARM mapping symbols in object files are precious, so that strip will not remove them.
* elf32-arm.c (elf32_arm_backend_symbol_processing): New
	function.  Marks mapping symbols in object files as precious, so
	that strip will not remove them.
	(elf_backend_symbol_processing): Define.
2016-06-28 13:22:49 +01:00
James Clarke
7160c10d65 Don't convert R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64.
bfd	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Don't convert
	R_SPARC_32 to R_SPARC_RELATIVE if class is ELFCLASS64.

gold	* sparc.cc (Target_sparc::Scan::local): Don't convert R_SPARC_32
	to R_SPARC_RELATIVE if class is ELFCLASS64.
	(Target_sparc::Scan::global): Likewise.

ld	* testsuite/ld-elf/symbolic-func.r: Allow non-zero offsets from
	.text.
2016-06-28 12:00:56 +01:00
Maciej W. Rozycki
c9775dde32 MIPS16: Add R_MIPS16_PC16_S1 branch relocation support
For R_MIPS16_PC16_S1 the calculation is `(sign_extend(A) + S - P) >> 1'
and the usual MIPS16 bit shuffling applies to relocated field handling,
as per the encoding of the branch target in the extended form of the
MIPS16 B, BEQZ, BNEZ, BTEQZ and BTNEZ instructions.

	include/
	* elf/mips.h (R_MIPS16_PC16_S1): New relocation.

	bfd/
	* elf32-mips.c (elf_mips16_howto_table_rel): Add
	R_MIPS16_PC16_S1.
	(mips16_reloc_map): Likewise.
	* elf64-mips.c (mips16_elf64_howto_table_rel): Likewise.
	(mips16_elf64_howto_table_rela): Likewise.
	(mips16_reloc_map): Likewise.
	* elfn32-mips.c (elf_mips16_howto_table_rel): Likewise.
	(elf_mips16_howto_table_rela): Likewise.
	(mips16_reloc_map): Likewise.
	* elfxx-mips.c (mips16_branch_reloc_p): New function.
	(mips16_reloc_p): Handle R_MIPS16_PC16_S1.
	(b_reloc_p): Likewise.
	(mips_elf_calculate_relocation): Likewise.
	(_bfd_mips_elf_check_relocs): Likewise.
	* reloc.c (BFD_RELOC_MIPS16_16_PCREL_S1): New relocation.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	gas/
	* config/tc-mips.c (mips16_reloc_p): Handle
	BFD_RELOC_MIPS16_16_PCREL_S1.
	(b_reloc_p): Likewise.
	(limited_pcrel_reloc_p): Likewise.
	(md_pcrel_from): Likewise.
	(md_apply_fix): Likewise.
	(tc_gen_reloc): Likewise.
	(md_convert_frag): Likewise.
	(mips_fix_adjustable): Update comment.
	* testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-addend-2.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-addend-3.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-absolute.d: Remove error
	output, add dump patterns.
	* testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file.
	* testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-2.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-3.l: Remove file.
	* testsuite/gas/mips/mips16-branch-absolute.l: Remove file.
	* testsuite/gas/mips/mips16-branch-addend-2.s: Add padding.
	* testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid
	implicit instruction padding, avoid MIPS16 JR->JRC conversion.
	* testsuite/gas/mips/branch-weak-6.d: New test.
	* testsuite/gas/mips/branch-weak-7.d: New test.
	* testsuite/gas/mips/mips.exp: Run the new tests.

	ld/
	* testsuite/ld-mips-elf/mips16-branch-2.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-3.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-addend-2.d: New test.
	* testsuite/ld-mips-elf/mips16-branch-addend-3.d: New test.
	* testsuite/ld-mips-elf/mips16-branch.s: New test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-06-28 01:29:56 +01:00
GDB Administrator
bac13b9c13 Automatic date update in version.in 2016-06-28 00:00:21 +00:00
Alan Modra
c9301e3181 PR 19264 looping in ppc64_elf_size_stubs
b399102 fixed the testcase in this PR but it may be possible to
trigger the problem in other ways.

	PR ld/19264
	* elf64-ppc.c (STUB_SHRINK_ITER): Define.
	(ppc64_elf_size_stubs): Exit stub sizing loop past STUB_SHRINK_ITER
	if shrinking stubs.
	(ppc64_elf_size_stubs): Adjust to suit.
2016-06-27 20:04:53 +09:30
Trevor Saunders
3cd72572cb add ChangeLog entries 2016-06-27 06:01:34 -04:00