Commit e1f987424b changed how
next_tls_desc_index was set up. This patch updates
elf_i386_compute_jump_table_size to use elf.srelplt->reloc_count
instead of next_tls_desc_index.
bfd/
PR ld/17057
* elf32-i386.c (elf_i386_compute_jump_table_size): Replace
next_tls_desc_index with elf.srelplt->reloc_count.
ld/testsuite/
PR ld/17057
* ld-i386/i386.exp: Run pr17057.
* ld-i386/pr17057.d: New file.
* ld-i386/pr17057.s: Likewise.
So that we munge isym->st_other once per symbol.
* elflink.c (elf_merge_st_other): Update comments. Simplify
visibility handling. Make isym const. Move code modifying
isym->st_other for --exclude-libs to..
(elf_link_add_object_symbols): ..here.
Increase the maximum page size to 64kB and align the TEXT_START_ADDR
to a 64kB boundary. This brings AArch32 in line with AArch64 and
improves compatability under certain conditions.
bfd/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
value to 64kB and remove custom setting for NaCl.
ld/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
alignment to 64kB boundary.
ld/testsuite/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
match bfd.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
take into account increased segment alignment.
* ld-arm/ifunc-gdesc.r: Likewise.
* ld-arm/tls-lib.d: Likewise.
This fixes a problem seen on powerpc64le ELFv2 when creating a
function symbol alias with ld --defsym. st_other needs to be copied
from the source symbol to the alias in order to set up the local entry
offset for the alias. I decided to make this change in the generic
ELF code rather than in elf64-ppc.c since it looks like other targets
that use st_other bits might benefit too.
bfd/
* elflink.c (_bfd_elf_copy_link_hash_symbol_type): Copy st_other
bits from source to dest.
* linker.c (_bfd_generic_copy_link_hash_symbol_type): Update comment.
* targets.c (struct bfd_target <_bfd_copy_link_hash_symbol_type>):
Likewise.
* bfd-in2.h: Regenerate.
ld/testsuite/
* ld-powerpc/defsym.s, * ld-powerpc/defsym.d: New test.
* ld-powerpc/powerpc.exp: Run it.
* elf32-avr.c: Handle R_AVR_PORT5 and R_AVR_PORT6.
* reloc.c: Add BFD_RELOC_AVR_PORT5 and BFD_RELOC_AVR_PORT6.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* avr.h: Add R_AVR_PORT5 and R_AVR_PORT6.
* config/tc-avr.c (avr_operand): Permit referring to r26-r31 by
name as [xyz][hl]. Permit using a symbol whoes name begins with
`r' to refer to a register.
Allow arbitrary expressions for the P and p operators.
(md_apply_fix): Check the BFD_RELOC_AVR_PORT5 and
BFD_RELOC_AVR_PORT6 relocations.
This removes usage of the obsolete AC_INIT and AM_INIT_AUTOMAKE in all
binutils configure.in files. The BFD version is now in bfd/version.m4
rather than bfd/configure.in, which allows automake to automatically
track this dependency.
bfd/
* version.m4: New file.
* configure.in: Include version.m4.
(AC_INIT): Update.
* Makefile.am (RELEASE): Delete.
(bfdver.h): Depend on development.sh, use instead of RELEASE.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
opcodes/
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
binutils/
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
gas/
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* configure.com: Get bfd version from bfd/version.m4.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
gprof/
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
ld/
* configure.in: Include bfd/version.m4.
(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
(BFD_VERSION): Delete.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
* configure: Regenerate.
* Makefile.in: Regenerate.
doesn't always mean you need to define a function symbol on plt code.
If all references are in read-write sections, then using dynamic relocs
is OK.
bfd/
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Clear
pointer_equality_needed when !readonly_dynrelocs.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol): Likewise.
ld/testsuite/
* ld-powerpc/ambiguousv1.d: Match symbol table too.
* ld-powerpc/ambiguousv2.d: Likewise.
* ld-powerpc/ambiguousv1b.d: New.
* ld-powerpc/ambiguousv2b.d: New.
* ld-powerpc/powerpc.exp: Run new tests.
If we can dlopen an object then DF_STATIC_TLS is relevant.
* elf32-ppc.c (ppc_elf_check_relocs): Set DF_STATIC_TLS for PIEs too.
* elf64-ppc.c (ppc64_elf_check_relocs): Likewise.
for better packing. Removes a field and a flag that are never set.
bfd/
* bfd.c (struct bfd): Reorganise for better packing. Delete
"ifd" field. Make "format", "direction" and "flags" bitfields.
(HAS_LOAD_PAGE): Delete, renumber following flags.
* bfd-in2.h: Regenerate.
* coff-tic4x.c: Remove HAS_LOAD_PAGE from extra flags in target vecs.
binutils/
* objdump.c (dump_bfd_header): Don't print HAS_LOAD_PAGE.
The undefined function symbols (with non-zero value) on global entry
stubs are discarded by objdump when disassembling, so give objdump
another symbol to mark the stubs.
Also fixes a couple of bugs:
- entry_section was set to .opd for ELFv2, which meant a hard error
rather than a warning when _start wasn't defined.
- global entry stubs were not built if they were the only type of
stub in an executable.
bfd/
* elf64-ppc.c (ppc_stub_type): Add ppc_stub_global_entry.
(struct ppc_link_hash_table): Increase size of stub_count array.
(build_global_entry_stubs): Emit symbol on global entry stub.
(ppc64_elf_build_stubs): NULL check htab->brlt. Add global entry
stub stats.
ld/
* emultempl/ppc64elf.em (stub_added): Delete.
(gld${EMULATION_NAME}_finish): Call ppc64_elf_build_stubs even when
none of the usual stubs have been added. Only change entry_section
for ELFv1.
Makes the ld srec tests pass. Uses a horrible scan through symbols to
find ELF fields for symbol definitions, but the generic linker doesn't
offer anything better. Might be slow. Anyway, sane people will link
to ELF output then objcopy to convert formats.
* elf64-ppc.c (abiversion, set_abiversion): Move earlier.
(ppc64_elf_branch_reloc): Adjust addend for ELFv2 local offset.
(ppc64_elf_set_toc): Set ".TOC." symbol value when using
generic linker.
(ppc64_elf_relocate_section): Disable ELFv2 function entry
optimisation when --traditional-format.
* archures.c: add avrtiny architecture for avr target.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): add avrtiny arch info.
* elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16
added for 16 bit LDS/STS instruction of avrtiny arch.
(avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to
BFD_RELOC_AVR_LDS_STS_16.
(bfd_elf_avr_final_write_processing): select machine number avrtiny arch.
(elf32_avr_object_p): set machine number for avrtiny arch.
* libbfd.h: Regenerate.
* reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc.
* config/tc-avr.c (mcu_types): Add avrtiny arch.
Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
and attiny40.
(md_show_usage): Add avrtiny arch in usage message.
(avr_operand): validate and issue error for invalid register for avrtiny.
add new reloc exp for 16 bit lds/sts instruction.
(md_apply_fix): check 16 bit lds/sts operand for out of range and encode.
(md_assemble): check ISA for arch and issue diagnostic.
* include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number.
(R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number.
* include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA.
(AVR_ISA_2xxxa): define ISA without LPM.
(AVR_ISA_AVRTINY): define avrtiny arch ISA.
Add doc for contraint used in 16 bit lds/sts.
Adjust ISA group for icall, ijmp, pop and push.
Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints.
* opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
(print_insn_avr): do not select opcode if insn ISA is avrtiny and machine
is not avrtiny.
* Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source.
(eavrtiny.c): add rules for avrtiny emulation source.
* Makefile.in: Regenerate.
* configure.tgt: Add avrtiny to avr target emulations.
* scripttempl/avrtiny.sc: New file.
linker script template for avrtiny arch.
* emulparams/avrtiny.sh: New file.
emulation parameters for avrtiny arch.
information, specifically a DW_AT_MIPS_linkage_name attribute that has a numeric
value rather than a string value.
PR binutils/16949
* dwarf2.c (is_str_attr): New function.
(find_abstract_instance_name): Use it to determine when an
attribute has a string value.
Prior to 93d1b056 _SDA_BASE_ used to be defined in a linker script
output section. Now _SDA_BASE_ is defined in an input section that is
subject to being stripped. If the section is stripped we don't output
the symbol, which results in --emit-relocs trying to emit relocs with
dangling references to _SDA_BASE_.
* elf32-ppc.c (ppc_elf_size_dynamic_sections): Arrange to keep
.sdata/.sdata2 when _SDA_BASE_/_SDA2_BASE_ should be output
for --emit-relocs.
other architectures when we emit IE relocs in a shared library.
* elf32-arm.c (elf32_arm_check_relocs): Set DF_STATIC_TLS when
emitting initial-exec relocs when not linking an executable.
Combining TLS descriptors and GNU indirect functions in the same
object could lead to assertions or multiple dynamic relocations
for the same GOT slot. Fix the bookkeeping so this doesn't happen.
This allows building and make checking glibc with -mtls-dialect=gnu2.
bfd/ChangeLog:
2014-06-16 Will Newton <will.newton@linaro.org>
* elf32-arm.c (elf32_arm_allocate_plt_entry): Increment
htab->next_tls_desc_index in the non-IPLT case.
Calculate GOT offset correctly for the non-IPLT case.
(allocate_dynrelocs_for_symbol): Don't increment
htab->next_tls_desc_index here.
ld/testsuite/ChangeLog:
2014-06-16 Will Newton <will.newton@linaro.org>
* ld-arm/arm-elf.exp: Add ifunc-gdesc test.
* ld-arm/ifunc-gdesc.r: New file.
* ld-arm/ifunc-gdesc.s: Likewise.
* ld-arm/ifunc-gdesc.ver: Likewise.
Cures these failures with MALLOC_PERTURB_=1
FAIL: GOT test (executable)
FAIL: GOT test (shared library)
FAIL: VAX export class call relocation test
FAIL: VAX export class data relocation test
* elf32-vax.c (elf_vax_size_dynamic_sections): Clear linker
created sections.
Fixes issues with dwz multi-file (-m) and ld's -wrap option.
Symbols referenced from DWARF debug info in a separate file, eg. to
specify low and high pc, must use the real symbol. The DWARF info
is specifying attributes of the real function, not one interposed
with --wrap.
include/
* bfdlink.h (unwrap_hash_lookup): Declare.
bfd/
* linker.c (unwrap_hash_lookup): New function.
* elf-bfd (RELOC_FOR_GLOBAL_SYMBOL): Call unwrap_hash_lookup.
* elf32-i370.c (i370_elf_relocate_section): Likewise.
* elf32-m32c.c (m32c_elf_relocate_section): Likewise.
* elf32-m32r.c (m32r_elf_relocate_section): Likewise.
* elf32-score.c (s3_bfd_score_elf_relocate_section): Likewise.
* elf32-score7.c (s7_bfd_score_elf_relocate_section): Likewise.
* elf32-spu.c (spu_elf_relocate_section): Likewise.
* elf64-hppa.c (elf64_hppa_relocate_section): Likewise.
There are legitimate reasons to allow a signed value in a cmpli insn
field, for example to test for a "stw r1,lock@sdarel(r13)" instruction
in user code, a kernel might use
subis r3,r3,STW_R1_0R13@ha # subtract off high part
cmplwi r3,lock@sdarel # is low part accessing lock?
Since the lock@sdarel may take a range of -32768 to 32767,
the allowed range of cmpli immediate must be at least [-32768,65535].
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Treat field of cmpli
insn as a bitfield; Use complain_overflow_bitfield.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
opcodes/
* ppc-opc.c (UISIGNOPT): Define and use with cmpli.
gas/
* config/tc-ppc.c (ppc_insert_operand): Handle PPC_OPERAND_SIGNOPT
on unsigned fields. Comment on PPC_OPERAND_SIGNOPT signed fields
in 64-bit mode.
gold/
* powerpc.cc (relocate): Treat field of cmpli insn as a bitfield.
The goal of this patch is to provide an easy way to make
--disable-werror the default when building binutils, or the parts
of binutils that need to get built when building GDB. In development
mode, we want to continue making -Werror the default with GCC.
But, when making releases, I think we want to make it as easy as
possible for regular users to successfully build from sources.
GDB already has this kind of feature to turn -Werror as well as
the use of the libmcheck library. As GDB Release Manager, I take
advantage of it to turn those off after having cut the branch.
I'd like to be able to do the same for the binutils bits. And
perhaps Tristan will want to do the same for his releases too
(not sure, binutils builders might be a little savvier than GDB
builders).
This patch introduces a new file, called development.sh, which
just sets a variable called $development. In our development branches
(Eg. "master"), it's set to true. But setting it to false would allow
us to change the default behavior of various development-related
features to be turned off; in this case, it turns off the use of
-Werror by default (use --enable-werror to turn it back on).
bfd/ChangeLog:
* development.sh: New file.
* warning.m4 (AM_BINUTILS_WARNINGS): Source bfd/development.sh.
Make -Werror the default with GCC only if DEVELOPMENT is true.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add
$(srcdir)/development.sh.
* Makefile.in, configure: Regenerate.
binutils/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gas/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gold/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): New.
* Makefile.in, configure: Regenerate.
gprof/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
ld/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
opcodes/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gdb/ChangeLog:
* development.sh: Delete.
* Makefile.in (config.status): Adjust dependency on development.sh.
* configure.ac: Adjust development.sh source call.
* configure: Regenerate.
gdb/gdbserver/ChangeLog:
* configure.ac: Adjust development.sh source call.
* Makefile.in (config.status): Adjust dependency on development.sh.
* configure: Regenerate.
Tested on x86_64-linux by building two ways: One with DEVELOPMENT
set to true, and one with DEVELOPMENT set to false. In the first
case, I could see the use of -Werror, while it disappeared in
the second case.
Add an assert and remove an unused line of code.
bfd/ChangeLog:
2014-06-04 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (tpoff_base): Make test of tls_sec
being non-NULL into an assert.
(elfNN_aarch64_tls_relax): Remove unused code.
out that the section is supposed to be page-aligned, but the newly merged
section was not being padded out to a page boundary. This meant that when
the executable was stripped a badly sized .rsrc section was written out.
PR ld/16807
* peXXigen.c (rsrc_process_section): Page align the new contents
befgore writing out.
Power8 fuses addis,addi and addis,ld sequences when the target of the
addis is the same as the addi/ld. Thus
addis r12,r2,xxx@ha
addi r12,r12,xxx@l / ld r12,xxx@l(r12)
is faster than
addis r11,r2,xxx@ha
addi r12,r11,xxx@l / ld r12,xxx@l(r11)
So use the form that allows fusion in plt call and branch stubs.
bfd/
* elf64-ppc.c (ADDIS_R12_R2): Define.
(build_plt_stub): Support fusion on ELFv2 stub.
(ppc_build_one_stub): Likewise for plt branch stubs.
gold/
* powerpc.cc (addis_12_2): Define.
(Stub_table::do_write): Support fusion on ELFv2 stubs.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Update for changed plt call stubs.
gdb/
* ppc64-tdep.c (ppc64_standard_linkage8): New.
(ppc64_skip_trampoline_code): Recognise ELFv2 stub supporting fusion.
2014-05-28 Tristan Gingold <gingold@adacore.com>
* dwarf2.c (lookup_address_in_function_table): Add best_fit_len
to keep the length of the best fit range.
(lookup_symbol_in_function_table, info_hash_lookup_funcinfo):
Likewise.
1) _SDA_BASE_ and _SDA2_BASE_ and defined automatically, in a similar
manner to the way _GLOBAL_OFFSET_TABLE_ is handled. It's a little
more complicated to remove the symbols because _SDA_BASE_ needs to
be there if either .sdata or .sbss is present, and similarly for
_SDA2_BASE.
2) The linker created .sdata and .sdata2 sections used for
R_PPC_EMB_SDAI16 and R_PPC_EMB_SDA2I16 pointers are created early.
Nowadays we strip unneeded sections from the output, so it isn't
necessary to delay creating the sections.
3) The output section for targets of various SDA relocs is now checked
as per the ABI(s). We previously allowed .sdata.foo and similar,
most likely because at some stage we were checking input sections.
Also, the patch fixes a long-standing bug in size_input_sections
that affects the values of symbols defined in stripped input
sections.
PR 16952
bfd/
* elf32-ppc.c (ppc_elf_create_linker_section): Move earlier.
Remove redundant setting of htab->elf.dynobj. Don't align.
Define .sdata symbols using _bfd_elf_define_linkage_sym.
(ppc_elf_create_glink): Call ppc_elf_create_linker_section.
(create_sdata_sym): Delete.
(elf_allocate_pointer_linker_section): Rename from
elf_create_pointer_linker_section. Align section.
(ppc_elf_check_relocs): Don't call ppc_elf_creat_linker_section
directly here, or create_sdata_sym. Set ref_regular on _SDA_BASE_
and _SDA2_BASE_.
(ppc_elf_size_dynamic_sections): Remove ATTRIBUTE_UNUSED on param.
Remove unnecessary tests on _SDA_BASE_ sym.
(maybe_strip_sdasym, ppc_elf_maybe_strip_sdata_syms): New functions.
(ppc_elf_relocate_section): Tighten SDA reloc symbol section checks.
* elf32-ppc.h (ppc_elf_set_sdata_syms): Delete.
(ppc_elf_maybe_strip_sdata_syms): Declare.
ld/
* emulparams/elf32ppccommon.sh (_SDA_BASE_, _SDA2_BASE_): Delete.
* emultempl/ppc32elf.em (ppc_before_allocation): Call
ppc_elf_maybe_strip_sdata_syms.
* ldlang.c (size_input_section): Correct output_offset value
for excluded input sections.
original patches were posted:
pe/coff: Display GUID build-id in the conventional way
pe/coff: Don't interpret debug directory in section with no contents
pe/coff: Keep .build-id with --only-keep-debug
pe/coff: Don't break .build-id with objcopy/strip
* peXXigen.c (pe_print_debugdata): Don't interpret debug directory
in a section with no contents.
(is_vma_in_section, find_section_by_vma): New functions.
(_bfd_XX_bfd_copy_private_bfd_data_common): Recalculate file
offsets in the debug directory.
(_bfd_XXi_slurp_codeview_record, _bfd_XXi_write_codeview_record):
Byte-swap GUID from little-endian to big-endian order for
consistent and conventional display.
* objcopy.c (is_nondebug_keep_contents_section): New function.
(setup_section): Use it.
or 64-bit doubles. It also makes the linker complain if the user attempts
to link together binaries with different sized doubles.
* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if
64-bit doubles objects mix with 32-bit doubles objects.
(rl78_elf_print_private_bfd_data): Describe 64-bit doubles flag.
* readelf.c (get_machine_flags): Handle RL78 64-bit doubles flag.
* config/tc-rl78.c (enum options): Add OPTION_32BIT_DOUBLES
and OPTION_64BIT_DOUBLES.
(md_longopts): Add -m32bit-doubles and -m64bit-doubles.
(md_parse_option): Parse -m32bit-doubles and -m64bit-doubles.
(md_show_usage): Show all of the RL78 options.
(rl78_float_cons): New static functions.
(md_pseudo_table): Update handler for "double".
R_XTENSA_DIFF relocation offsets are in fact signed. Treat them as such.
Add testcase that examines ld behaviour on R_XTENSA_DIFF relocation
changing sign during relaxation.
2014-05-02 Volodymyr Arbatov <arbatov@cadence.com>
David Weatherford <weath@cadence.com>
Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (relax_section): treat R_XTENSA_DIFF* relocations as
signed.
gas/
* config/tc-xtensa.c (md_apply_fix): mark BFD_RELOC_XTENSA_DIFF*
fixups as signed.
ld/testsuite/
* ld-xtensa/diff_overflow.exp, * ld-xtensa/diff_overflow1.s,
* ld-xtensa/diff_overflow2.s: Add test for DIFF* relocation
signedness and overflow checking.
This patch firstly adds support for mips32r3 mips32r5, mips64r3
and mips64r5. Secondly it adds support for the eretnc instruction.
ChangeLog:
bfd/
* aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3,
mips32r5 and mips64r5.
* archures.c (bfd_architecture): Likewise.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (arch_info_struct): Likewise.
* elfxx-mips.c (mips_set_isa_flags): Likewise.
gas/
* tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3
and mips64r5.
(ISA_HAS_64BIT_FPRS): Likewise.
(ISA_HAS_ROR): Likewise.
(ISA_HAS_ODD_SINGLE_FPR): Likewise.
(ISA_HAS_MXHC1): Likewise.
(hilo_interlocks): Likewise.
(md_longopts): Likewise.
(ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5.
(ISA_HAS_DROR): Likewise.
(options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and
OPTION_MIPS64R5.
(mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
(md_parse_option): Likewise.
(s_mipsset): Likewise.
(mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3
and mips64r5. Also change p5600 entry to be mips32r5.
* configure.in: Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
* configure: Regenerate.
* doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and
-mips64r5 command line options.
* doc/as.texinfo: Likewise.
gas/testsuite/
* gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3,
mips32r5, mips64r3 and mips64r5 isas to the testsuite.
* gas/mips/r5.s: New test.
* gas/mips/r5.d: Likewise.
include/opcode/
* mips.h (INSN_ISA_MASK): Updated.
(INSN_ISA32R3): New define.
(INSN_ISA32R5): New define.
(INSN_ISA64R3): New define.
(INSN_ISA64R5): New define.
(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32
INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered.
(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and
mips64r5.
(INSN_UPTO32R3): New define.
(INSN_UPTO32R5): New define.
(INSN_UPTO64R3): New define.
(INSN_UPTO64R5): New define.
(ISA_MIPS32R3): New define.
(ISA_MIPS32R5): New define.
(ISA_MIPS64R3): New define.
(ISA_MIPS64R5): New define.
(CPU_MIPS32R3): New define.
(CPU_MIPS32R5): New define.
(CPU_MIPS64R3): New define.
(CPU_MIPS64R5): New define.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
(I34): New define.
(I36): New define.
(I66): New define.
(I68): New define.
* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
mips64r5.
(parse_mips_dis_option): Update MSA and virtualization support to
allow mips64r3 and mips64r5.
* elfxx-mips.h (elfxx-mips.h): Declare.
* elfxx-mips.c (mips_elf_merge_obj_attributes): Use it to report
Tag_GNU_MIPS_ABI_FP mismatches.
(_bfd_mips_fp_abi_string): New function.
of address.
(mmo_write_chunk): When handling data remainder, assert that
previous remaining data is flushed.
(mmo_write_loc_chunk): Only look for trailing and leading zeros
when dealing with an aligned VMA and for aligned lengths. Don't skip
the last 32-bit-word of zeros.
(mmo_write_loc_chunk): Emit an error if the VMA is not aligned.
(mmo_scan) <case LOP_QUOTE>: Move re-alignment of vma before
emitting data, not after updating it.
<case LOP_LOC>: Call mmo_decide_section with aligned vma.
thought that an uncompressed .debug_str section was compressed.
* compress.c (bfd_is_section_compressed): When checking the
.debug_str section, also check the fifth byte in the section is
not part of a string.
* binutils-all/debug_str.s: New test.
* binutils-all/debug_str.d: New test control file.
* binutils-all/compress.exp: Run debug_str test.
This is all we should need to be able to run the eh_frame parts of
bfd_elf_discard_info before bfd_elf_size_dynamic_sections
* elf-eh-frame.c (struct cie.personality): Replace val with sym.
(find_merged_cie): Identify personality functions by (bfd_id,index)
pair when a local sym is used.
Outgoing section for relocations was computed by setting a shared
pointer to which section should be used. For TLS this was overriden to
use .rela.got since they use GOT entries but since the pointer is per
section that whole section was relocated to .rela.got, even non-TLS
relocations.
* elf32-or1k.c: Fix a bug where non-TLS relocations would be forced
into .rela.got if it contained TLS relocations as well.
versions of gcc complain about part of a conditional expression always
evaluating to false because of the size of the operands involved, even when
the entire expression is already known to be false.
* peXXigen.c (_bfd_XXi_swap_sym_out): Another fix for building on
a 342-bit host. This time for older versions of gcc.
This teaches the DWARF2 find_line functions how to deal with separate
debug relocatable object files. Also fixes a major bug:
When _bfd_dwarf2_slurp_debug_info was split out, place_sections ran
after .debug_info was relocated. This defeated the whole purpose of
place_sections. See the comment I added before place_sections.
Fixes some minor bugs too:
- place_sections didn't set VMA for alloc but non-load sections (bss).
- zero size sections can have symbols, so they need their VMA set too.
- last_vma was incorrectly adjusted.
- my last change to place_sections left VMA unchanged for .debug_info
when the linker has mapped input to output sections, but this is
wrong since bfd_simple_get_relocated_section_contents unmaps debug
sections.
PR 16867
* dwarf2.c: Formatting.
(struct dwarf2_debug): Make adjusted_section_count signed.
(unset_sections): Make i signed.
(set_debug_vma): New function.
(place_sections): Handle separate debug object file. Set VMA
on debug sections, even if they have an output section. Also
set VMA on zero size sections, and non-load but alloc sections.
Set adjusted_section_count to -1 when no section adjustment.
Malloc adjusted_sections. Don't double last_vma. Transfer
alloc section VMAs to separate debug file.
(_bfd_dwarf2_cleanup_debug_info): Free adjusted_sections.
(_bfd_dwarf2_slurp_debug_info): Add do_place parameter. Drop
test on symbols being the same before using old stash. Read
and use separate debug file symbols. Call place_sections.
(find_line): Don't call place_sections here.
* libbfd-in.h (_bfd_dwarf2_slurp_debug_info): Update proto.
* libbfd.h: Regenerate.
* mach-o.c (bfd_mach_o_find_nearest_line): Adjust
_bfd_dwarf2_slurp_debug_info call.
* simple.c (simple_save_output_info): Clarify comment.
1. Strings (and then resource data) must follow immediately after
the end of the tables.
2. Units of resource data must be 8-byte aligned.
PR ld/16807
* peXXigen.c (struct rsrc_regions): New structure.
(rsrc_print_resource_directory): Use new structure. Include
offset of directory in listing.
(rsrc_print_resource_entry): Likewise.
(rsrc_print_section): Likewise.
(rsrc_count_entries): Do not increment sizeof_strings or
sizeof_leaves.
(rsrc_count_directory): Do not increment sizeof_tables.
(rsrc_compute_region_sizes): New function.
(rsrc_write_leaf): Maintain 8-byte alignment for resource data.
(rsrc_process_section): Compute size of regions after merging
entries.
Throw away the dwarf2 stash if it becomes invalid due to section
VMAs changing. It would be nice to reclaim all the bfd_alloc
memory here when we throw away the stash, perhaps by putting
everything we alloc on a private dwarf2 objalloc, but I haven't done
that with this patch.
I've also fixed a problem with bfd_perform_relocation losing reloc
addends, which meant a second or subsequent look at debug info
sections did not properly relocate the sections. I can't see why
bfd_perform_relocation should need to change addends except for ld -r,
and the history (985fca12, e98e6ec1) doesn't help much.
Finally, the patch tweaks place_sections to avoid unnecessary work.
If we've mapped input to output sections, then input section VMA
isn't used so there's not much point in adjusting it. Incidentally,
this also means place_sections isn't effective in all cases.
PR ld/16787
* dwarf2.c (struct dwarf2_debug): Add sec_vma field.
(place_sections): Do not modify VMA of sections when called from
linker after sections have been placed in output sections. Short
circuit single section case.
(save_section_vma, section_vma_same): New functions.
(_bfd_dwarf2_slurp_debug_info): Throw away stash if section VMAs
change.
* reloc.c (bfd_perform_relocation): Do not modify reloc addend
when non-relocatable.
This function seems to be a left over from some previous
functionality that no longer exists - the comment above seems to
make no sense with the current code. Remove the function as it
breaks handling of SystemTap static probe note sections.
bfd/ChangeLog:
2014-04-22 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_section_flags): Remove
function. (elf_backend_section_flags): Remove define.
ld/
* emultempl/alphaelf.em (alpha_after_parse): Enable 2 relax passes.
bfd/
* elf64-alpha.c (elf64_alpha_size_got_sections): New may_merge
parameter; honor it and disable got merging when false.
(elf64_alpha_relax_got_load): Do not relax to GPREL relocs during
the first pass of relaxation.
(elf64_alpha_relax_with_lituse): Likewise. Move relaxed relocs to
the end of the LITERAL+LITUSE chain.
(elf64_alpha_relax_section): Only process LITERAL relocs during the
second pass of relaxation.
bfd/
* mach-o.h (bfd_mach_o_dyld_info_command): Add rebase_content,
bind_content, weak_bind_content, lazy_bind_content,
export_content.
(bfd_mach_o_load_command): Add comments, add next field.
(mach_o_data_struct): Replace commands field by first_command
and last_command.
* mach-o.c (bfd_mach_o_append_command): New function.
(bfd_mach_o_bfd_copy_private_symbol_data): Add blank lines.
(bfd_mach_o_bfd_copy_private_section_data): Check flavour,
copy fields.
(bfd_mach_o_bfd_copy_private_header_data): Copy load commands.
(bfd_mach_o_pad4, bfd_mach_o_pad_command): New functions.
(bfd_mach_o_write_thread): Use macro instead of literal.
(bfd_mach_o_write_dylinker, bfd_mach_o_write_dylib)
(bfd_mach_o_write_main, bfd_mach_o_write_dyld_info): New
functions.
(bfd_mach_o_write_symtab_content): New function (extracted
from bfd_mach_o_write_symtab).
(bfd_mach_o_write_symtab): Split.
(bfd_mach_o_count_indirect_symbols): Move
(bfd_mach_o_build_dysymtab): Remove layout code.
(bfd_mach_o_write_contents): Rewritten to build commands in order.
(bfd_mach_o_count_sections_for_seg): Remove.
(bfd_mach_o_build_obj_seg_command): New function (extracted from
bfd_mach_o_build_seg_command).
(bfd_mach_o_build_exec_seg_command): New function.
(bfd_mach_o_build_dysymtab_command): Remove.
(bfd_mach_o_layout_commands): New function.
(bfd_mach_o_init_segment): New function.
(bfd_mach_o_build_commands): Major rework to handle non-object
files.
(bfd_mach_o_alloc_and_read, bfd_mach_o_read_dyld_content): New
function.
(bfd_mach_o_read_dyld_info): Clear content fields.
(bfd_mach_o_read_segment): Adjust call.
(bfd_mach_o_flatten_sections): Adjust as now load commands are
chained.
(bfd_mach_o_scan_start_address, bfd_mach_o_scan)
(bfd_mach_o_mkobject_init, bfd_mach_o_get_base_address)
(bfd_mach_o_lookup_command, bfd_mach_o_core_fetch_environment):
Likewise.
binutils/
* od-macho.c (dump_section_map): Adjust as load commands
are now chained.
(dump_load_command, dump_section_content): Likewise.
be placed towards the front of local GOT space, while entries addressed
via a 32-bit index are placed towards the rear.
Provided that there are fewer than ~16K local GOT entries addressed via
a 16-bit index in total, this should eliminate any relocation overflows
caused by such GOT entries being allocated beyond the addressable range.
bfd/
* elfxx-mips.c (struct mips_got_info): Delete assigned_gotno
field. Add assigned_low_gotno and assigned_high_gotno fields.
(mips_elf_create_local_got_entry): Update out-of-space condition.
Set index of new GOT entry to assigned_low_gotno if required by
the current relocation, else set it to assigned_high_gotno.
(mips_elf_set_global_gotidx): Replace uses of assigned_gotno
with assigned_low_gotno.
(mips_elf_multi_got): Initialize assigned_low_gotno and
assigned_high_gotno in secondary GOTs. Use assigned_low_gotno
in place of assigned_gotno when handling global GOT entries.
(mips_elf_lay_out_got): Initialize assigned_low_gotno and
assigned_high_gotno.
(_bfd_mips_elf_finish_dynamic_sections): Account for a possible
gap in the middle of local GOT space.
ld/testsuite/
* ld-mips-elf/elf-rel-xgot-n32.d: Update for new GOT layout.
* ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
PR 16846
* elflink.c (_bfd_elf_merge_symbol): Ignore TLS mismatch when
current bfd is a plugin. Don't always set type_change_ok
when old bfd is a plugin.
The AArch64 TLSDESC to IE relaxation code uses a bit mask intended to
ensure that destination register in a relaxed ldr instruction is
always X0. The mask has an off by one error resulting in the most
significant bit of the destination register being retained in the
relaxed instruction. The issue generally appears when the compiler
emits TLS accesses code under high register pressure resulting in a
broken code sequence.
Fuss over bctr in call stubs.
* elf32-ppc.c (BA): Define
(ppc_elf_link_hash_table_create): Correct default_params.
(write_glink_stub): Pad small plt call stub with "ba 0" rather
than "nop" for ppc476_workaround.
(ppc_elf_finish_dynamic_sections): Likewise for branch table
and __glink_PLTresolve. Ensure plt call stub at end of page
doesn't allow fall-thru prefetch.
converts some address expressions into absolute values, but the PE format
only stores absolutes as 32-bits. This is a partial solution which attempts
to convert such absolute values back to section relative ones instead. It
fails for symbols like __image_base and ImageBase__, but it is unclear as to
whether these values are ever actually used by applications.
PR ld/16821
* peXXigen.c (abs_finder): New function.
(_bfd_XXi_swap_sym_out): For absolute symbols with values larger
than 1^32 try to convert them into section relative values
instead.
One last time-stamp. Now none of the doc rules using move-if-change
will run unnecessarily.
* Makefile.am ($(MKDOC)): New rule, depend on chew.stamp. Move
old rule to..
(chew.stamp): ..here.
(DISTCLEANFILES): Move *.stamp..
(MOSTLYCLEANFILES): ..to here.
* Makefile.in: Regenerate.
I got tired of watching chew.c being compiled a dozen or more times
each time I do a binutils build.
* Makefile.am (MKDOC): Use $@ in command.
(aoutx.texi): New rule, depend on aoutx.stamp. Move old rule..
(aoutx.stamp): .. to here. Don't depend on chew.c, depend on MKDOC
and omit recursive MAKE. Use $< in command.
(archive.texi, archures.texi, bfdt.texi, cache.texi, coffcode.texi,
core.texi, elf.texi, elfcode.texi, mmo.texi, format.texi, libbfd.texi,
bfdio.texi, bfdwin.texi, opncls.texi, reloc.texi, section.texi,
syms.texi, targets.texi, init.texi, hash.texi, linker.texi): Similarly.
(DISTCLEANFILES): Remove *.stamp.
* Makefile.in: Regenerate.
I got the ppc476 workaround wrong. bctr (and bctrl) as the last
instruction in a page can hit the icache bug if the preceding mtctr
insn is close by, and the destination is in the first few instructions
on the next page. This scenario can occur with code generated by gcc
to implement switch statements, or in code generated to call by
function pointer.
To prevent the bctr problem it is also necessary to remove other
instructions that otherwise would be safe.
bfd/
* elf32-ppc.c (ppc_elf_relocate_section): Remove bctr from list
of safe ppc476 insns at end of page. Also remove non-branch insns.
Expand comments.
ld/
* emultempl/ppc32elf.em (no_zero_padding, ppc_finish): New functions.
(LDEMUL_FINISH): Define.
The testcase in pr16417 comment #6 produces a map file showing
libpthread.so.0 (write@@GLIBC_2.2.5)
ie. missing the file referencing the symbol.
* elflink.c (_bfd_elf_add_default_symbol): Pass poldbfd when
merging non-default sym.
bfd/
* mach-o-i386.c (bfd_mach_o_i386_swap_reloc_out): Use target index
of output_section.
* mach-o-x86-64.c (bfd_mach_o_x86_64_swap_reloc_out): Ditto.
section before dereferencing.
(pe_print_idata, pe_print_edata, pe_print_reloc)
(rsrc_print_section): Don't bother interpreting the contents
of sections which have no contents.
long type instead of long long meant that bfd_seek (SET) could be called with a
negative offset.
PR ld/16803
* elf.c (_bfd_elf_set_section_contents): Use correct type to hold
file position.
When a VDSO gets large enough that it doesn't entirely fit in one page,
but not so large that the part described by the program header exceeds
one page, then gdb/BFD doesn't read the section headers and symbol
table information. This patch cures that by passing the size of the
vdso to BFD, and fixes a number of other issues in the BFD code.
bfd/
* elfcode.h (bfd_from_remote_memory): Add "size" parameter.
Consolidate code handling possible section headers past end of
segment. Don't use p_align for page size guess, instead use
minpagesize. Take note of ld.so clearing section headers when
p_memsz > p_filesz. Handle file header specifying no section
headers. Handle zero p_align throughout. Default loadbase to
zero. Add comments. Rename contents_size to high_offset, and
make it a bfd_vma. Delete unnecessary bfd_set_error calls.
* bfd-in.h (bfd_elf_bfd_from_remote_memory): Update prototpe.
* elf-bfd.h (struct elf_backend_data <elf_backend_from_remote_memory>):
Likewise.
(_bfd_elf32_bfd_from_remote_memory): Likewise.
(_bfd_elf64_bfd_from_remote_memory): Likewise.
* elf.c (bfd_elf_bfd_from_remote_memory): Adjust.
* bfd-in2.h: Regnerate.
gdb/
* symfile-mem.c (symbol_file_add_from_memory): Add size parameter.
Pass to bfd_elf_bfd_from_remote_memory. Adjust all callers.
(struct symbol_file_add_from_memory_args): Add size field.
(find_vdso_size): New function.
(add_vsyscall_page): Attempt to find vdso size.
produce spurious errors about truncated relocations. The relocations are
only truncated because they are being made against sections which are going
to be discarded so that base address is zero instead of the expected 64-bit
base value.
* cofflink.c (_bfd_coff_generic_relocate_section): Skip
relocations in discarded sections.
ELFv2 needs to create plt entries in a non-PIC executable for an
address reference to a function defined in a shared object. It's
possible that an object file has no features that distinguish it as
ELFv1 or ELFv2, eg. an object only containing data. Such files need
to be handled like those that are known to be ELFv2.
However, this unnecessarily creates plt entries for the analogous
ELFv1 case, so arrange to set output abi version earlier, and use the
output abi version to further distinguish ambiguous input files.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Account for possibly
needed plt entries when taking the address of functions for
abiversion == 0 (ie. unknown) as well as abiversion == 2.
Move opd setup and abiversion checks to..
(ppc64_elf_before_check_relocs): ..here. Renamed from
ppc64_elf_process_dot_syms. Set output abiversion from input and
input abiversion from output, if either is not set.
(ppc64_elf_merge_private_bfd_data): Don't merge flags here.
(elf_backend_check_directives): Update.
ld/testsuite/
* ld-powerpc/startv1.s, * ld-powerpc/startv2.s, * ld-powerpc/funref.s,
* ld-powerpc/funv1.s, * ld-powerpc/funv2.s,
* ld-powerpc/ambiguousv1.d, * ld-powerpc/ambiguousv2.d: New test files.
* ld-powerpc/powerpc.exp: Run new tests.
The current code subtracts the size of the output section containing
relplt from RELASZ. In some cases this will be the same output
section as the dynamic relocs causing a value of zero to be output.
Calculating the size from input sections seems to make more sense.
bfd/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections):
Set value of DT_PLTRELSZ and DT_RELASZ based on the size
of input sections rather than output sections.
ld/testsuite/ChangeLog:
2014-03-25 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Add relasz dump test.
* ld-aarch64/relasz.d: New file.
* ld-aarch64/relasz.s: Likewise.
Unless pointer_equality_needed is set then set st_value to be zero
for undefined symbols.
bfd/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
PR ld/16715
* elf32-arm.c (elf32_arm_check_relocs): Set
pointer_equality_needed for absolute references within
executable links.
(elf32_arm_finish_dynamic_symbol): Set st_value to zero
unless pointer_equality_needed is set.
ld/testsuite/ChangeLog:
2014-03-20 Will Newton <will.newton@linaro.org>
* ld-arm/ifunc-14.rd: Update symbol values.
should work for all types of input .rsrc section.
* peXXigen.c (rsrc_process_section): Add code to scan input
sections and record their lengths. Use these lengths to find the
start of each merged .rsrc section.
* scripttempl/pe.sc (R_RSRC): Fix default-manifest exclusion.
(.rsrc): Add SUBALIGN(4). Remove SORT.
* scripttempl/pep.sc: Likewise.
bfd/
* peicode.h (pe_ILF_object_p): Adjust, as the version number
has been read.
(pe_bfd_object_p): Also read version number to detect ILF.
* pe-x86_64.c (COFF_WITH_PE_BIGOBJ): Define.
(x86_64pe_bigobj_vec): Define
* coffcode.h (bfd_coff_backend_data): Add _bfd_coff_max_nscns field.
(bfd_coff_max_nscns): New macro.
(coff_compute_section_file_positions): Use unsigned int for
target_index. Compare with bfd_coff_max_nscns.
(bfd_coff_std_swap_table, ticoff0_swap_table, ticoff1_swap_table):
Set a value for _bfd_coff_max_nscns.
(header_bigobj_classid): New constant.
(coff_bigobj_swap_filehdr_in, coff_bigobj_swap_filehdr_out)
(coff_bigobj_swap_sym_in, coff_bigobj_swap_sym_out)
(coff_bigobj_swap_aux_in, coff_bigobj_swap_aux_out): New
functions.
(bigobj_swap_table): New table.
* libcoff.h: Regenerate.
* coff-sh.c (bfd_coff_small_swap_table): Likewise.
* coff-alpha.c (alpha_ecoff_backend_data): Add value for
_bfd_coff_max_nscns.
* coff-mips.c (mips_ecoff_backend_data): Likewise.
* coff-rs6000.c (bfd_xcoff_backend_data)
(bfd_pmac_xcoff_backend_data): Likewise.
* coff64-rs6000.c (bfd_xcoff_backend_data)
(bfd_xcoff_aix5_backend_data): Likewise.
* targets.c (x86_64pe_bigobj_vec): Declare.
* configure.in (x86_64pe_bigobj_vec): New vector.
* configure: Regenerate.
* config.bfd: Add bigobj object format for Windows targets.
gas/
* config/tc-i386.c (use_big_obj): Declare.
(OPTION_MBIG_OBJ): Define.
(md_longopts): Add -mbig-obj option.
(md_parse_option): Handle it.
(md_show_usage): Display help for this option.
(i386_target_format): Use bigobj for x86-64 if -mbig-obj.
* doc/c-i386.texi: Document the option.
gas/testsuite/
* gas/pe/big-obj.d, gas/pe/big-obj.s: Add test.
* gas/pe/pe.exp: Add test.
include/coff/
* pe.h (struct external_ANON_OBJECT_HEADER_BIGOBJ): Declare.
(FILHSZ_BIGOBJ): Define.
(struct external_SYMBOL_EX): Declare.
(SYMENT_BIGOBJ, SYMESZ_BIGOBJ): Define.
(union external_AUX_SYMBOL_EX): Declare.
(AUXENT_BIGOBJ, AUXESZ_BIGOBJ): Define.
* internal.h (struct internal_filehdr): Change type
of f_nscns.
an ARM ELF binary into an AARCH64 ELF executable.
PR ld/16671
* elf32-arm.c (elf32_arm_add_symbol_hook): Check for ARM format
before testing for vxworks.
H.J. Lu
Alan Modra
Maks Naumov
Nick Clifton
Will Newton
Jiong Wang
Barney Stratford
Philippe De Muyter
Kyle McMartin
Omair Javaid
Kai Tietz
Joel Brobecker
DJ Delorie
Tristan Gingold
Ryan Mansfield
Jon Turney
Kaushik Phata
Hans-Peter Nilsson
Volodymyr Arbatov
Andreas Tobler
Andrew Bennett
Richard Sandiford
Christian Svensson
Yuanhui Zhang
Richard Henderson
Kwok Cheung Yeung
Marcus Shawcroft
Sandra Loosemore
Denis Chertykov
Maria Guseva
Yury Gribov
Tristan Gingold
Pedro Alves