All linker targets based on elf32-i386 should check relocations after
opening all inputs since this is how elf32-i386 works.
* emulparams/i386lynx.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Set
to yes.
* emulparams/i386moss.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/i386nw.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Likewise.
-z nodynamic-undefined-weak is only implemented for x86. (The sparc
backend has some support code but doesn't enable the option by
including ld/emulparams/dynamic_undefined_weak.sh, and since the
support looks like it may be broken I haven't enabled it.) This patch
adds the complementary -z dynamic-undefined-weak, extends both options
to affect building of shared libraries as well as executables, and
adds support for the option on powerpc.
include/
* bfdlink.h (struct bfd_link_info <dynamic_undefined_weak>):
Revise comment.
bfd/
* elflink.c (_bfd_elf_adjust_dynamic_symbol): Hide undefweak
or make dynamic for info->dynamic_undefined_weak 0 and 1.
* elf32-ppc.c:Formatting.
(ensure_undefweak_dynamic): Don't make dynamic when
info->dynamic_undefined_weak is zero.
(allocate_dynrelocs): Discard undefweak dyn_relocs for
info->dynamic_undefined_weak. Discard undef dyn_relocs when
not default visibility. Discard undef and undefweak
dyn_relocs earlier.
(ppc_elf_relocate_section): Adjust to suit.
* elf64-ppc.c: Formatting.
(ensure_undefweak_dynamic): Don't make dynamic when
info->dynamic_undefined_weak is zero.
(allocate_dynrelocs): Discard undefweak dyn_relocs for
info->dynamic_undefined_weak. Discard them earlier.
ld/
* ld.texinfo (dynamic-undefined-weak): Document.
(nodynamic-undefined-weak): Document that this option now can
be used with shared libs.
* emulparams/dynamic_undefined_weak.sh: Support -z
dynamic-undefined-weak.
* emulparams/elf32ppccommon.sh: Include dynamic_undefined_weak.sh.
* testsuite/ld-undefined/weak-undef.exp (undef_weak_so),
(undef_weak_exe): New. Use them. Add -z dynamic-undefined-weak
and -z nodynamic-undefined-weak tests.
* Makefile.am: Update powerpc dependencies.
* Makefile.in: Regenerate.
First, need to match against just the CPU name, not the whole triplet.
Otherwise, the test picks up "*le-*" pattern from x86_64-apple-darwin
triplet.
Second, it should be testing for $target, not $host. Host may be
little endian by default, and the sysroot directory layout shouldn't
depend on whether it is built on LE or BE machine.
* emulparams/elf32ppccommon.sh (LIBPATH_SUFFIX): Set from target
cpu, not host.
"_gp" could conflict with ABI-complient code. While it's probably OK
because MIPS uses this name, we figured it'd be good to clean this up
before a release with RISC-V in it.
ld/ChangeLog:
2017-02-13 Palmer Dabbelt <palmer@dabbelt.com>
* emulparams/elf32lriscv-defs.sh (SDATA_START_SYMBOLS): Change
_gp to __global_pointer$.
bfd/ChangeLog:
2017-02-13 Palmer Dabbelt <palmer@dabbelt.com>
* elfnn-riscv.c (riscv_global_pointer_value): Change _gp to
__global_pointer$.
This patch places .plt.got section after .plt section for x32.
* emulparams/elf32_x86_64.sh (TINY_READONLY_SECTION): New.
* testsuite/ld-x86-64/pr20830.d: Renamed to ...
* testsuite/ld-x86-64/pr20830a.d: This. Updated.
* testsuite/ld-x86-64/pr20830b.d: New file.
* testsuite/ld-x86-64/x86-64.exp: Rename pr20830 to pr20830a.
Run pr20830b.
The arc700 nps variant uses some specific named sections to
facilitate its CMEM based instructions, which operate on memory
regions fixed at specific addresses.
This commit adds the arclinux_nps emulation, which is based on the
arclinux emulation. The new emulation uses the OTHER_SECTIONS
variable in the emulation parameters script to provide symbols
mapping to various locations in the CMEM space on nps.
The accompanying test ensures that all symbols are provided at the
correct address in the linker script.
ld/ChangeLog:
* Makefile.am: Add earclinux_nps.c target and add to
ALL_EMULATION_SOURCES.
* Makefile.in: Likewise, regenerated.
* configure.tgt: Add arclinux_nps as an extra emulation for
arc*-*-elf* and arc*-*-linux*.
* emulparams/arc-nps.sh: New file.
* emulparams/arclinux_nps.sh: New file.
* testsuite/ld-arc/arclinux-nps.d,
* testsuite/ld-arc/arclinux-nps.s: New test.
This was added so compressed loads could have smaller offsets for
accessing the data section, but the result was that writable sections
ended up in INITIAL_READONLY_SECTIONS. This is a bad idea. The fix is
to just remove this micro-optimization.
Thanks to Alan Morda for finding the problem!
ld/ChangeLog
2017-01-09 Palmer Dabbelt <palmer@dabbelt.com>
Kito Cheng <kito.cheng@gmail.com>
* emulparams/elf32lriscv-defs.sh (INITIAL_READONLY_SECTIONS):
Removed.
(SDATA_START_SYMBOLS): Likewise.
* configure.ac: Add fuchsia to targets that use ELF.
* configure: Regenerated.
bfd * configure.tgt: Add support for fuchsia (OS).
gas * configure.tgt: Add support for fuchsia (OS).
ld * Makefile.am: Add dependency information for earmelf_fuchsia.c.
* Makefile.in: Regenerate.
* configure.tgt: Add support for aarch64-*-fuchsia, arm*-*-fuchsia*, and
x86_64-*-fuchsia* targets.
* emulparams/armelf_fuchsia.sh: New file.
* emulparams/armelfb_fuchsia.sh: New file.
Remove duplicate definition of TEMPLATE_NAME, only the last of these
will have any effect, so this should result in no visible changes to the
user.
ld/ChangeLog:
* emulparams/arclinux_prof.sh: Remove duplicate TEMPLATE_NAME.
Turned out that by moving the binary start to 256M I've hit a case with
potentially a lot of aliasing in the branch target buffer between
binaries and shared libs. So moving on.
Tested on s390x. No regressions.
ld/ChangeLog:
2016-10-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* emulparams/elf64_s390.sh: Move binary start to 16M.
* testsuite/ld-s390/tlsbin_64.dd: Adjust testcases accordingly.
* testsuite/ld-s390/tlsbin_64.rd: Likewise.
The R_ARC_SDA32 is wrongly described as a ME relocation, fix it. Offset the
__SDATA_BEGIN__ to take advantage of the signed 9-bit field of the
load/store instructions.
include/
2016-07-08 Claudiu Zissulescu <claziss@synopsys.com>
* elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
ld/
2016-07-08 Claudiu Zissulescu <claziss@synopsys.com>
* emulparams/arcelf.sh (SDATA_START_SYMBOLS): Add offset.
* testsuite/ld-arc/sda-relocs.dd: New file.
* testsuite/ld-arc/sda-relocs.ld: Likewise.
* testsuite/ld-arc/sda-relocs.rd: Likewise.
* testsuite/ld-arc/sda-relocs.s: Likewise.
* testsuite/ld-arc/arc.exp: Add SDA tests.
2016-05-19 Cupertino Miranda <cmiranda@synopsys.com>
* emulparams/arcelf.sh: Changed.
* emulparams/arclinux.sh: Likewise.
* scripttempl/arclinux.sc: Moved to a more standard implementation
similar to elf.sc.
Delaying checking ELF relocations until opening all input files so
that symbol information is final when relocations are checked. This
is only enabled for x86 targets.
bfd/
* elf-bfd.h (_bfd_elf_link_check_relocs): New.
* elflink.c (_bfd_elf_link_check_relocs): New function.
(elf_link_add_object_symbols): Call _bfd_elf_link_check_relocs
if check_relocs_after_open_input is FALSE.
include/
* bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
ld/
* emulparams/elf32_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
New.
* emulparams/elf_i386.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_be.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_chaos.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_ldso.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_i386_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/elf_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emulparams/i386nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
Likewise.
* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse):
Set check_relocs_after_open_input to TRUE if
CHECK_RELOCS_AFTER_OPEN_INPUT is yes.
(gld${EMULATION_NAME}_after_open): Call
_bfd_elf_link_check_relocs on all inputs if
check_relocs_after_open_input is TRUE.
When building with --enable-targets=all the target string is not set to
something that matches the pattern arc*-*, and so the script used to
decide if we should build big or little endian linker script currently
exits with an error.
This commit makes little endian linker script be the default, which will
be used when building for all targets, this matches the behaviour from
before I made the endianness switchable, when we only ever built little
endian linker scripts anyway.
ld/ChangeLog:
* emulparams/arc-endianness.sh: Make little endian default choice.
This aims to bring the linker for big-endian arc targets into line with
the linker for (the default) little endian arc targets.
The bulk of the changes are to extend the target pattern in the test
files from 'arc-*...' to 'arc*-*...' and so match both big and little
endian arc targets.
In the ld/emulparams/ directory the existing scripts checked for a
variable ARC_ENDIAN to switch between big and little endian targets,
however, this variable is never set up.
So, a new script snippet is introduced which sets up ARC_ENDIAN based on
the value of target, this snippet is then included from all of the
existing arc scripts.
The existing big-endian variants of all the scripts, which existed, but
were never used, are deleted in this commit.
ld/ChangeLog:
* emulparams/arc-endianness.sh: New file.
* emulparams/arcebelf.sh: Deleted.
* emulparams/arcebelf_prof.sh: Deleted.
* emulparams/arceblinux.sh: Deleted.
* emulparams/arceblinux_prof.sh: Deleted.
* emulparams/arcelf.sh: Include arc-endinness.sh.
* emulparams/arcelf_prof.sh: Include arc-endinness.sh.
* emulparams/arclinux.sh: Include arc-endinness.sh.
* emulparams/arclinux_prof.sh: Include arc-endinness.sh.
* emulparams/arcv2elf.sh: Include arc-endinness.sh.
* emulparams/arcv2elfx.sh: Include arc-endinness.sh.
* testsuite/ld-elf/compressed1d.d: Update pattern for big and
little endian arc targets.
* testsuite/ld-elf/eh-frame-hdr.d: Likewise.
* testsuite/ld-elf/group1.d: Likewise.
* testsuite/ld-elf/group3b.d: Likewise.
* testsuite/ld-elf/group8a.d: Likewise.
* testsuite/ld-elf/group8b.d: Likewise.
* testsuite/ld-elf/group9a.d: Likewise.
* testsuite/ld-elf/group9b.d: Likewise.
* testsuite/ld-elf/linkonce2.d: Likewise.
* testsuite/ld-elf/pr12851.d: Likewise.
* testsuite/ld-elf/pr12975.d: Likewise.
* testsuite/ld-elf/pr13177.d: Likewise.
* testsuite/ld-elf/pr13195.d: Likewise.
* testsuite/ld-elf/pr17615.d: Likewise.
* testsuite/ld-elf/pr19162.d: Likewise.
* testsuite/ld-elf/sec64k.exp: Likewise.
* testsuite/lib/ld-lib.exp: Likewise.
ld * Makefile.am (ALL_64_EMULATION_SOURCES): Add support for
CloudABI on aarch64. For this target we have to make sure we use
ELFOSABI_CLOUDABI instead of ELFOSABI_NONE.
* configure.tgt (targ_emul): Likewise.
* emulparams/aarch64cloudabi.sh: New file.
* emulparams/aarch64cloudabib.sh: New file.
* Makefile.in: Regenerate.
bfd * config.bfd (targ_defvec): Add support for CloudABI on aarch64.
For this target we have to make sure we use ELFOSABI_CLOUDABI
instead of ELFOSABI_NONE.
* configure.ac (tb): Likewise.
* elfnn-aarch64.c: Likewise.
* targets.c (_bfd_target_vector): Likewise.
* configure: Regenerate.
gas * config/tc-aarch64.c (elf64_aarch64_target_format): Select the
cloudabi format if the TARGET_OS is cloudabi.
gas * config/tc-rl78.c (rl78_abs_sym): New local variable.
(md_begin): Initialise the new symbol.
(OPIMM): Define the value to be relative to the new symbol and not
the absolute section symbol.
ld * emulparams/elf32rl78.sh (OTHER_SECTIONS): Provide a value for
the _-rl78_abs__ symbol.
tests * gas/all/struct.d: Allow for extra symbols in the output.
* gas/macros/test1.d: Likewise.
* gas/elf/elf.exp: Add an rl78 machine.
* gas/elf/sections2e-rl78: New file.
tests * binutils-all/localize-hidden-1.d: Allow for extra symbols in the
output.
* binutils-all/strip-11.d: Skip for the RL78.
More fallout from a2c59f28. This one could have been fixed by simply
using ". = ALIGN (ABSOLUTE (.), 2);" but it's nicer to align the
section.
* emulparams/criself.sh (INIT_ADDR, FINI_ADDR): Define.
(INIT_START, FINI_START): Don't ALIGN.
* scriptempl/elf.sc (.init, .fini): Apply INIT_ADDR/FINI_ADDR.
gas * config/tc-msp430.c (MAX_OP_LEN): Increase to 4096.
(msp430_make_init_symbols): New function.
(msp430_section): Call it.
(msp430_frob_section): Likewise.
ld * emulparams/msp430elf.sh (TEMPLATE_NAME): Change to msp430.
* scripttempl/msp430.sc (.text): Add .lower.text and .either.text.
(.data): Add .lower.data and .either.data.
(.bss): Add .lower.bss and .either.bss.
(.rodata): Add .lower.rodata and .either.rodata.
* emultempl/msp430.em: New file. Implements a new orphan
placement algorithm that divides sections between lower and upper
memory regions.
* Makefile.am (emsp430elf.c): Depend upon msp430.em.
*emsp430X.c): Likewise.
* Makefine.in: Regenerate.
Address of protected data defined in the shared library may be external,
i.e., due to copy relocation. By default, linker backend checks if
relocations against protected data symbols are valid for building shared
library and issues an error if relocation isn't allowed. The new option
override linker backend default. When -z noextern-protected-data is used,
updates on protected data symbols by another module won't be visibile
to the resulting shared library. This option is specific to ELF/i386
and ELF/x86-64.
bfd/
PR ld/pr17709
* elflink.c (_bfd_elf_adjust_dynamic_copy): Check
info->extern_protected_data when warning copy relocs against
protected symbols.
(_bfd_elf_symbol_refs_local_p): Check info->extern_protected_data
when checking protected non-function symbols.
include/
PR ld/pr17709
* bfdlink.h (bfd_link_info): Add extern_protected_data.
ld/
PR ld/pr17709
* ld.texinfo: Document "-z noextern-protected-data".
* ldmain.c (main): Initialize link_info.extern_protected_data
to -1.
* lexsup.c (elf_shlib_list_options): Add
"-z [no]extern-protected-data".
* emulparams/elf32_x86_64.sh: Source extern_protected_data.sh.
* emulparams/elf_i386.sh: Likewise.
* emulparams/elf_i386_be.sh: Likewise.
* emulparams/elf_i386_chaos.sh: Likewise.
* emulparams/elf_i386_ldso.sh: Likewise.
* emulparams/elf_i386_vxworks.sh: Likewise.
* emulparams/elf_k1om.sh: Likewise.
* emulparams/elf_l1om.sh: Likewise.
* emulparams/elf_x86_64.sh: Source extern_protected_data.sh.
(PARSE_AND_LIST_OPTIONS): Renamed to ...
(PARSE_AND_LIST_OPTIONS_BNDPLT): This.
(PARSE_AND_LIST_ARGS_CASE_Z): Renamed to ...
(PARSE_AND_LIST_ARGS_CASE_Z_BNDPLT): This.
(PARSE_AND_LIST_OPTIONS): Append $PARSE_AND_LIST_OPTIONS_BNDPLT.
(PARSE_AND_LIST_ARGS_CASE_Z): Append
$PARSE_AND_LIST_ARGS_CASE_Z_BNDPLT.
* emulparams/extern_protected_data.sh: New file.
ld/testsuite/
PR ld/pr17709
* ld-i386/i386.exp: Run protected6b.
* ld-i386/protected6b.d: New file.
* ld-x86-64/protected6b.d: Likewise.
* ld-x86-64/x86-64.exp: Run protected6b.
bfd * elf32-v850.c (v850_set_note): New function. Creates a Renesas
style note entry.
(v850_elf_make_note_section): New function. Creates a note
section.
(v850_elf_create_sections): New function. Create a note section
if one is not already present.
(v850_elf_set_note): New function. Adds a note to a bfd.
(v850_elf_copy_private_bfd_data): New function. Copies V850
notes.
(v850_elf_merge_notes): New function. Merges V850 notes.
(print_v850_note): New function. Displays a V850 note.
(v850_elf_print_notes): New function. Displays all notes attached
to a bfd.
(v850_elf_merge_private_bfd_data): Call v850_elf_merge_notes.
(v850_elf_print_private_bfd_data): Call v850_elf_print_notes.
(v850_elf_fake_sections): Set the type of the V850 note section.
* bfd-in.h (v850_elf_create_sections): Add prototype.
(v850_elf_set_note): Add prototype.
* bfd-in2.h: Regenerate.
binutils* readelf.c (get_machine_flags): Remove deprecated V850 machine
flags.
(get_v850_section_type_name): New function. Handles V850 special
sections.
(get_section_type_name): Add support for V850.
(get_v850_elf_note_type): New function. Returns the name of a
V850 note.
(print_v850_note): New function. Prints a V850 note.
(process_v850_notes): New function. Prints V850 notes.
(process_note_sections): Add support for V850.
binutils/testsute
* binutils-all/objcopy.exp: Skip the strip-10 test for the V850.
gas * config/tc-v850.c (soft_float): New variable.
(v850_data_8): New variable.
(md_show_usage): Add -msoft-float/-mhard-float.
(md_parse_option): Likewise.
(md_begin): Set the default value of soft_float.
(v850_md_end): New function. Creates a note section.
* config/tc-v850.h (md_end): Define.
* doc/c-v850.texi: Document -msoft-float/-mhard-float.
gas/testsuite
* gas/elf/elf.exp: Add special version of the section2 test for
the V850.
* gas/elf/section2.e-v850: New file.
include/elf
* v850.h (EF_RH850_SIMD): Delete deprecated flag.
(EF_RH850_CACHE): Likewise.
(EF_RH850_MMU): Likewise.
(EF_RH850_DATA_ALIGN8): Likewise.
(SHT_RENESAS_IOP): Fix typo in name.
(SHT_RENESAS_INFO): Define.
(V850_NOTE_SECNAME): Define.
(SIZEOF_V850_NOTE): Define.
(V850_NOTE_NAME): Define.
(enum v850_notes): New enum.
(NUM_V850_NOTES): Define.
ld/ChangeLog
2015-02-24 Nick Clifton <nickc@redhat.com>
* Makefile.am (ev850.c): Add dependency upon
$(srcdir)/emultempl/v850elf.em.
(ev850_rh850.c): Likewise.
* Makefile.in: Regenerate.
* emultempl/v850elf.em: New file.
* emulparams/v850.sh (EXTRA_EM_FILE): Define.
* emulparams/v850_rh850.sh (EXTRA_EM_FILE): Define.
* scripttempl/v850.sc: Add .note.renesas section.
* scripttempl/v850_rh850.sc: Likewise.
ld/testsuite
* ld-elf/extract-symbol-1sec.d: Expect to fail on the V850.
The changes to reorder sections for better relro protection on powerpc64,
3e2b0f31, 23283c1b, and 5ad18f16, run into a problem with xlc.
xlc -qdatalocal puts global variables into .toc, which means that .toc
must be writable. The simplest way to accomplish this is to edit the
linker script to remove .toc sections from .got on detecting xlc object
files.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add "object_in_toc".
* elf64-ppc.c (ppc64_elf_add_symbol_hook): Assume that global symbols
in .toc indicate xlc compiled code that might require a rw .toc.
ld/
* emulparams/elf64ppc.sh (INITIAL_READWRITE_SECTIONS): Define.
* emultempl/ppc64elf.em (params): Init new field.
(ppc_after_open): New function.
(LDEMUL_AFTER_OPEN): Define.
* ldlang.c (lang_final): Whitespace fix.
ld/testsuite/
* ld-powerpc/tocvar.d, * ld-powerpc/tocvar.s: New test.
* ld-powerpc/tocnovar.d, * ld-powerpc/tocnovar.s: New test.
* ld-powerpc/powerpc.exp: Run tocvar and tocnovar.
.toc1 is the second level TOC section used by gcc's -mminimal-toc. It
too should be read-only after relocation. Also, the last patch
description mentioned .sbss moving but didn't actually do that, so fix
that problem. .tocbss (whatever that is) was before .sbss previously,
so move that one too.
* emulparams/elf64ppc.sh (OTHER_SDATA_SECTIONS): Use in place of..
(OTHER_BSS_SYMBOLS): ..this.
(OTHER_PLT_RELOC_SECTIONS): Don't define.
(OTHER_GOT_RELOC_SECTIONS): Add rela.toc1 and rela.tocbss.
(OTHER_READWRITE_SECTIONS): Don't define. Move .toc1 to..
(OTHER_RELRO_SECTIONS_2): ..here.
* scripttempl/elf.sc: Move SBSS too when DATA_SDATA.
This moves .got too, which requires .sdata and .sbss to move with it,
because these sections share addressing via the toc pointer and with
small-model code must be within a 16-bit signed offset. .plt, .iplt
and .branch_lt must also be moved since they are addressed via a
32-bit offset from the toc pointer, and we might have a very large
.data section.
This change means we may have some bss style sections before the data
segment, necessitating another PT_LOAD header. Also, since _edata is
defined at the end of the data segment it's possible with an empty
.data to have _edata at the end of .plt which looks a little unusual
since .plt is a bss style section. That should only happen rarely in
real world binaries, but does occur in the ld testsuite.
ld/
* emulparams/elf64ppc.sh (BSS_PLT): Don't define.
(OTHER_READWRITE_SECTIONS): Move .branch_lt to..
(OTHER_RELRO_SECTIONS_2): ..here.
(DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT,
PLT_BEFORE_GOT): Define.
* scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/
PLT_BEFORE_GOT combination.
(DATA_GOT, SDATA_GOT): Don't define if either is already defined.
ld/testsuite/
* ld-powerpc/ambiguousv1.d,
* ld-powerpc/ambiguousv1b.d,
* ld-powerpc/ambiguousv2.d,
* ld-powerpc/ambiguousv2b.d,
* ld-powerpc/elfv2exe.d,
* ld-powerpc/elfv2so.d,
* ld-powerpc/tlsexe.r,
* ld-powerpc/tlsexetoc.r,
* ld-powerpc/tlsso.r,
* ld-powerpc/tlstocso.r: Update.
More sections can be read-only after relocation. .opd is an obvious
candidate.
* emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Move .opd to..
(OTHER_RELRO_SECTIONS_2): ..here, new define.
* scripttempl/elf.sc: Add OTHER_RELRO_SECTIONS_2.
When there are both PLT and GOT references to the same function symbol,
linker will create a GOTPLT slot for PLT entry and a GOT slot for GOT
reference. A run-time JUMP_SLOT relocation is created to update the
GOTPLT slot and a run-time GLOB_DAT relocation is created to update the
GOT slot. Both JUMP_SLOT and GLOB_DAT relocations will apply the same
symbol value to GOTPLT and GOT slots, respectively, at run-time.
This optimization combines GOTPLT and GOT slots into a single GOT slot
and removes the run-time JUMP_SLOT relocation. It replaces the regular
PLT entry:
indirect jump [GOTPLT slot]
push relocation index
jump PLT0
with an GOT PLT entry with an indirect jump via the GOT slot:
indirect jump [GOT slot]
nop
and resolves PLT reference to the GOT PLT entry.
We must avoid this optimization if pointer equality is needed since
we don't clear symbol value in this case and the dynamic linker won't
update the GOT slot. Otherwise, the resulting binary will get into an
infinite loop at run-time.
bfd/
* elf32-i386.c (elf_i386_got_plt_entry): New.
(elf_i386_pic_got_plt_entry): Likewise.
(elf_i386_link_hash_entry): Add plt_got.
(elf_i386_link_hash_table): Likewise.
(elf_i386_link_hash_newfunc): Initialize plt_got.offset to -1.
(elf_i386_get_local_sym_hash): Likewise.
(elf_i386_check_relocs): Create the GOT PLT if there are both
PLT and GOT references when the regular PLT is used.
(elf_i386_allocate_dynrelocs): Use the GOT PLT if there are
both PLT and GOT references unless pointer equality is needed.
(elf_i386_relocate_section): Also check the GOT PLT when
resolving R_386_PLT32.
(elf_i386_finish_dynamic_symbol): Use the GOT PLT if it is
available.
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add plt_got.
(elf_x86_64_link_hash_table): Likewise.
(elf_x86_64_link_hash_newfunc): Initialize plt_got.offset to -1.
(elf_x86_64_get_local_sym_hash): Likewise.
(elf_x86_64_check_relocs): Create the GOT PLT if there are both
PLT and GOT references when the regular PLT is used.
(elf_x86_64_allocate_dynrelocs): Use the GOT PLT if there are
both PLT and GOT references unless pointer equality is needed.
(elf_x86_64_relocate_section): Also check the GOT PLT when
resolving R_X86_64_PLT32.
(elf_x86_64_finish_dynamic_symbol): Use the GOT PLT if it is
available.
ld/
* emulparams/elf_i386.sh (TINY_READONLY_SECTION): New.
* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): Add .plt.got.
ld/testsuite/
* ld-i386/i386.exp: Add run-time relocation tests for plt-main.
* ld-i386/plt-main.rd: New file.
* ld-x86-64/plt-main-bnd.dd: Likewise.
* ld-x86-64/plt-main.rd: Likewise.
* ld-x86-64/x86-64.exp: Add run-time relocation tests for
plt-main.
Override the default value of 0x0000 defined in
TEXT_START_ADDR to avoid linux executables to be mapped
at zero page.
ld/
* emulparams/elf32or1k_linux.sh (TEXT_START_ADDR): Increase from
0x0 to first page boundary at 0x2000.
Increase the maximum page size to 64kB and align the TEXT_START_ADDR
to a 64kB boundary. This brings AArch32 in line with AArch64 and
improves compatability under certain conditions.
bfd/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* elf32-arm.c (ELF_MAXPAGESIZE): Increase the default
value to 64kB and remove custom setting for NaCl.
ld/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* emulparams/armelf_linux.sh (TEXT_START_ADDR): Increase
alignment to 64kB boundary.
ld/testsuite/ChangeLog:
2014-07-08 Will Newton <will.newton@linaro.org>
* ld-arm/arm-lib.ld: Increase MAXPAGESIZE value to
match bfd.
* ld-arm/cortex-a8-fix-bl-rel-plt.d: Update offsets to
take into account increased segment alignment.
* ld-arm/ifunc-gdesc.r: Likewise.
* ld-arm/tls-lib.d: Likewise.
* archures.c: add avrtiny architecture for avr target.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): add avrtiny arch info.
* elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16
added for 16 bit LDS/STS instruction of avrtiny arch.
(avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to
BFD_RELOC_AVR_LDS_STS_16.
(bfd_elf_avr_final_write_processing): select machine number avrtiny arch.
(elf32_avr_object_p): set machine number for avrtiny arch.
* libbfd.h: Regenerate.
* reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc.
* config/tc-avr.c (mcu_types): Add avrtiny arch.
Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
and attiny40.
(md_show_usage): Add avrtiny arch in usage message.
(avr_operand): validate and issue error for invalid register for avrtiny.
add new reloc exp for 16 bit lds/sts instruction.
(md_apply_fix): check 16 bit lds/sts operand for out of range and encode.
(md_assemble): check ISA for arch and issue diagnostic.
* include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number.
(R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number.
* include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA.
(AVR_ISA_2xxxa): define ISA without LPM.
(AVR_ISA_AVRTINY): define avrtiny arch ISA.
Add doc for contraint used in 16 bit lds/sts.
Adjust ISA group for icall, ijmp, pop and push.
Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints.
* opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
(print_insn_avr): do not select opcode if insn ISA is avrtiny and machine
is not avrtiny.
* Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source.
(eavrtiny.c): add rules for avrtiny emulation source.
* Makefile.in: Regenerate.
* configure.tgt: Add avrtiny to avr target emulations.
* scripttempl/avrtiny.sc: New file.
linker script template for avrtiny arch.
* emulparams/avrtiny.sh: New file.
emulation parameters for avrtiny arch.
bfin, msp, and score all used an extra parameter to genscripts.sh
to select a "customizer_script" different from the standard one
named from the emulation. This patch renames the scripts to avoid
the need, tidying them in the process.
* emulparams/elf32bfin.sh: Rename from bfin.sh.
* emulparams/elf32bfinfd.sh: Update to suit.
* emulparams/: Delete.
* emulparams/msp430.sh: Rename from msp430all.sh. Remove
MSP430_NAME and msp430X vars.
* emulparams/msp430X.sh: New.
* emulparams/: Delete.
* emulparams/score3_elf.sh: Rename from scoreelf.sh. Remove
SCORE_NAME and score7_elf ARCH setting.
* emulparams/score7_elf.sh: New.
* Makefile.am (eelf32bfin.c, eelf32bfinfd.c): Update dependencies.
(emsp430.c, emsp430X.c, escore3_elf.c, escore7_elf.c): Likewise.
* Makefile.in: Regenerate.
* genscripts.sh: Delete customizer_script param.
1) _SDA_BASE_ and _SDA2_BASE_ and defined automatically, in a similar
manner to the way _GLOBAL_OFFSET_TABLE_ is handled. It's a little
more complicated to remove the symbols because _SDA_BASE_ needs to
be there if either .sdata or .sbss is present, and similarly for
_SDA2_BASE.
2) The linker created .sdata and .sdata2 sections used for
R_PPC_EMB_SDAI16 and R_PPC_EMB_SDA2I16 pointers are created early.
Nowadays we strip unneeded sections from the output, so it isn't
necessary to delay creating the sections.
3) The output section for targets of various SDA relocs is now checked
as per the ABI(s). We previously allowed .sdata.foo and similar,
most likely because at some stage we were checking input sections.
Also, the patch fixes a long-standing bug in size_input_sections
that affects the values of symbols defined in stripped input
sections.
PR 16952
bfd/
* elf32-ppc.c (ppc_elf_create_linker_section): Move earlier.
Remove redundant setting of htab->elf.dynobj. Don't align.
Define .sdata symbols using _bfd_elf_define_linkage_sym.
(ppc_elf_create_glink): Call ppc_elf_create_linker_section.
(create_sdata_sym): Delete.
(elf_allocate_pointer_linker_section): Rename from
elf_create_pointer_linker_section. Align section.
(ppc_elf_check_relocs): Don't call ppc_elf_creat_linker_section
directly here, or create_sdata_sym. Set ref_regular on _SDA_BASE_
and _SDA2_BASE_.
(ppc_elf_size_dynamic_sections): Remove ATTRIBUTE_UNUSED on param.
Remove unnecessary tests on _SDA_BASE_ sym.
(maybe_strip_sdasym, ppc_elf_maybe_strip_sdata_syms): New functions.
(ppc_elf_relocate_section): Tighten SDA reloc symbol section checks.
* elf32-ppc.h (ppc_elf_set_sdata_syms): Delete.
(ppc_elf_maybe_strip_sdata_syms): Declare.
ld/
* emulparams/elf32ppccommon.sh (_SDA_BASE_, _SDA2_BASE_): Delete.
* emultempl/ppc32elf.em (ppc_before_allocation): Call
ppc_elf_maybe_strip_sdata_syms.
* ldlang.c (size_input_section): Correct output_offset value
for excluded input sections.
The manifest is necessary in order for the linked binaries to be executed in a Windows 8 environment.
The manifest is added using a linker script so that this feature will be compiler-neutral. The resource
merging code in the linker means that if an application provides its own manifest then the default
manifest will be ignored.
* configure.in (all_emul_extra_binaries): New variable. Populated
by invoking configure.tgt.
(EMUL_EXTRA_BINARIES): New substitution.
* configure: Regenerate.
* configure.tgt (target_extra_binaries): New variable. Set to
default-manifest.o for Cygwin and MinGW targets.
* Makefile.am (EMUL_EXTRA_BINARIES): New variable. Initialised
by the configure script.
(ALL_EMUL_EXTRA_BINARIES): New variable.
(default-manifest.o): New rule to build the default manifest.
(ld_new_DEPENDENCIES): Add EMUL_EXTRA_BINARIES.
(install-data-local): Add EMUL_EXTRA_BINARIES.
* Makefile.in: Regenerate.
* ld.texinfo: Document default manifest support.
* emulparams/i386pe.sh (DEFAULT_MANIFEST): Define.
* emulparams/i386pep.sh (DEFAULT_MANIFEST): Define.
* emultempl/default-manifest.rc: New file.
* scripttempl/pe.sc (R_RSRC): Include DEFAULT_MANIFEST, if defined.
* scripttempl/pep.sc (R_RSRC): Likewise.
* ld-pe/longsecn-1.d: Allow for extra sections.
* ld-pe/longsecn-2.d: Likewise.
* ld-pe/longsecn.d: Likewise.
* ld-pe/secrel.d: Likewise.
5446cbdf82 broke powerpc-lynxos,
powerpc-netware, powerpc-windiss and powerpc-vxworks.
bfd/
* elf32-ppc.c (ppc_elf_link_hash_table_create): Provide default
params for targets that don't use ppc32elf.em.
ld/
* emulparams/elf32ppcvxworks.sh: Source plt_unwind.sh and
use ppc32elf.em.
* emultempl/ppc32elf.em (ppc_after_open): Don't compile for
vxworks.
(LDEMUL_AFTER_OPEN): Don't set for vxworks.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Exclude
-secure-plt, -bss-plt and -sdata-got when vxworks.
Intel MPX introduces 4 bound registers, which will be used for parameter
passing in x86-64. Bound registers are cleared by branch instructions.
Branch instructions with BND prefix will keep bound register contents.
This leads to 2 requirements to 64-bit MPX run-time:
1. Dynamic linker (ld.so) should save and restore bound registers during
symbol lookup.
2. Change the current 16-byte PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
ff 25 00 10 00 jmpq *GOT+16(%rip)
0f 1f 40 00 nopl 0x0(%rax)
and 16-byte PLT1:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
which clear bound registers, to preserve bound registers.
We use 2 new relocations:
to mark branch instructions with BND prefix.
When linker sees any R_X86_64_PC32_BND or R_X86_64_PLT32_BND relocations,
it switches to a different PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
f2 ff 25 00 10 00 bnd jmpq *GOT+16(%rip)
0f 1f 00 nopl (%rax)
to preserve bound registers for symbol lookup and it also creates an
external PLT section, .pl.bnd. Linker will create a BND PLT1 entry
in .plt:
68 00 00 00 00 pushq $index
f2 e9 00 00 00 00 bnd jmpq PLT0
0f 1f 44 00 00 nopl 0(%rax,%rax,1)
and a 8-byte BND PLT entry in .plt.bnd:
f2 ff 25 00 00 00 00 bnd jmpq *name@GOTPCREL(%rip)
90 nop
Otherwise, linker will create a legacy PLT1 entry in .plt:
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
66 0f 1f 44 00 00 nopw 0(%rax,%rax,1)
and a 8-byte legacy PLT in .plt.bnd:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
66 90 xchg %ax,%ax
The initial value of the GOT entry for "name" will be set to the the
"pushq" instruction in the corresponding entry in .plt. Linker will
resolve reference of symbol "name" to the entry in the second PLT,
.plt.bnd.
Prelink stores the offset of pushq of PLT1 (plt_base + 0x10) in GOT[1]
and GOT[1] is stored in GOT[3]. We can undo prelink in GOT by computing
the corresponding the pushq offset with
GOT[1] + (GOT offset - &GOT[3]) * 2
Since for each entry in .plt except for PLT0 we create a 8-byte entry in
.plt.bnd, there is extra 8-byte per PLT symbol.
We also investigated the 16-byte entry for .plt.bnd. We compared the
8-byte entry vs the the 16-byte entry for .plt.bnd on Sandy Bridge.
There are no performance differences in SPEC CPU 2000/2006 as well as
micro benchmarks.
Pros:
No change to undo prelink in dynamic linker.
Only 8-byte memory overhead for each PLT symbol.
Cons:
Extra .plt.bnd section is needed.
Extra 8 byte for legacy branches to PLT.
GDB is unware of the new layout of .plt and .plt.bnd.
bfd/
* elf64-x86-64.c (elf_x86_64_bnd_plt0_entry): New.
(elf_x86_64_legacy_plt_entry): Likewise.
(elf_x86_64_bnd_plt_entry): Likewise.
(elf_x86_64_legacy_plt2_entry): Likewise.
(elf_x86_64_bnd_plt2_entry): Likewise.
(elf_x86_64_bnd_arch_bed): Likewise.
(elf_x86_64_link_hash_entry): Add has_bnd_reloc and plt_bnd.
(elf_x86_64_link_hash_table): Add plt_bnd.
(elf_x86_64_link_hash_newfunc): Initialize has_bnd_reloc and
plt_bnd.
(elf_x86_64_copy_indirect_symbol): Also copy has_bnd_reloc.
(elf_x86_64_check_relocs): Create the second PLT for Intel MPX
in 64-bit mode.
(elf_x86_64_allocate_dynrelocs): Handle the second PLT for IFUNC
symbols. Resolve call to the second PLT if it is created.
(elf_x86_64_size_dynamic_sections): Keep the second PLT section.
(elf_x86_64_relocate_section): Resolve PLT references to the
second PLT if it is created.
(elf_x86_64_finish_dynamic_symbol): Use BND PLT0 and fill the
second PLT entry for BND relocation.
(elf_x86_64_finish_dynamic_sections): Use MPX backend data if
the second PLT is created.
(elf_x86_64_get_synthetic_symtab): New.
(bfd_elf64_get_synthetic_symtab): Likewise. Undefine for NaCl.
ld/
* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): New.
ld/testsuite/
* ld-x86-64/mpx.exp: Run bnd-ifunc-1 and bnd-plt-1.
* ld-x86-64/bnd-ifunc-1.d: New file.
* ld-x86-64/bnd-ifunc-1.s: Likewise.
* ld-x86-64/bnd-plt-1.d: Likewise.
Since all MCUs now have their own specific linker script (courtesy of
TI) there is no need for these emulations and so this patch removes
them.
* Makefile.am: Remove obsolete MSP430 emulations.
* configure.tgt: Likewise.
* emulparams/msp430all.sh: Likewise.
* Makefile.in: Regenerate.
On Linux/x86-64, when binutils is configured with --libdir=/usr/lib64,
genscripts.sh treats /usr/lib64 as the default search directory. It
puts /usr/lib64 in linker scripts for all emulations, like
---
/* Script for -z combreloc: combine and sort reloc sections */
OUTPUT_FORMAT("elf32-i386", "elf32-i386",
"elf32-i386")
OUTPUT_ARCH(i386)
ENTRY(_start)
SEARCH_DIR("/usr/x86_64-redhat-linux/lib32");
SEARCH_DIR("/usr/i386-redhat-linux/lib32"); SEARCH_DIR("/usr/lib6432");
SEARCH_DIR("/usr/local/lib32"); SEARCH_DIR("/lib32");
SEARCH_DIR("/usr/lib32"); SEARCH_DIR("/usr/i386-redhat-linux/lib");
SEARCH_DIR("/usr/lib64"); SEARCH_DIR("/usr/local/lib");
SEARCH_DIR("/lib"); SEARCH_DIR("/usr/lib");
---
/usr/lib6432 is odd and /usr/lib64 is wrong. This patch changes
genscripts.sh to check LIBPATH_SUFFIX_SKIP if it is defined. It
skips directories with LIBPATH_SUFFIX_SKIP suffix.
PR ld/16456
* genscripts.sh: Don't search directory with LIBPATH_SUFFIX_SKIP
suffix.
* emulparams/elf32_x86_64.sh (LIBPATH_SUFFIX_SKIP): Set to 64
for elf32_x86_64 emulation.
* emulparams/elf_i386.sh (LIBPATH_SUFFIX_SKIP): Set to 64
for elf_i386 emulation.
These files are source files and have no business being +x. We couldn't
easily fix it in CVS (you need login+write access to the raw rcs files),
but we can fix this w/git.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* archures.c (bfd_mach_i386_nacl, bfd_mach_i386_i386_nacl): New macros.
(bfd_mach_x86_64_nacl, bfd_mach_x64_32_nacl): New macros.
* cpu-i386.c (bfd_arch_i386_onebyte_nop_fill): New function.
(bfd_i386_nacl_arch): New variable.
(bfd_x86_64_nacl_arch, bfd_x64_32_nacl_arch): New variables.
(bfd_x64_32_arch_intel_syntax): Link them into the list.
* bfd-in2.h: Regenerate.
ld/
* emulparams/elf_i386_nacl.sh (ARCH): Set to i386:nacl.
* emulparams/elf_x86_64_nacl.sh (ARCH): Set to i386:x86-64:nacl.
* emulparams/elf32_x86_64_nacl.sh (ARCH): Set to i386:x64-32:nacl.
ld/testsuite/
* ld-x86-64/x86-64.exp (Mixed x86_64 and i386 input test 1):
Loosen string match to admit i386:x86-64*.
(Mixed x86_64 and i386 input test 2): Likewise.
* ld-x86-64/ilp32-2.d: Likewise.
* ld-x86-64/ilp32-3.d: Likewise.
* ld-x86-64/lp64-2.d: Likewise.
* ld-x86-64/lp64-3.d: Likewise.
* ld-x86-64/ia32-2.d: Likewise, and i386.* too.
* ld-x86-64/ia32-3.d: Likewise.
* elfxx-mips.h (_bfd_mips_elf_get_synthetic_symtab): New
prototype.
* elf32-mips.c (elf_backend_plt_sym_val): Remove macro.
(bfd_elf32_get_synthetic_symtab): New macro.
* elfxx-mips.c (plt_entry): New structure.
(mips_elf_link_hash_entry): Add use_plt_entry member.
(mips_elf_link_hash_table): Rename plt_entry_size member to
plt_mips_entry_size. Add plt_comp_entry_size, plt_mips_offset,
plt_comp_offset, plt_got_index entries and plt_header_is_comp
members.
(STUB_LW_MICROMIPS, STUB_MOVE_MICROMIPS): New macros.
(STUB_LUI_MICROMIPS, STUB_JALR_MICROMIPS): Likewise.
(STUB_ORI_MICROMIPS, STUB_LI16U_MICROMIPS): Likewise.
(STUB_LI16S_MICROMIPS): Likewise.
(MICROMIPS_FUNCTION_STUB_NORMAL_SIZE): Likewise.
(MICROMIPS_FUNCTION_STUB_BIG_SIZE): Likewise.
(micromips_o32_exec_plt0_entry): New variable.
(mips16_o32_exec_plt_entry): Likewise.
(micromips_o32_exec_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize use_plt_entry.
(mips_elf_output_extsym): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_gotplt_index): Likewise. Remove the VxWorks
restriction. Use MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_elf_count_got_symbols): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_calculate_relocation): Handle MIPS16/microMIPS PLT
entries.
(_bfd_mips_elf_create_dynamic_sections): Don't set PLT sizes
here.
(mips_elf_make_plt_record): New function.
(_bfd_mips_elf_check_relocs): Update comment. Record occurences
of JAL relocations that might need a PLT entry.
(_bfd_mips_elf_adjust_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Set individual
PLT entry sizes here. Handle MIPS16/microMIPS PLT entries.
Don't set the symbol's value in the symbol table for PLT
references here. Don't set the PLT or PLT GOT section sizes
here.
(mips_elf_estimate_stub_size): Handle microMIPS stubs.
(mips_elf_allocate_lazy_stub): Likewise.
(mips_elf_lay_out_lazy_stubs): Likewise. Define a _MIPS_STUBS_
magic symbol.
(mips_elf_set_plt_sym_value): New function.
(_bfd_mips_elf_size_dynamic_sections): Set PLT header size and
PLT and PLT GOT section sizes here. Set the symbol values in
the symbol table for PLT references here. Handle microMIPS
annotation of the _PROCEDURE_LINKAGE_TABLE_ magic symbol.
(_bfd_mips_elf_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Handle
MIPS16/microMIPS PLT entries. Handle microMIPS stubs.
(_bfd_mips_vxworks_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Use
MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_finish_exec_plt): Handle microMIPS PLT. Return status.
(_bfd_mips_elf_finish_dynamic_sections): Handle result from
mips_finish_exec_plt.
(_bfd_mips_elf_link_hash_table_create): Update to use
gotplt_union's plist member rather than offset.
(_bfd_mips_elf_get_synthetic_symtab): New function.
include/elf/
* mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting.
(ELF_ST_SET_MIPS_PLT): Likewise.
gdb/
* mips-tdep.c (mips_elf_make_msymbol_special): Handle MIPS16 and
microMIPS synthetic symbols.
ld/
* emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed
as close to .plt as possible.
* scripttempl/elf.sc: Handle $INITIAL_READWRITE_SECTIONS and
$PLT_NEXT_DATA variables.
ld/testsuite/
* ld-mips-elf/jalx-2.dd: Update for microMIPS PLT support.
* ld-mips-elf/pic-and-nonpic-3a.dd: Update for the _MIPS_STUBS_
magic symbol.
* ld-mips-elf/pic-and-nonpic-3b.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
* ld-mips-elf/stub-dynsym-1-10000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-2fe80.d: Likewise.
* ld-mips-elf/stub-dynsym-1-7fff.d: Likewise.
* ld-mips-elf/stub-dynsym-1-8000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-fff0.d: Likewise.
* ld-mips-elf/tlslib-o32.d: Likewise.
opcodes/
* mips-dis.c (is_mips16_plt_tail): New function.
(print_insn_mips16): Handle MIPS16 PLT entry's GOT slot address
word.
(is_compressed_mode_p): Handle MIPS16/microMIPS PLT entries.
H.J. Lu
Alan Modra
Alexey Neyman
Palmer Dabbelt
Hans-Peter Nilsson
Graham Markall
Dimitar Dimitrov
Josh Conner
Andrew Burgess
Nick Clifton
Andreas Krebbel
Ludovic Court?s
Roland McGrath
Roland McGrath
Claudiu Zissulescu
Kuba Sejdak
Oleg Endo
Ed Schouten
Rainer Orth
DJ Delorie
Andrew Turner
Chen Gang
Yoshinori Sato
Eric Botcazou
Igor Zamyatin
Andreas Tobler
Matthew Fortune
Anthony Green
Stefan Kristiansson
Will Newton
Barney Stratford
Chung-Lin Tang
Christian Svensson
Andrew Pinski
Sandra Loosemore
Marcus Shawcroft
Kuan-Lin Chen
Mike Frysinger
Chung-Lin Tang
Will Newton
Roland McGrath
Yufeng Zhang
Maciej W. Rozycki