Make use of the default gdbarch methods for gdbarch_dummy_id,
gdbarch_unwind_pc, and gdbarch_unwind_sp where possible.
I have not tested this change but, by inspecting the code, I believe
the default methods are equivalent to the code being deleted.
gdb/ChangeLog:
* gdb/arm-tdep.c (arm_dummy_id): Delete.
(arm_unwind_pc): Delete.
(arm_unwind_sp): Delete.
(arm_gdbarch_init): Don't register deleted functions with gdbarch.
This commit applies all changes made after running the gdb/copyright.py
script.
Note that one file was flagged by the script, due to an invalid
copyright header
(gdb/unittests/basic_string_view/element_access/char/empty.cc).
As the file was copied from GCC's libstdc++-v3 testsuite, this commit
leaves this file untouched for the time being; a patch to fix the header
was sent to gcc-patches first.
gdb/ChangeLog:
Update copyright year range in all GDB files.
GDB tries to dereference the frame pointer in arm_scan_prologue as a
last resort to create frame information.
However, the more recent AAPCS ABI does not make use of a frame pointer.
This patch checks whether the specified arm_abi is AAPCS before
dereferencing the "frame pointer". If so, just return as efforts to use
it for restoring frame information won't work.
gdb/ChangeLog
2018-11-06 Marius Muench <marius.muench@eurecom.fr>
* arm-tdep.c (arm_scan_prologue): Don't dereference FP reg
when on AAPCS.
This fixes all the straightforward -Wshadow=local warnings in gdb. A
few standard approaches are used here:
* Renaming an inner (or outer, but more commonly inner) variable;
* Lowering a declaration to avoid a clash;
* Moving a declaration into a more inner scope to avoid a clash,
including the special case of moving a declaration into a loop header.
I did not consider any of the changes in this patch to be particularly
noteworthy, though of course they should all still be examined.
gdb/ChangeLog
2018-10-04 Tom Tromey <tom@tromey.com>
* ctf.c (SET_ARRAY_FIELD): Rename "u32".
* p-valprint.c (pascal_val_print): Split inner "i" variable.
* xtensa-tdep.c (xtensa_push_dummy_call): Declare "i" in loop
header.
* xstormy16-tdep.c (xstormy16_push_dummy_call): Declare "val" in
more inner scope.
* xcoffread.c (read_xcoff_symtab): Rename inner "symbol".
* varobj.c (varobj_update): Rename inner "newobj",
"type_changed".
* valprint.c (generic_emit_char): Rename inner "buf".
* valops.c (find_overload_match): Rename inner "temp".
(value_struct_elt_for_reference): Declare "v" in more inner
scope.
* v850-tdep.c (v850_push_dummy_call): Rename "len".
* unittests/array-view-selftests.c (run_tests): Rename inner
"vec".
* tui/tui-stack.c (tui_show_frame_info): Declare "i" in loop
header.
* tracepoint.c (merge_uploaded_trace_state_variables): Declare
"tsv" in more inner scope.
(print_one_static_tracepoint_marker): Rename inner
"tuple_emitter".
* tic6x-tdep.c (tic6x_analyze_prologue): Declare "inst" lower.
(tic6x_push_dummy_call): Don't redeclare "addr".
* target-float.c: Declare "dto" lower.
* symtab.c (lookup_local_symbol): Rename inner "sym".
(find_pc_sect_line): Rename inner "pc".
* stack.c (print_frame): Don't redeclare "gdbarch".
(return_command): Rename inner "gdbarch".
* s390-tdep.c (s390_prologue_frame_unwind_cache): Renam inner
"sp".
* rust-lang.c (rust_internal_print_type): Declare "i" in loop
header.
* rs6000-tdep.c (ppc_process_record): Rename inner "addr".
* riscv-tdep.c (riscv_push_dummy_call): Declare "info" in inner
scope.
* remote.c (remote_target::update_thread_list): Don't redeclare
"tp".
(remote_target::process_initial_stop_replies): Rename inner
"thread".
(remote_target::remote_parse_stop_reply): Don't redeclare "p".
(remote_target::wait_as): Don't redeclare "stop_reply".
(remote_target::get_thread_local_address): Rename inner
"result".
(remote_target::get_tib_address): Likewise.
Some variables are not used when !HAVE_ELF, so avoid declaring them in
that case.
gdb/ChangeLog:
* arm-tdep.c (arm_gdbarch_init): Declare attr_arch and
attr_profile in HAVE_ELF.
* rs6000-tdep.c (bfd_uses_spe_extensions): Declare vector_abi in
HAVE_ELF.
Implement MIPS target support for passing options to the disassembler,
complementing commit 65b48a8140 ("GDB: Add support for the new
set/show disassembler-options commands.").
This includes options that expect an argument, so adjust the generic
code and data structures used so as to handle such options. So as to
give backends syntax flexibility no specific delimiter has been defined
to separate options from their respective arguments, so it has to be
included as the last character of the option name. Completion code
however has not been adjusted and consequently option arguments cannot
be completed at this time.
Also the MIPS target has non-empty defaults for the options, so that ABI
names for the general-purpose registers respect our `set mips abi ...'
setting rather than always being determined from the ELF headers of the
binary file selected. Handle these defaults as implicit options, never
shown to the user and always prepended to the user-specified options, so
that the latters can override the defaults.
The resulting output for the MIPS target is as follows:
(gdb) show disassembler-options
The current disassembler options are ''
The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
no-aliases Use canonical instruction forms.
msa Recognize MSA instructions.
virt Recognize the virtualization ASE instructions.
xpa Recognize the eXtended Physical Address (XPA) ASE
instructions.
ginv Recognize the Global INValidate (GINV) ASE instructions.
gpr-names=ABI Print GPR names according to specified ABI.
Default: based on binary being disassembled.
fpr-names=ABI Print FPR names according to specified ABI.
Default: numeric.
cp0-names=ARCH Print CP0 register names according to specified architecture.
Default: based on binary being disassembled.
hwr-names=ARCH Print HWR names according to specified architecture.
Default: based on binary being disassembled.
reg-names=ABI Print GPR and FPR names according to specified ABI.
reg-names=ARCH Print CP0 register and HWR names according to specified
architecture.
For the options above, the following values are supported for "ABI":
numeric 32 n32 64
For the options above, the following values are supported for "ARCH":
numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600
r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000
r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64
mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e
loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp
(gdb)
which corresponds to what `objdump --help' used to print for the MIPS
target, with minor formatting changes, most notably option argument
lists being wrapped, but also the amount of white space separating
options from the respective descriptions. The relevant part the new
code is now also used by `objdump --help', which means these formatting
changes apply to both outputs, except for argument list wrapping, which
is GDB-specific.
This also adds a separating new line between the heading and option
lists where descriptions are provided, hence:
(gdb) set architecture s390:31-bit
(gdb) show disassembler-options
The current disassembler options are ''
The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
esa Disassemble in ESA architecture mode
zarch Disassemble in z/Architecture mode
insnlength Print unknown instructions according to length from first two bits
(gdb)
but:
(gdb) set architecture powerpc:common
(gdb) show disassembler-options
The current disassembler options are ''
The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl,
821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300,
e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5,
power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge,
ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe,
spe2, titan, vle, vsx
(gdb)
Existing affected target backends have been adjusted accordingly.
This has been verified manually with:
(gdb) set architecture arm
(gdb) set architecture powerpc:common
(gdb) set architecture s390:31-bit
to cause no issues with the `show disassembler-options' and `set
disassembler-options' commands. A test case for the MIPS target has
also been provided, covering the default settings with ABI overrides as
well as disassembler option overrides.
2018-07-02 Maciej W. Rozycki <macro@mips.com>
Simon Marchi <simon.marchi@polymtl.ca>
include/
PR tdep/8282
* dis-asm.h (disasm_option_arg_t): New typedef.
(disasm_options_and_args_t): Likewise.
(disasm_options_t): Add `arg' member, document members.
(disassembler_options_mips): New prototype.
(disassembler_options_arm, disassembler_options_powerpc)
(disassembler_options_s390): Update prototypes.
opcodes/
PR tdep/8282
* mips-dis.c (mips_option_arg_t): New enumeration.
(mips_options): New variable.
(disassembler_options_mips): New function.
(print_mips_disassembler_options): Reimplement in terms of
`disassembler_options_mips'.
* arm-dis.c (disassembler_options_arm): Adapt to using the
`disasm_options_and_args_t' structure.
* ppc-dis.c (disassembler_options_powerpc): Likewise.
* s390-dis.c (disassembler_options_s390): Likewise.
gdb/
PR tdep/8282
* disasm.h (gdb_disassembler): Add
`m_disassembler_options_holder'. member
* disasm.c (get_all_disassembler_options): New function.
(gdb_disassembler::gdb_disassembler): Use it.
(gdb_buffered_insn_length_init_dis): Likewise.
(gdb_buffered_insn_length): Adjust accordingly.
(set_disassembler_options): Handle options with arguments.
(show_disassembler_options_sfunc): Likewise. Add a leading new
line if showing options with descriptions.
(disassembler_options_completer): Adapt to using the
`disasm_options_and_args_t' structure.
* mips-tdep.c (mips_disassembler_options): New variable.
(mips_disassembler_options_o32): Likewise.
(mips_disassembler_options_n32): Likewise.
(mips_disassembler_options_n64): Likewise.
(gdb_print_insn_mips): Don't set `disassembler_options'.
(gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove
functions.
(mips_gdbarch_init): Always set `gdbarch_print_insn' to
`gdb_print_insn_mips'. Set `gdbarch_disassembler_options',
`gdbarch_disassembler_options_implicit' and
`gdbarch_valid_disassembler_options'.
* arm-tdep.c (_initialize_arm_tdep): Adapt to using the
`disasm_options_and_args_t' structure.
* gdbarch.sh (disassembler_options_implicit): New `gdbarch'
method.
(valid_disassembler_options): Switch from `disasm_options_t' to
the `disasm_options_and_args_t' structure.
* NEWS: Document `set disassembler-options' support for the MIPS
target.
* gdbarch.h: Regenerate.
* gdbarch.c: Regenerate.
gdb/doc/
PR tdep/8282
* gdb.texinfo (Source and Machine Code): Document `set
disassembler-options' support for the MIPS target.
gdb/testsuite/
PR tdep/8282
* gdb.arch/mips-disassembler-options.exp: New test.
* gdb.arch/mips-disassembler-options.s: New test source.
Remove regcache_raw_write, update all callers to use regcache::raw_write
instead.
gdb/ChangeLog:
* regcache.h (regcache_raw_write): Remove, update callers to use
regcache::raw_write instead.
* regcache.c (regcache_raw_write): Remove.
Remove regcache_raw_read, update all callers to use
readable_regcache::raw_read instead.
gdb/ChangeLog:
* regcache.h (regcache_raw_read): Remove, update callers to use
readable_regcache::raw_read instead.
* regcache.c (regcache_raw_read): Remove.
-Wduplicated-cond pointed out that arm_record_vfp_data_proc_insn
checks "opc1 == 0x0b" twice. I filed this a while ago as
PR tdep/20362.
Based on the ARM instruction manual at
https://www.scss.tcd.ie/~waldroj/3d1/arm_arm.pdf, I think the
instruction decoding in this function has two bugs.
First, opc1 is computed as:
opc1 = bits (arm_insn_r->arm_insn, 20, 23);
[...]
opc1 = opc1 & 0x04;
This means that tests like:
else if (opc1 == 0x01)
can never be true.
In the ARM manual, "opc1" corresponds to these bits:
name bit
r 20
q 21
D 22
p 23
... where the D bit is not used for VFP instruction decoding.
So, I believe this code should use ~0x04 instead.
Second, VDIV is recognized by the bits "pqrs" being equal to "1000".
This tranlates to opc1 == 0x08 -- not 0x0b. Note that pqrs==1001 is
an undefined encoding, which is probably why opc2 is not checked here;
this code doesn't seem to really deal with undefined encodings in
general, so I've left that as is.
I don't have an ARM machine or any reasonable way to test this.
ChangeLog
2018-05-07 Tom Tromey <tom@tromey.com>
PR tdep/20362:
* arm-tdep.c (arm_record_vfp_data_proc_insn): Properly mask off D
bit. Use correct value for VDIV.
I noticed the existence of -Wsuggest-override and so this patch
enables it for gdb. It found a few spots that could use "override".
Also I went ahead and removed all uses of the "OVERRIDE" macro.
Using override is beneficial because it makes it harder to change a
base class and then forget to change a derived class.
Tested by the buildbot.
ChangeLog
2018-04-27 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
* warning.m4 (AM_GDB_WARNINGS): Add -Wsuggest-override.
* dwarf2loc.c (class dwarf_evaluate_loc_desc): Use "override", not
"OVERRIDE".
(class symbol_needs_eval_context): Likewise.
* dwarf2read.c (mock_mapped_index::symbol_name_count)
(mock_mapped_index::symbol_name_at): Use "override". Remove
"virtual".
* dwarf2-frame.c (dwarf_expr_executor::get_addr_index): Use
"override".
(class dwarf_expr_executor): Use "override", not "OVERRIDE".
* aarch64-tdep.c (instruction_reader::read): Use "override".
(instruction_reader_test::read): Likewise.
* arm-tdep.c (instruction_reader::read): Use "override".
(instruction_reader_thumb::read): Likewise.
gdbserver/ChangeLog
2018-04-27 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
This converts observers from using a special source-generating script
to be plain C++. This version of the patch takes advantage of C++11
by using std::function and variadic templates; incorporates Pedro's
patches; and renames the header file to "observable.h" (this change
eliminates the need for a clean rebuild).
Note that Pedro's patches used a template lambda in tui-hooks.c, but
this failed to compile on some buildbot instances (presumably due to
differing C++ versions); I replaced this with an ordinary template
function.
Regression tested on the buildbot.
gdb/ChangeLog
2018-03-19 Pedro Alves <palves@redhat.com>
Tom Tromey <tom@tromey.com>
* unittests/observable-selftests.c: New file.
* common/observable.h: New file.
* observable.h: New file.
* ada-lang.c, ada-tasks.c, agent.c, aix-thread.c, annotate.c,
arm-tdep.c, auto-load.c, auxv.c, break-catch-syscall.c,
breakpoint.c, bsd-uthread.c, cli/cli-interp.c, cli/cli-setshow.c,
corefile.c, dummy-frame.c, event-loop.c, event-top.c, exec.c,
extension.c, frame.c, gdbarch.c, guile/scm-breakpoint.c,
infcall.c, infcmd.c, inferior.c, inflow.c, infrun.c, jit.c,
linux-tdep.c, linux-thread-db.c, m68klinux-tdep.c,
mi/mi-cmd-break.c, mi/mi-interp.c, mi/mi-main.c, objfiles.c,
ppc-linux-nat.c, ppc-linux-tdep.c, printcmd.c, procfs.c,
python/py-breakpoint.c, python/py-finishbreakpoint.c,
python/py-inferior.c, python/py-unwind.c, ravenscar-thread.c,
record-btrace.c, record-full.c, record.c, regcache.c, remote.c,
riscv-tdep.c, sol-thread.c, solib-aix.c, solib-spu.c, solib.c,
spu-multiarch.c, spu-tdep.c, stack.c, symfile-mem.c, symfile.c,
symtab.c, thread.c, top.c, tracepoint.c, tui/tui-hooks.c,
tui/tui-interp.c, valops.c: Update all users.
* tui/tui-hooks.c (tui_bp_created_observer)
(tui_bp_deleted_observer, tui_bp_modified_observer)
(tui_inferior_exit_observer, tui_before_prompt_observer)
(tui_normal_stop_observer, tui_register_changed_observer):
Remove.
(tui_observers_token): New global.
(attach_or_detach, tui_attach_detach_observers): New functions.
(tui_install_hooks, tui_remove_hooks): Use
tui_attach_detach_observers.
* record-btrace.c (record_btrace_thread_observer): Remove.
(record_btrace_thread_observer_token): New global.
* observer.sh: Remove.
* observer.c: Rename to observable.c.
* observable.c (namespace gdb_observers): Define new objects.
(observer_debug): Move into gdb_observers namespace.
(struct observer, struct observer_list, xalloc_observer_list_node)
(xfree_observer_list_node, generic_observer_attach)
(generic_observer_detach, generic_observer_notify): Remove.
(_initialize_observer): Update.
Don't include observer.inc.
* Makefile.in (generated_files): Remove observer.h, observer.inc.
(clean mostlyclean): Likewise.
(observer.h, observer.inc): Remove targets.
(SUBDIR_UNITTESTS_SRCS): Add observable-selftests.c.
(COMMON_SFILES): Use observable.c, not observer.c.
* .gitignore: Remove observer.h.
gdb/doc/ChangeLog
2018-03-19 Tom Tromey <tom@tromey.com>
* observer.texi: Remove.
gdb/testsuite/ChangeLog
2018-03-19 Tom Tromey <tom@tromey.com>
* gdb.gdb/observer.exp: Remove.
This changes a couple of spots that read section data to use
gdb::byte_vector rather than a cleanup.
Regression tested by the buildbot. I am not certain that the buildbot
actually tests the code in question, so I recommend careful review.
gdb/ChangeLog
2018-03-12 Tom Tromey <tom@tromey.com>
* rs6000-aix-tdep.c (rs6000_aix_core_xfer_shared_libraries_aix):
Use gdb::byte_vector.
* arm-tdep.c (arm_exidx_new_objfile): Use gdb::byte_vector.
pseudo registers are either from raw registers or memory, so
gdbarch methods pseudo_register_read and pseudo_register_read_value
should have regcache object which only have read methods. In other
words, we should disallow writing to regcache in these two gdbarch
methods. In order to apply this restriction, this patch adds a new
class readable_regcache, derived from reg_buffer, and it only has
raw_read and cooked_read methods. regcache is derived from
readable_regcache. This patch also passes readable_regcache instead of
regcache to gdbarch methods pseudo_register_read and
pseudo_register_read_value.
This patch moves raw_read* and cooked_read* methods to readable_regcache,
which is straightforward. One thing not straightforward is that I split
regcache::xfer_part to readable_regcache::read_part and regcache::write_part,
because readable_regcache can only have methods to read.
readable_regcache is an abstract base class, and it has a pure virtual
function raw_update, because I don't want readable_regcache know where
these raw registers are from. They can be from either the target
(readwrite regcache) or the regcache itself (readonly regcache).
gdb:
2018-02-21 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_pseudo_register_read_value): Change
parameter type to 'readable_regcache *'.
* amd64-tdep.c (amd64_pseudo_register_read_value): Likewise.
* arm-tdep.c (arm_neon_quad_read): Likewise.
(arm_pseudo_read): Likewise.
* avr-tdep.c (avr_pseudo_register_read): Likewise.
* bfin-tdep.c (bfin_pseudo_register_read): Likewise.
* frv-tdep.c (frv_pseudo_register_read): Likewise.
* gdbarch.c: Re-generated.
* gdbarch.h: Re-generated.
* gdbarch.sh (pseudo_register_read): Change parameter type to
'readable_regcache *'.
(pseudo_register_read_value): Likewise.
* h8300-tdep.c (pseudo_from_raw_register): Likewise.
(h8300_pseudo_register_read): Likewise.
* hppa-tdep.c (hppa_pseudo_register_read): Likewise.
* i386-tdep.c (i386_mmx_regnum_to_fp_regnum): Likewise.
(i386_pseudo_register_read_into_value): Likewise.
(i386_pseudo_register_read_value): Likewise.
* i386-tdep.h (i386_pseudo_register_read_into_value): Update
declaration.
* ia64-tdep.c (ia64_pseudo_register_read): Likewise.
* m32c-tdep.c (m32c_raw_read): Likewise.
(m32c_read_flg): Likewise.
(m32c_banked_register): Likewise.
(m32c_banked_read): Likewise.
(m32c_sb_read): Likewise.
(m32c_part_read): Likewise.
(m32c_cat_read): Likewise.
(m32c_r3r2r1r0_read): Likewise.
(m32c_pseudo_register_read): Likewise.
* m68hc11-tdep.c (m68hc11_pseudo_register_read): Likewise.
* mep-tdep.c (mep_pseudo_cr32_read): Likewise.
(mep_pseudo_cr64_read): Likewise.
(mep_pseudo_register_read): Likewise.
* mips-tdep.c (mips_pseudo_register_read): Likewise.
* msp430-tdep.c (msp430_pseudo_register_read): Likewise.
* nds32-tdep.c (nds32_pseudo_register_read): Likewise.
* regcache.c (regcache::raw_read): Move it to readable_regcache.
(regcache::cooked_read): Likewise.
(regcache::cooked_read_value): Likewise.
(regcache_cooked_read_signed):
(regcache::cooked_read): Likewise.
* regcache.h (readable_regcache): New class.
(regcache): Inherit readable_regcache. Move some methods to
readable_regcache.
* rl78-tdep.c (rl78_pseudo_register_read): Change
parameter type to 'readable_regcache *'.
* rs6000-tdep.c (do_regcache_raw_read): Remove.
(e500_pseudo_register_read): Change parameter type to
'readable_regcache *'.
(dfp_pseudo_register_read): Likewise.
(vsx_pseudo_register_read): Likewise.
(efpr_pseudo_register_read): Likewise.
* s390-tdep.c (s390_pseudo_register_read): Likewise.
* sh-tdep.c (sh_pseudo_register_read): Likewise.
* sh64-tdep.c (pseudo_register_read_portions): Likewise.
(sh64_pseudo_register_read): Likewise.
* sparc-tdep.c (sparc32_pseudo_register_read): Likewise.
* sparc64-tdep.c (sparc64_pseudo_register_read): Likewise.
* spu-tdep.c (spu_pseudo_register_read_spu): Likewise.
(spu_pseudo_register_read): Likewise.
* xtensa-tdep.c (xtensa_register_read_masked): Likewise.
(xtensa_pseudo_register_read): Likewise.
When I triage some reverse debugging test fails on arm-linux, I find
arm_record_coproc_data_proc and arm_record_data_proc_misc_ld_str is not
friendly to instruction encoding on ARM ARM. This patch rewrites them, in
a way match more closely to the manual.
gdb:
2018-02-01 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_record_data_proc_misc_ld_str): Rewrite it.
(arm_record_coproc_data_proc): Likewise.
Variable 'ret' should be int rather than unsigned, as it can be -1.
gdb:
2018-02-01 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_record_extension_space): Change ret to signed.
The patch later in this series will move regcache's raw_read and
cooked_read methods to a new class regcache_read, and regcache is
dervied from it. Also pass regcache_read instead of regcache to gdbarch
methods pseudo_register_read and pseudo_register_read_value. In order
to prepare for this change, this patch changes regcache_raw_read to
regcache->raw_read. On the other hand, since we are in C++, I prefer
using class method (regcache->raw_read).
gdb:
2018-01-22 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_pseudo_read_value): Call regcache
method raw_read instead of regcache_raw_read.
* amd64-tdep.c (amd64_pseudo_register_read_value): Likewise.
* arm-tdep.c (arm_neon_quad_read): Likewise.
* avr-tdep.c (avr_pseudo_register_read): Likewise.
* bfin-tdep.c (bfin_pseudo_register_read): Likewise.
* frv-tdep.c (frv_pseudo_register_read): Likewise.
* h8300-tdep.c (h8300_pseudo_register_read): Likewise.
* i386-tdep.c (i386_mmx_regnum_to_fp_regnum): Likewise.
(i386_pseudo_register_read_into_value): Likewise.
* mep-tdep.c (mep_pseudo_cr32_read): Likewise.
* msp430-tdep.c (msp430_pseudo_register_read): Likewise.
* nds32-tdep.c (nds32_pseudo_register_read): Likewise.
* rl78-tdep.c (rl78_pseudo_register_read): Likewise.
* s390-linux-tdep.c (s390_pseudo_register_read): Likewise.
* sparc-tdep.c (sparc32_pseudo_register_read): Likewise.
* sparc64-tdep.c (sparc64_pseudo_register_read): Likewise.
* spu-tdep.c (spu_pseudo_register_read_spu): Likewise.
* xtensa-tdep.c (xtensa_pseudo_register_read): Likewise.
This patch mechanically replaces convert_typed_floating with the
equivalent target_float_convert throughout tdep files, to prepare
for the removal of doublest.{c,h}.
No functional change intended.
gdb/ChangeLog:
2017-11-06 Ulrich Weigand <uweigand@de.ibm.com>
* i386-tdep.c: Include "target-float.h". Do not include "doublest.h".
(i386_extract_return_value): Use target_float_convert.
(i386_store_return_value): Likewise.
* i387-tdep.c (i387_register_to_value): Use target_float_convert.
(i387_value_to_register): Likewise.
* ia64-tdep.c: Include "target-float.h". Do not include "doublest.h".
(ia64_register_to_value): Use target_float_convert.
(ia64_value_to_register): Likewise.
(ia64_extract_return_value): Likewise.
(ia64_store_return_value): Likewise.
(ia64_push_dummy_call): Likewise.
* m68k-tdep.c: Include "target-float.h".
(m68k_register_to_value): Use target_float_convert.
(m68k_value_to_register): Likewise.
(m68k_svr4_extract_return_value): Likewise.
(m68k_svr4_store_return_value): Likewise.
* ppc-sysv-tdep.c: Include "target-float.h".
(ppc_sysv_abi_push_dummy_call): Use target_float_convert.
(do_ppc_sysv_return_value): Likewise.
(ppc64_sysv_abi_push_freg): Likewise.
(ppc64_sysv_abi_return_value_base): Likewise.
* rs6000-aix-tdep.c: Include "target-float.h".
(rs6000_push_dummy_call): Use target_float_convert.
(rs6000_return_value): Likewise.
* rs6000-lynx178-tdep.c: Include "target-float.h".
(rs6000_lynx178_push_dummy_call): Use target_float_convert.
(rs6000_lynx178_return_value): Likewise.
* rs6000-tdep.c: Include "target-float.h". Do not include "doublest.h".
(rs6000_register_to_value): Use target_float_convert.
(rs6000_value_to_register): Likewise.
* arm-tdep.c: Include "target-float.h". Do not include "doublest.h".
(arm_extract_return_value): Use target_float_convert.
(arm_store_return_value): Likewise.
* sh-tdep.c: Include "target-float.h". Do not include "doublest.h".
(sh_register_convert_to_virtual): Use target_float_convert.
(sh_register_convert_to_raw): Likewise.
* sh64-tdep.c: Include "target-float.h".
(sh64_extract_return_value): Use target_float_convert.
(sh64_register_convert_to_virtual): Likewise.
(sh64_register_convert_to_raw): Likewise. Fix argument types.
When compiling with clang or gcc 8, we see warnings like this:
/home/emaisin/src/binutils-gdb/gdb/arm-tdep.c:10013:13: error: comparison of 0 <= unsigned expression is always true [-Werror,-Wtautological-compare]
if (0 <= insn_op1 && 3 >= insn_op1)
~ ^ ~~~~~~~~
/home/emaisin/src/binutils-gdb/gdb/arm-tdep.c:11722:20: error: comparison of unsigned expression >= 0 is always true [-Werror,-Wtautological-compare]
else if (opB >= 0 && opB <= 2)
~~~ ^ ~
This is because an unsigned integer (opB in this case) will always be >=
0. It is still useful to keep both bounds of the range in the
expression, even if one is at the edge of the data type range. This
patch introduces a utility function in_inclusive_range that gets rid of
the warning while conveying that we are checking for a range.
Tested by rebuilding.
gdb/ChangeLog:
* common/common-utils.h (in_inclusive_range): New function.
* arm-tdep.c (arm_record_extension_space): Use
in_inclusive_range.
(thumb_record_ld_st_reg_offset): Use in_inclusive_range.
* cris-tdep.c (cris_spec_reg_applicable): Use
in_inclusive_range.
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
This patch is an initial C++-ification of pv_area, from
prologue-value. It turns pv_area into a class with a constructor and
destructor; renames the data members; and changes various functions to
be member functions. This allows the removal of
make_cleanup_free_pv_area.
gdb/ChangeLog
2017-10-12 Tom Tromey <tom@tromey.com>
* s390-linux-tdep.c (s390_store, s390_load)
(s390_check_for_saved, s390_analyze_prologue): Update.
* rx-tdep.c (check_for_saved, rx_analyze_prologue): Update.
* rl78-tdep.c (rl78_analyze_prologue, check_for_saved): Update.
* prologue-value.h (class pv_area): Move from prologue-value.c.
Change names of members. Add constructor, destructor, member
functions.
(make_pv_area, free_pv_area, make_cleanup_free_pv_area)
(pv_area_store, pv_area_fetch, pv_area_store_would_trash)
(pv_area_fetch, pv_area_scan): Don't declare.
* prologue-value.c (struct pv_area::area_entry): Now member of
pv_area.
(struct pv_area): Move to prologue-value.h.
(pv_area::pv_area): Rename from make_pv_area.
(pv_area::~pv_area): Rename from free_pv_area.
(do_free_pv_area_cleanup, make_cleanup_free_pv_area): Remove.
(clear_entries, find_entry, overlaps, store_would_trash, store)
(fetch, find_reg, scan): Now member of pv_area.
Remove "area" argument. Update.
* msp430-tdep.c (check_for_saved, msp430_analyze_prologue):
Update.
* mn10300-tdep.c (push_reg, check_for_saved)
(mn10300_analyze_prologue): Update.
* mep-tdep.c (is_arg_spill, check_for_saved)
(mep_analyze_prologue): Update.
* m32c-tdep.c (m32c_pv_push, m32c_srcdest_fetch)
(m32c_srcdest_store, m32c_pv_enter, m32c_is_arg_spill)
(m32c_is_struct_return, m32c_analyze_prologue): Update.
* arm-tdep.c (thumb_analyze_prologue, arm_analyze_prologue):
Update.
* arc-tdep.c (arc_is_in_prologue, arc_analyze_prologue): Update.
* aarch64-tdep.c (aarch64_analyze_prologue): Update.
gdb/ChangeLog:
2017-10-05 Jose E. Marchesi <jose.marchesi@oracle.com>
PR build/22188
* arm-tdep.c (arm_decode_misc_memhint_neon): Fix decoding of CPS
and SETEND.
Many tdep files need to perform conversions between two floating-point
types, usually when accessing FP registers. Most targets now use the
convert_typed_floating helper routine to do so. However, a small number
still use the old method of converting via a DOUBLEST. Since we want
to get rid of DOUBLEST, these targets need to be moved to the new
method as well.
The main obstacle is that for convert_typed_floating we need an actual
*type*, not just a floatformat.
In arm-tdep.c, this is very straightforward, since there is already a
type using the ARM extended floatformat.
For sh-tdep.c and sh64-tdep.c, no such type already exists, so I've
added one to the gdbarch_tdep struct as done on other targets.
gdb/ChangeLog
2017-09-27 Ulrich Weigand <uweigand@de.ibm.com>
* arm-tdep.c: (convert_from_extended): Remove.
(convert_to_extended): Likewise.
(arm_extract_return_value): Use convert_typed_floating.
(arm_store_return_value): Likewise.
* sh-tdep.h (struct gdbarch_tdep): Add sh_littlebyte_bigword_type.
* sh-tdep.c: Do not include "floatformat.h".
(sh_littlebyte_bigword_type): New function.
(sh_register_convert_to_virtual): Use convert_typed_floating.
(sh_register_convert_to_raw): Likewise.
* sh64-tdep.c: (struct gdbarch_tdep): Add sh_littlebyte_bigword_type.
(sh64_littlebyte_bigword_type): New function.
(sh64_extract_return_value): Use convert_typed_floating.
(sh64_register_convert_to_virtual): Likewise.
(sh64_register_convert_to_raw): Likewise.
With the growing number of selftests, I think it would be useful to be
able to run only a subset of the tests. This patch associates a name to
each registered selftest. It then allows doing something like:
(gdb) maintenance selftest aarch64
Running self-tests.
Running selftest aarch64-analyze-prologue.
Running selftest aarch64-process-record.
Ran 2 unit tests, 0 failed
or with gdbserver:
./gdbserver --selftest=aarch64
In both cases, only the tests that contain "aarch64" in their name are
ran. To help validate that the tests you want to run were actually ran,
it also prints a message with the test name before running each test.
Right now, all the arch-dependent tests are registered as a single test
of the selftests. To be able to filter those too, I made them
"first-class citizen" selftests. The selftest type is an interface,
with different implementations for "simple selftests" and "arch
selftests". The run_tests function simply iterates on that an invokes
operator() on each test.
I changed the tests data structure from a vector to a map, because
- it allows iterating in a stable (alphabetical) order
- it allows to easily verify if a test with a given name has been
registered, to avoid duplicates
There's also a new command "maintenance info selftests" that lists the
registered selftests.
gdb/ChangeLog:
* common/selftest.h (selftest): New struct/interface.
(register_test): Add name parameter, add new overload.
(run_tests): Add filter parameter.
(for_each_selftest_ftype): New typedef.
(for_each_selftest): New declaration.
* common/selftest.c (tests): Change type to
map<string, unique_ptr<selftest>>.
(simple_selftest): New struct.
(register_test): New function.
(register_test): Add name parameter and use it.
(run_tests): Add filter parameter and use it. Add prints.
Adjust to vector -> map change.
* aarch64-tdep.c (_initialize_aarch64_tdep): Add names when
registering selftests.
* arm-tdep.c (_initialize_arm_tdep): Likewise.
* disasm-selftests.c (_initialize_disasm_selftests): Likewise.
* dwarf2-frame.c (_initialize_dwarf2_frame): Likewise.
* dwarf2loc.c (_initialize_dwarf2loc): Likewise.
* findvar.c (_initialize_findvar): Likewise.
* gdbarch-selftests.c (_initialize_gdbarch_selftests): Likewise.
* maint.c (maintenance_selftest): Update call to run_tests.
(maintenance_info_selftests): New function.
(_initialize_maint_cmds): Register "maintenance info selftests"
command. Update "maintenance selftest" doc.
* regcache.c (_initialize_regcache): Add names when registering
selftests.
* rust-exp.y (_initialize_rust_exp): Likewise.
* selftest-arch.c (gdbarch_selftest): New struct.
(gdbarch_tests): Remove.
(register_test_foreach_arch): Add name parameter. Call
register_test.
(tests_with_arch): Remove, move most content to
gdbarch_selftest::operator().
(_initialize_selftests_foreach_arch): Remove.
* selftest-arch.h (register_test_foreach_arch): Add name
parameter.
(run_tests_with_arch): New declaration.
* utils-selftests.c (_initialize_utils_selftests): Add names
when registering selftests.
* utils.c (_initialize_utils): Likewise.
* unittests/array-view-selftests.c
(_initialize_array_view_selftests): Likewise.
* unittests/environ-selftests.c (_initialize_environ_selftests):
Likewise.
* unittests/function-view-selftests.c
(_initialize_function_view_selftests): Likewise.
* unittests/offset-type-selftests.c
(_initialize_offset_type_selftests): Likewise.
* unittests/optional-selftests.c
(_initialize_optional_selftests): Likewise.
* unittests/scoped_restore-selftests.c
(_initialize_scoped_restore_selftests): Likewise.
* NEWS: Document "maintenance selftest" and "maint info
selftests".
gdb/gdbserver/ChangeLog:
* server.c (captured_main): Accept argument for --selftest.
Update run_tests call.
* linux-x86-tdesc-selftest.c (initialize_low_tdesc): Add names
when registering selftests.
gdb/doc/ChangeLog:
* gdb.texinfo (Maintenance Commands): Document filter parameter
of "maint selftest". Document "maint info selftests" command.
opcodes/arm-dis.c:print_insn may update disassemble_info.mach to
bfd_mach_arm_unknown unless USER_SPECIFIED_MACHINE_TYPE is marked.
When default_print_insn is called for the first time,
disassemble_info.mach is correctly set in GDB, but arm-dis.c:print_insn
sets it to bfd_mach_arm_unknown. Then, when default_print_insn is
called again (in a loop), it triggers the assert.
The patch fixes the assert by marking USER_SPECIFIED_MACHINE_TYPE so that
opcodes won't reset disassemble_info.mach.
gdb:
2017-08-18 Yao Qi <yao.qi@linaro.org>
PR tdep/21818
* arm-tdep.c (gdb_print_insn_arm): Mark
USER_SPECIFIED_MACHINE_TYPE if exec_bfd isn't NULL.
This is a follow-up to
[PATCH 0/6] Unify the disassembler selection in gdb and objdump
https://sourceware.org/ml/binutils/2017-05/msg00192.html
that is, opcodes is able to select the right disassembler, so gdb
doesn't have to select them. Instead, gdb can just use
default_print_insn. As a result, these print_insn_XXX are not used
out of opcodes, so this patch also moves their declarations from
include/dis-asm.h to opcodes/disassemble.h. With this change,
GDB doesn't use any print_insn_XXX directly any more.
gdb:
2017-06-14 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_gdb_print_insn): Call
default_print_insn instead of print_insn_aarch64.
* arm-tdep.c (gdb_print_insn_arm): Call
default_print_insn instead of print_insn_big_arm
and print_insn_little_arm.
* i386-tdep.c (i386_print_insn): Call default_print_insn
instead of print_insn_i386.
* ia64-tdep.c (ia64_print_insn): Call
default_print_insn instead of print_insn_ia64.
* mips-tdep.c (gdb_print_insn_mips): Call
default_print_insn instead of print_insn_big_mips
and print_insn_little_mips.
* spu-tdep.c (gdb_print_insn_spu): Call default_print_insn
instead of print_insn_spu.
include:
2017-06-14 Yao Qi <yao.qi@linaro.org>
* dis-asm.h (print_insn_aarch64): Move it to opcodes/disassemble.h.
(print_insn_big_arm, print_insn_big_mips): Likewise.
(print_insn_i386, print_insn_ia64): Likewise.
(print_insn_little_arm, print_insn_little_mips): Likewise.
(print_insn_spu): Likewise.
opcodes:
2017-06-14 Yao Qi <yao.qi@linaro.org>
* aarch64-dis.c: Include disassemble.h instead of dis-asm.h.
* arm-dis.c: Likewise.
* ia64-dis.c: Likewise.
* mips-dis.c: Likewise.
* spu-dis.c: Likewise.
* disassemble.h (print_insn_aarch64): New declaration, moved from
include/dis-asm.h.
(print_insn_big_arm, print_insn_big_mips): Likewise.
(print_insn_i386, print_insn_ia64): Likewise.
(print_insn_little_arm, print_insn_little_mips): Likewise.
The size of wchar_t on AArch64 and ARM is 4-byte, so we can use the
default value (4*TARGET_CHAR_BIT).
This patch fixes some fails in gdb.cp/wide_char_types.exp on
aarch64-linux.
gdb:
2017-04-25 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_gdbarch_init): Don't call
set_gdbarch_wchar_bit.
* arm-tdep.c (arm_gdbarch_init): Likewise.
gdb-8.0-branch
./configure --enable-werror --enable-targets=all
aarch64-tdep.c:3045:13: error: ‘void selftests::aarch64_process_record_test()’ declared ‘static’ but never defined [-Werror=unused-function]
arm-tdep.c:9601:13: error: ‘void selftests::arm_record_test()’ declared ‘static’ but never defined [-Werror=unused-function]
gdb/ChangeLog
2017-04-21 Jan Kratochvil <jan.kratochvil@redhat.com>
* aarch64-tdep.c (selftests::aarch64_process_record_test): Make it #if
GDB_SELF_TEST.
* arm-tdep.c (selftests::arm_record_test): Likewise.
GDB is currently not aware that wchar_t is a built-in type in C++
mode. This is usually not a problem because the debug info describes
the type, so when you have a program loaded, you don't notice this.
However, if you try expressions involving wchar_t before a program is
loaded, gdb errors out:
(gdb) p (wchar_t)-1
No symbol table is loaded. Use the "file" command.
(gdb) p L"hello"
No type named wchar_t.
(gdb) ptype L"hello"
No type named wchar_t.
This commit teaches gdb about the type. After:
(gdb) p (wchar_t)-1
$1 = -1 L'\xffffffff'
(gdb) p L"hello"
$2 = L"hello"
(gdb) ptype L"hello"
type = wchar_t [6]
Unlike char16_t/char32_t, unfortunately, the underlying type of
wchar_t is implementation dependent, both size and signness. So this
requires adding a couple new gdbarch hooks.
I grepped the GCC code base for WCHAR_TYPE and WCHAR_TYPE_SIZE, and it
seems to me that the majority of the ABIs have a 4-byte signed
wchar_t, so that's what I made the default for GDB too. And then I
looked for which ports have a 16-bit and/or unsigned wchar_t, and made
GDB follow suit.
gdb/ChangeLog:
2017-04-12 Pedro Alves <palves@redhat.com>
PR gdb/21323
* c-lang.c (cplus_primitive_types) <cplus_primitive_type_wchar_t>:
New enum value.
(cplus_language_arch_info): Register cplus_primitive_type_wchar_t.
* gdbtypes.h (struct builtin_type) <builtin_wchar>: New field.
* gdbtypes.c (gdbtypes_post_init): Create the "wchar_t" type.
* gdbarch.sh (wchar_bit, wchar_signed): New per-arch values.
* gdbarch.h, gdbarch.c: Regenerate.
* aarch64-tdep.c (aarch64_gdbarch_init): Override
gdbarch_wchar_bit and gdbarch_wchar_signed.
* alpha-tdep.c (alpha_gdbarch_init): Likewise.
* arm-tdep.c (arm_gdbarch_init): Likewise.
* avr-tdep.c (avr_gdbarch_init): Likewise.
* h8300-tdep.c (h8300_gdbarch_init): Likewise.
* i386-nto-tdep.c (i386nto_init_abi): Likewise.
* i386-tdep.c (i386_go32_init_abi): Likewise.
* m32r-tdep.c (m32r_gdbarch_init): Likewise.
* moxie-tdep.c (moxie_gdbarch_init): Likewise.
* nds32-tdep.c (nds32_gdbarch_init): Likewise.
* rs6000-aix-tdep.c (rs6000_aix_init_osabi): Likewise.
* sh-tdep.c (sh_gdbarch_init): Likewise.
* sparc-tdep.c (sparc32_gdbarch_init): Likewise.
* sparc64-tdep.c (sparc64_init_abi): Likewise.
* windows-tdep.c (windows_init_abi): Likewise.
* xstormy16-tdep.c (xstormy16_gdbarch_init): Likewise.
gdb/testsuite/ChangeLog:
2017-04-12 Pedro Alves <palves@redhat.com>
PR gdb/21323
* gdb.cp/wide_char_types.c: Include <wchar.h>.
(wchar): New global.
* gdb.cp/wide_char_types.exp (wide_char_types_program)
(do_test_wide_char, wide_char_types_no_program, top level): Add
wchar_t testing.
The memory disassemble_info::disassembler_options points to is always
owned by the client. I.e., that field is an non-owning, observing
pointer. Thus const makes sense.
Are the include/ and opcodes/ bits OK?
Tested on x86_64 Fedora 23, built with --enable-targets=all.
include/ChangeLog:
2017-04-05 Pedro Alves <palves@redhat.com>
* dis-asm.h (disassemble_info) <disassembler_options>: Now a
"const char *".
(next_disassembler_option): Constify.
opcodes/ChangeLog:
2017-04-05 Pedro Alves <palves@redhat.com>
* arc-dis.c (parse_option, parse_disassembler_options): Constify.
* arm-dis.c (parse_arm_disassembler_options): Constify.
* ppc-dis.c (powerpc_init_dialect): Constify local.
* vax-dis.c (parse_disassembler_options): Constify.
gdb/ChangeLog:
2017-04-05 Pedro Alves <palves@redhat.com>
* arm-tdep.c (show_disassembly_style_sfunc): Constify local.
* disasm.c (set_disassembler_options): Constify local.
* i386-tdep.c (i386_print_insn): Remove cast and FIXME comment.
Both aarch64-tdep.c and arm-tdep.c defines a class instruction_reader, which
violates ODR, but linker doesn't an emit error. I fix this issue by wrapping
them by anonymous namespace, but I think it is better to apply this for all
locally used classes.
If it is a good idea to put locally used class into anonymous namespace, we
should document this rule into GDB coding convention, or even GCC coding
convention. Note that anonymous namespace has been used in GCC but GCC
coding convention doesn't mention the it.
gdb:
2017-03-22 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c: Wrap locally used classes in anonymous
namespace.
* arm-tdep.c: Likewise.
* linespec.c: Likewise.
* ui-out.c: Likewise.
This patch adds the support for these instructions in arm process
record.
gdb:
2017-03-16 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (thumb_record_misc): Decode CBNZ, CBZ, REV16,
and REVSH instructions.
I look at some fails in gdb.reverse/solib-precsave.exp in -mthumb,
they are caused by some bugs on decoding these three instructions,
uxtb, ldr and mrc. This patch adds unit tests against these three
instructions, and fix these bugs by re-organizing the code to match
the table in ARM ARM.
gdb:
2017-03-16 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c [GDB_SELF_TEST]: include "selftests.h".
(arm_record_test): Declare.
(_initialize_arm_tdep) [GDB_SELF_TEST]: call register_self_test.
(thumb_record_ld_st_reg_offset): Rewrite the opcode matching to
align with the manual.
(thumb_record_misc): Adjust the code order to align with the
manual.
(thumb2_record_decode_insn_handler): Fix instruction matching.
(instruction_reader_thumb): New class.
(arm_record_test): New function.
This patch adds an abstract class abstract_memory_reader a
and pass it to the code reading instructions in arm process record,
rather than using target_read_memory to read from real target. This
paves the way for adding more unit tests to arm process record.
gdb:
2017-03-16 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (abstract_memory_reader): New class.
(instruction_reader): New class.
(extract_arm_insn): Add argument 'reader'. Callers updated.
(decode_insn): Likewise.
Andrew Burgess
Tom Tromey
Joel Brobecker
Alan Hayward
Marius Muench
Simon Marchi
Maciej W. Rozycki
Simon Marchi
Yao Qi
Ulrich Weigand
Jose E. Marchesi
John Baldwin
Jan Kratochvil
Pedro Alves
Artemiy Volkov