Collects information during the prologue scan and uses this to unwind
registers when no DWARF information is available.
This patch has been tested by disabling the DWARF stack unwinders, and
running the complete GDB testsuite against a range of RISC-V targets.
The results are comparable to running with the DWARF unwinders in
place.
gdb/ChangeLog:
* riscv-tdep.c: Add 'prologue-value.h' include.
(struct riscv_unwind_cache): New struct.
(riscv_debug_unwinder): New global.
(riscv_scan_prologue): Update arguments, capture register details
from prologue scan.
(riscv_skip_prologue): Reformat arguments line, move end of
prologue calculation into riscv_scan_prologue.
(riscv_frame_cache): Update return type, create
riscv_unwind_cache, scan the prologue, and fill in remaining cache
details.
(riscv_frame_this_id): Use frame id computed in riscv_frame_cache.
(riscv_frame_prev_register): Use the trad_frame within the
riscv_unwind_cache.
(_initialize_riscv_tdep): Add 'set/show debug riscv unwinder'
flag.
This fixes some minor formatting issues in riscv-tdep.h, including one
pointed out by ARI.
ChangeLog
2018-08-09 Tom Tromey <tom@tromey.com>
* riscv-tdep.h: Minor formatting fixes.
This adds software single step support that is needed by the linux native port.
This is modeled after equivalent code in the MIPS port.
This also fixes a few bugs in the compressed instruction decode support. Some
instructions are RV32/RV64 specific, and this wasn't being checked. Also, a
few instructions were accidentally using the non-compressed is_* function.
This has been tested on a HiFive Unleashed running Fedora, by putting a
breakpoint on start, typing stepi, and then holding down the return key until
it finishes, and observing that I see everything I expect to see along the way.
There is a problem in _dl_addr where I get into an infinite loop, but it seems
to be some synchronization code that doesn't agree with single step, so I have
to find the end of the loop, put a breakpoint there, continue, and then single
step again until the end.
gdb/
* riscv-tdep.c (enum opcode): Add jump, branch, lr, and sc opcodes.
(decode_register_index_short): New.
(decode_j_type_insn, decode_cj_type_insn): New.
(decode_b_type_insn, decode_cb_type_insn): New.
(riscv_insn::decode): Add support for jumps, branches, lr, and sc. New
local xlen. Check xlen when decoding ambiguous compressed insns. In
compressed decode, use is_c_lui_insn instead of is_lui_insn, and
is_c_sw_insn instead of is_sw_insn.
(riscv_next_pc, riscv_next_pc_atomic_sequence): New.
(riscv_software_single_step): New.
* riscv-tdep.h (riscv_software_single_step): Declare.
This allows the function to be used from riscv OS files, which also need to
depend on XLEN size.
gdb/
* riscv-tdep.c (riscv_isa_xlen): Drop static.
* riscv-tdep.h (riscv_isa_xlen): Add extern declaration.
The GDB coding standard states these lines should never have been
added.
gdb/ChangeLog:
* riscv-tdep.c: Remove 'Contributed by ...' lines from header
comment.
* riscv-tdep.h: Likewise.
This commit introduces basic support for baremetal RiscV as a GDB
target. This target is currently only tested against the RiscV software
simulator, which is not included as part of this commit. The target has
been tested against the following RiscV variants: rv32im, rv32imc,
rv32imf, rv32imfc, rv64im, rv64imc, rv64imfd, rv64imfdc.
Across these variants we pass on average 34858 tests, and fail 272
tests, which is ~0.8%.
The RiscV has a feature of its ABI where structures with a single
floating point field, a single complex float field, or one float and
one integer field are treated differently for argument passing. The
new test gdb.base/infcall-nested-structs.exp is added to cover this
feature. As passing these structures should work on all targets then
I've made the test as a generic one, even though, for most targets,
there's probably nothing special about any of these cases.
gdb/ChangeLog:
* Makefile.in (ALL_TARGET_OBS): Add riscv-tdep.o
(HFILES_NO_SRCDIR): Add riscv-tdep.h.
(ALLDEPFILES): Add riscv-tdep.c
* configure.tgt: Add riscv support.
* riscv-tdep.c: New file.
* riscv-tdep.h: New file.
* NEWS: Mention new target.
* MAINTAINERS: Add entry for riscv.
gdb/testsuite/ChangeLog:
* gdb.base/infcall-nested-structs.exp: New file.
* gdb.base/infcall-nested-structs.c: New file.
* gdb.base/float.exp: Add riscv support.