Commit Graph

14938 Commits

Author SHA1 Message Date
GDB Administrator b90514cfb5 Automatic date update in version.in 2018-12-04 00:00:27 +00:00
Jim Wilson 1080bf78c0 RISC-V: Accept version, supervisor ext and more than one NSE for -march.
This patch moves all -march parsing logic into bfd, because we will use this
code in ELF attributes.

	bfd/
	* elfxx-riscv.h (RISCV_DONT_CARE_VERSION): New macro.
	(struct riscv_subset_t): New structure.
	(riscv_subset_t): New typedef.
	(riscv_subset_list_t): New structure.
	(riscv_release_subset_list): New prototype.
	(riscv_add_subset): Likewise.
	(riscv_lookup_subset): Likewise.
	(riscv_lookup_subset_version): Likewise.
	(riscv_release_subset_list): Likewise.
	* elfxx-riscv.c: Include safe-ctype.h.
	(riscv_parsing_subset_version): New function.
	(riscv_supported_std_ext): Likewise.
	(riscv_parse_std_ext): Likewise.
	(riscv_parse_sv_or_non_std_ext): Likewise.
	(riscv_parse_subset): Likewise.
	(riscv_add_subset): Likewise.
	(riscv_lookup_subset): Likewise.
	(riscv_lookup_subset_version): Likewise.
	(riscv_release_subset_list): Likewise.
	gas/
	* config/tc-riscv.c: Include elfxx-riscv.h.
	(struct riscv_subset): Removed.
	(riscv_subsets): Change type to riscv_subset_list_t.
	(riscv_subset_supports): Removed argument: xlen_required and move
	logic into libbfd.
	(riscv_multi_subset_supports): Removed argument: xlen_required.
	(riscv_clear_subsets): Removed.
	(riscv_add_subset): Ditto.
	(riscv_set_arch): Extract parsing logic into libbfd.
	(riscv_ip): Update argument for riscv_multi_subset_supports and
	riscv_subset_supports. Update riscv_subsets due to struct definition
	changed.
	(riscv_after_parse_args): Update riscv_subsets due to struct
	definition changed, update and argument for riscv_subset_supports.
	* testsuite/gas/riscv/empty.s: New.
	* testsuite/gas/riscv/march-fail-rv32ef.d: Likewise.
	* testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
	* testsuite/gas/riscv/march-fail-rv32i.d: Likewise.
	* testsuite/gas/riscv/march-fail-rv32i.l: Likewise.
	* testsuite/gas/riscv/march-fail-rv32iam.d: Likewise.
	* testsuite/gas/riscv/march-fail-rv32iam.l: Likewise.
	* testsuite/gas/riscv/march-fail-rv32ic.d: Likewise.
	* testsuite/gas/riscv/march-fail-rv32ic.l: Likewise.
	* testsuite/gas/riscv/march-fail-rv32icx2p.d: Likewise.
	* testsuite/gas/riscv/march-fail-rv32icx2p.l: Likewise.
	* testsuite/gas/riscv/march-fail-rv32imc.d: Likewise.
	* testsuite/gas/riscv/march-fail-rv32imc.l: Likewise.
	* testsuite/gas/riscv/march-fail-rv64I.d: Likewise.
	* testsuite/gas/riscv/march-fail-rv64I.l: Likewise.
	* testsuite/gas/riscv/march-fail-rv64e.d: Likewise.
	* testsuite/gas/riscv/march-fail-rv64e.l: Likewise.
	* testsuite/gas/riscv/march-ok-g2.d: Likewise.
	* testsuite/gas/riscv/march-ok-g2p0.d: Likewise.
	* testsuite/gas/riscv/march-ok-i2p0.d: Likewise.
	* testsuite/gas/riscv/march-ok-nse-with-version.: Likewise.d
	* testsuite/gas/riscv/march-ok-s-with-version.d: Likewise.
	* testsuite/gas/riscv/march-ok-s.d: Likewise.
	* testsuite/gas/riscv/march-ok-sx.d: Likewise.
	* testsuite/gas/riscv/march-ok-two-nse.d: Likewise.
	* testsuite/gas/riscv/march-ok-g2_p1.d: Likewise.
	* testsuite/gas/riscv/march-ok-i2p0m2_a2f2.d: Likewise.
	include/
	* opcode/riscv.h (riscv_opcode): Change type of xlen_requirement to
	unsigned.
	opcodes/
	* riscv-opc.c: Change the type of xlen, because type of
	xlen_requirement changed.
2018-12-03 14:05:17 -08:00
GDB Administrator b570a287cf Automatic date update in version.in 2018-12-03 00:00:31 +00:00
GDB Administrator 3134061ce6 Automatic date update in version.in 2018-12-02 00:01:21 +00:00
H.J. Lu b44ee3a8cf x86: Delay setting the iplt section alignment
Delay setting its alignment until we know it is non-empty.  Otherwise an
empty iplt section may change vma and lma of the following sections, which
triggers moving dot of the following section backwards, resulting in a
warning and section lma not being set properly.  It later leads to a
"File truncated" error.

bfd/

	PR ld/23930
	* elfxx-x86.c (_bfd_x86_elf_size_dynamic_sections): Update
	the iplt section alignment if it is non-empty.
	(_bfd_x86_elf_link_setup_gnu_properties): Set plt.iplt_alignment
	and delay setting the iplt section alignment.
	* elfxx-x86.h (elf_x86_plt_layout): Add iplt_alignment.

ld/

	PR ld/23930
	* testsuite/ld-i386/i386.exp: Run pr23930.
	* testsuite/ld-i386/pr23930.d: New file.
	* testsuite/ld-x86-64/pr23930-32.t: Likewise.
	* testsuite/ld-x86-64/pr23930-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23930.d: Likewise.
	* testsuite/ld-x86-64/pr23930.t: Likewise.
	* testsuite/ld-x86-64/pr23930a.s: Likewise.
	* testsuite/ld-x86-64/pr23930b.s: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run pr23930 and pr23930-x32.
2018-12-01 06:35:03 -08:00
GDB Administrator 35d1b0784a Automatic date update in version.in 2018-12-01 00:00:23 +00:00
Nick Clifton 20a7119479 Add PR number to previous delta to the bfd/ directory. 2018-11-30 17:45:07 +00:00
Nick Clifton 5f60af5d24 Fix a memory exhaustion bug when attempting to allocate room for an impossible number of program headers.
* elfcode.h (elf_object_p): Check for corrupt input files with
	more program headers than can actually fit in the file.
2018-11-30 11:45:33 +00:00
Nick Clifton beab453223 Remove an abort in the bfd library and add a check for an integer overflow when mapping sections to segments.
PR 23932
	* elf.c (IS_CONTAINED_BY_LMA): Add a check for a negative section
	size.
	(rewrite_elf_program_header): If no sections are mapped into a
	segment return an error.
2018-11-30 11:43:12 +00:00
Alan Modra ba85c15dab PR23937, powerpc64le local ifunc IRELATIVE relocs are wrong
IFUNC resolvers must always be called via their global entry point.
They will be called from ld.so rather than from the local executable.

	PR 23937
bfd/
	* elf64-ppc.c (write_plt_relocs_for_local_syms): Don't add local
	entry offset for ifuncs.
ld/
	* testsuite/ld-powerpc/pr23937.d,
	* testsuite/ld-powerpc/pr23937.s: New test.
	* testsuite/ld-powerpc/powerpc.exp: Run it.
2018-11-30 16:18:58 +10:30
GDB Administrator f746c08f26 Automatic date update in version.in 2018-11-30 00:00:41 +00:00
H.J. Lu ffd9e4d022 elf: Don't merge .note.gnu.property section in IR
.note.gnu.property section in IR inputs should be ignored.  Don't
merge them.

	PR ld/23929
	* elf-properties.c (_bfd_elf_link_setup_gnu_properties): Don't
	merge .note.gnu.property section in IR inputs.
2018-11-29 04:45:16 -08:00
GDB Administrator 27e8f8efca Automatic date update in version.in 2018-11-29 00:00:26 +00:00
GDB Administrator f68d3e0053 Automatic date update in version.in 2018-11-28 00:00:18 +00:00
Thomas Preud'homme b5ab31636d [ARM] Update knowledge of bfd architectures
Commit c0c468d562 updated bfd's knowledge
of Arm architectures to Armv5TEJ and later but missed the list of CPUs
recognized by objdump -d -m<cpu>.

.note.gnu.arm.ident related code is intentionally not updated as build
attributes are a better mechanism to express the ISA in a file. However
this patch adds tests for the existing code since no existing testcase
cover those codepaths. Since I've only ever managed for
bfd_arm_get_mach_from_notes () to have an effect by using objcopy on
a file with a note but no Arm build attribute, the tests make use of
both objcopy actions supported by run_dump_test which requires to have a
ld line as well.

Note that the CPU list in bfd/cpu-arm.c was simply copied over from
GAS' CPU list but sorted alphabetically as already done for existing
entries.

2018-11-27  Thomas Preud'homme  <thomas.preudhomme@linaro.org>

bfd/
	* cpu-arm.c (processors): Add processors known to GAS but missing here
	and reindent.
	(bfd_arm_update_notes): Add comment explaining why the list of
	architectures in the switch should not be updated.
	(architectures): Likewise.

gas/
	* testsuite/gas/arm/cpu-arm1020.d: New testcase.
	* testsuite/gas/arm/cpu-arm1020e.d: Likewise.
	* testsuite/gas/arm/cpu-arm1020t.d: Likewise.
	* testsuite/gas/arm/cpu-arm1022e.d: Likewise.
	* testsuite/gas/arm/cpu-arm1026ej-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm1026ejs.d: Likewise.
	* testsuite/gas/arm/cpu-arm10e.d: Likewise.
	* testsuite/gas/arm/cpu-arm10t.d: Likewise.
	* testsuite/gas/arm/cpu-arm10tdmi.d: Likewise.
	* testsuite/gas/arm/cpu-arm1136j-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm1136jf-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm1136jfs.d: Likewise.
	* testsuite/gas/arm/cpu-arm1136js.d: Likewise.
	* testsuite/gas/arm/cpu-arm1156t2-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm1156t2f-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm1176jz-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm1176jzf-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm2.d: Likewise.
	* testsuite/gas/arm/cpu-arm250.d: Likewise.
	* testsuite/gas/arm/cpu-arm3.d: Likewise.
	* testsuite/gas/arm/cpu-arm6.d: Likewise.
	* testsuite/gas/arm/cpu-arm60.d: Likewise.
	* testsuite/gas/arm/cpu-arm600.d: Likewise.
	* testsuite/gas/arm/cpu-arm610.d: Likewise.
	* testsuite/gas/arm/cpu-arm620.d: Likewise.
	* testsuite/gas/arm/cpu-arm7.d: Likewise.
	* testsuite/gas/arm/cpu-arm70.d: Likewise.
	* testsuite/gas/arm/cpu-arm700.d: Likewise.
	* testsuite/gas/arm/cpu-arm700i.d: Likewise.
	* testsuite/gas/arm/cpu-arm710.d: Likewise.
	* testsuite/gas/arm/cpu-arm7100.d: Likewise.
	* testsuite/gas/arm/cpu-arm710c.d: Likewise.
	* testsuite/gas/arm/cpu-arm710t.d: Likewise.
	* testsuite/gas/arm/cpu-arm720.d: Likewise.
	* testsuite/gas/arm/cpu-arm720t.d: Likewise.
	* testsuite/gas/arm/cpu-arm740t.d: Likewise.
	* testsuite/gas/arm/cpu-arm7500.d: Likewise.
	* testsuite/gas/arm/cpu-arm7500fe.d: Likewise.
	* testsuite/gas/arm/cpu-arm7d.d: Likewise.
	* testsuite/gas/arm/cpu-arm7di.d: Likewise.
	* testsuite/gas/arm/cpu-arm7dm.d: Likewise.
	* testsuite/gas/arm/cpu-arm7dmi.d: Likewise.
	* testsuite/gas/arm/cpu-arm7m.d: Likewise.
	* testsuite/gas/arm/cpu-arm7t.d: Likewise.
	* testsuite/gas/arm/cpu-arm7tdmi-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm7tdmi.d: Likewise.
	* testsuite/gas/arm/cpu-arm8.d: Likewise.
	* testsuite/gas/arm/cpu-arm810.d: Likewise.
	* testsuite/gas/arm/cpu-arm9.d: Likewise.
	* testsuite/gas/arm/cpu-arm920.d: Likewise.
	* testsuite/gas/arm/cpu-arm920t.d: Likewise.
	* testsuite/gas/arm/cpu-arm922t.d: Likewise.
	* testsuite/gas/arm/cpu-arm926ej-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm926ej.d: Likewise.
	* testsuite/gas/arm/cpu-arm926ejs.d: Likewise.
	* testsuite/gas/arm/cpu-arm940t.d: Likewise.
	* testsuite/gas/arm/cpu-arm946e-r0.d: Likewise.
	* testsuite/gas/arm/cpu-arm946e-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm946e.d: Likewise.
	* testsuite/gas/arm/cpu-arm966e-r0.d: Likewise.
	* testsuite/gas/arm/cpu-arm966e-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm966e.d: Likewise.
	* testsuite/gas/arm/cpu-arm968e-s.d: Likewise.
	* testsuite/gas/arm/cpu-arm9e-r0.d: Likewise.
	* testsuite/gas/arm/cpu-arm9e.d: Likewise.
	* testsuite/gas/arm/cpu-arm9tdmi.d: Likewise.
	* testsuite/gas/arm/cpu-arm_any.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a12.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a15.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a17.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a32.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a35.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a5.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a53.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a55.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a57.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a7.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a72.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a73.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a75.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a76.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a8.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-a9.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-m0.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-m0plus.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-m1.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-m23.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-m3.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-m33.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-m4.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-m7.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-r4.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-r4f.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-r5.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-r52.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-r7.d: Likewise.
	* testsuite/gas/arm/cpu-cortex-r8.d: Likewise.
	* testsuite/gas/arm/cpu-ep9312.d: Likewise.
	* testsuite/gas/arm/cpu-exynos-m1.d: Likewise.
	* testsuite/gas/arm/cpu-fa526.d: Likewise.
	* testsuite/gas/arm/cpu-fa606te.d: Likewise.
	* testsuite/gas/arm/cpu-fa616te.d: Likewise.
	* testsuite/gas/arm/cpu-fa626.d: Likewise.
	* testsuite/gas/arm/cpu-fa626te.d: Likewise.
	* testsuite/gas/arm/cpu-fa726te.d: Likewise.
	* testsuite/gas/arm/cpu-fmp626.d: Likewise.
	* testsuite/gas/arm/cpu-i80200.d: Likewise.
	* testsuite/gas/arm/cpu-iwmmxt.d: Likewise.
	* testsuite/gas/arm/cpu-iwmmxt2.d: Likewise.
	* testsuite/gas/arm/cpu-marvell-pj4.d: Likewise.
	* testsuite/gas/arm/cpu-marvell-whitney.d: Likewise.
	* testsuite/gas/arm/cpu-mpcore.d: Likewise.
	* testsuite/gas/arm/cpu-mpcorenovfp.d: Likewise.
	* testsuite/gas/arm/cpu-sa1.d: Likewise.
	* testsuite/gas/arm/cpu-strongarm.d: Likewise.
	* testsuite/gas/arm/cpu-strongarm1.d: Likewise.
	* testsuite/gas/arm/cpu-strongarm110.d: Likewise.
	* testsuite/gas/arm/cpu-strongarm1100.d: Likewise.
	* testsuite/gas/arm/cpu-strongarm1110.d: Likewise.
	* testsuite/gas/arm/cpu-xgene1.d: Likewise.
	* testsuite/gas/arm/cpu-xgene2.d: Likewise.
	* testsuite/gas/arm/cpu-xscale.d: Likewise.
	* testsuite/gas/arm/nop-asm.s: Likewise.
	* testsuite/gas/arm/note-march-armv2.d: Likewise.
	* testsuite/gas/arm/note-march-armv2.s: Likewise.
	* testsuite/gas/arm/note-march-armv2a.d: Likewise.
	* testsuite/gas/arm/note-march-armv2a.s: Likewise.
	* testsuite/gas/arm/note-march-armv3.d: Likewise.
	* testsuite/gas/arm/note-march-armv3.s: Likewise.
	* testsuite/gas/arm/note-march-armv3m.d: Likewise.
	* testsuite/gas/arm/note-march-armv3m.s: Likewise.
	* testsuite/gas/arm/note-march-armv4.d: Likewise.
	* testsuite/gas/arm/note-march-armv4.s: Likewise.
	* testsuite/gas/arm/note-march-armv4t.d: Likewise.
	* testsuite/gas/arm/note-march-armv4t.s: Likewise.
	* testsuite/gas/arm/note-march-armv5.d: Likewise.
	* testsuite/gas/arm/note-march-armv5.s: Likewise.
	* testsuite/gas/arm/note-march-armv5t.d: Likewise.
	* testsuite/gas/arm/note-march-armv5t.s: Likewise.
	* testsuite/gas/arm/note-march-armv5te.d: Likewise.
	* testsuite/gas/arm/note-march-armv5te.d: Likewise.
	* testsuite/gas/arm/note-march-ep9312.d: Likewise.
	* testsuite/gas/arm/note-march-ep9312.s: Likewise.
	* testsuite/gas/arm/note-march-iwmmxt.d: Likewise.
	* testsuite/gas/arm/note-march-iwmmxt.s: Likewise.
	* testsuite/gas/arm/note-march-iwmmxt2.d: Likewise.
	* testsuite/gas/arm/note-march-iwmmxt2.s: Likewise.
	* testsuite/gas/arm/note-march-xscale.d: Likewise.
	* testsuite/gas/arm/note-march-xscale.s: Likewise.
2018-11-27 18:28:35 +00:00
Maciej W. Rozycki 3c7687b9cd MIPS/LD: Accept high-part relocations in PIC code with absolute symbols
Accept R_MIPS_HI16, R_MIPS_HIGHER and R_MIPS_HIGHEST relocations and
their compressed counterparts in PIC code where the symbol referred is
absolute.  Such an operation is meaningful, because an absolute symbol
effectively is a constant the calculation of the value of which has been
deferred to the static link time, and which is not going to change any
further at the dynamic load time.  Therefore there is no need ever to
refuse the use of these relocations with such symbols, as the resulting
run-time value observed by the program will be correct even in PIC code.

This is not the case with R_MIPS_26 and its compressed counterparts,
because the run-time value calculated by the instructions these
relocations are used with depends on the address of the instruction
itself, and that can change according to the base address used by the
dynamic loader.  Therefore these relocations have to continue being
rejected in PIC code even with absolute symbols.

This allows successful linking of code that relies on previous linker
behavior up to commit 861fb55ab5 ("Defer allocation of R_MIPS_REL32
GOT slots"), <https://sourceware.org/ml/binutils/2008-08/msg00096.html>,
which introduced the problematic check missing this special exception
for absolute symbols.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_check_relocs) <R_MIPS16_HI16>
	<R_MIPS_HI16, R_MIPS_HIGHER, R_MIPS_HIGHEST, R_MICROMIPS_HI16>
	<R_MICROMIPS_HIGHER, R_MICROMIPS_HIGHEST>: Also accept an
	absolute symbol in PIC code.

	ld/
	* testsuite/ld-mips-elf/pic-reloc-0.d: New test.
	* testsuite/ld-mips-elf/pic-reloc-1.d: New test.
	* testsuite/ld-mips-elf/pic-reloc-2.d: New test.
	* testsuite/ld-mips-elf/pic-reloc-3.d: New test.
	* testsuite/ld-mips-elf/pic-reloc-4.d: New test.
	* testsuite/ld-mips-elf/pic-reloc-absolute-hi.ld: New test
	linker script.
	* testsuite/ld-mips-elf/pic-reloc-absolute-lo.ld: New test
	linker script.
	* testsuite/ld-mips-elf/pic-reloc-ordinary.ld: New test linker
	script.
	* testsuite/ld-mips-elf/pic-reloc-j.s: New test source.
	* testsuite/ld-mips-elf/pic-reloc-lui.s: New test source.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2018-11-27 16:34:03 +00:00
Maciej W. Rozycki aff68bd041 MIPS/LD: Continue processing with refused relocations in PIC code
Switch from `_bfd_error_handler' to `info->callbacks->einfo' with error
reporting concerning the use of position-dependent relocations such as
R_MIPS_HI16 or R_MIPS_26 in PIC code and continue processing so that any
subsequent link errors are also shown rather than the linker terminating
right away.  This can reduce user frustration where correcting one error
only reveals another one; instead all are shown together making them all
possible to investigate at once.  The use of the `%X' specifier causes
the linker to terminate unsuccessfully at the end of processing.

Also fix the message to say `cannot' rather than `can not'.

	bfd/
	* elfxx-mips.c (_bfd_mips_elf_check_relocs) <R_MIPS16_26>
	<R_MIPS_26, R_MICROMIPS_26_S1>: Use `info->callbacks->einfo'
	rather than `_bfd_error_handler' to report refused relocations
	in PIC code and continue processing.  Fix error message: `can
	not' -> `cannot'.
2018-11-27 16:34:03 +00:00
H.J. Lu 131a5a648d Initialize *uncompressed_align_pow_p to 0
Initialize *uncompressed_align_pow_p to 0 since *uncompressed_align_pow_p
is passed to bfd_is_section_compressed_with_header as uninitialized,

	PR binutils/23919
	* compress.c (bfd_is_section_compressed_with_header): Initialize
	*uncompressed_align_pow_p to 0.
2018-11-27 06:02:36 -08:00
Tamar Christina 9fca35fc34 AArch64: Fix regression in Cortex A53 erratum when PIE. (PR ld/23904)
The fix for PR ld/22263 causes TLS relocations using ADRP to be relaxed
into MOVZ, however this causes issues for the erratum code.

The erratum code scans the input sections looking for ADRP instructions
and notes their location in the stream.

It then later tries to find them again in order to generate the linker
stubs.  Due to the relaxation it instead finds a MOVZ and hard aborts.

Since this relaxation is a valid one, and in which case the erratum no
longer applies, it shouldn't abort but instead just continue.

This changes the TLS relaxation code such that when it finds an ADRP and
it relaxes it, it removes the erratum entry from the work list by changing
the stub type into none so the stub is ignored.

The entry is not actually removed as removal is a more expensive operation
and we have already allocated the memory anyway.

The clearing is done for IE->LE and GD->LE relaxations, and a testcase is
added for the IE case. The GD case I believe to be impossible to get together
with the erratum sequence due to the required BL which would break the sequence.
However to cover all basis I have added the guard there as well.

build on native hardware and regtested on
  aarch64-none-elf, aarch64-none-elf (32 bit host),
  aarch64-none-linux-gnu, aarch64-none-linux-gnu (32 bit host)

Cross-compiled and regtested on
  aarch64-none-linux-gnu, aarch64_be-none-linux-gnu

Testcase in PR23940 tested and works as expected now and benchmarks ran on A53
showing no regressions and no issues.

bfd/ChangeLog:

	PR ld/23904
	* elfnn-aarch64.c (_bfd_aarch64_adrp_p): Use existing constants.
	(_bfd_aarch64_erratum_843419_branch_to_stub): Use _bfd_aarch64_adrp_p.
	(struct erratum_835769_branch_to_stub_clear_data): New.
	(_bfd_aarch64_erratum_843419_clear_stub): New.
	(clear_erratum_843419_entry): New.
	(elfNN_aarch64_tls_relax): Use it.
	(elfNN_aarch64_relocate_section): Pass input_section.
	(aarch64_map_one_stub): Handle branch type none as valid.

ld/ChangeLog:

	PR ld/23904
	* testsuite/ld-aarch64/aarch64-elf.exp: Add erratum843419_tls_ie.
	* testsuite/ld-aarch64/erratum843419_tls_ie.d: New test.
	* testsuite/ld-aarch64/erratum843419_tls_ie.s: New test.
2018-11-27 12:42:22 +00:00
Mark Wielaard 4207142d6a Handle ELF compressed header alignment correctly by setting up the section alignment correctly for the Elf32_Chdr or Elf64_Chdr type and respect the ch_addralign field when decompressing the section data.
PR binutils/23919
binutils* readelf.c (dump_sections_as_strings): Remove bogus addralign check.
	(dump_sections_as_bytes): Likewise.
	(load_specific_debug_sections): Likewise.
	* testsuite/binutils-all/dw2-3.rS: Adjust alignment.
	* testsuite/binutils-all/dw2-3.rt: Likewise.

bfd	* bfd.c (bfd_update_compression_header): Explicitly set alignment.
	(bfd_check_compression_header): Add uncompressed_alignment_power
	argument. Check ch_addralign is a power of 2.
	* bfd-in2.h: Regenerated.
	* compress.c (bfd_compress_section_contents): Get and set
	orig_uncompressed_alignment_pow if section is decompressed.
	(bfd_is_section_compressed_with_header): Add and get
	uncompressed_align_pow_p argument.
	(bfd_is_section_compressed): Add uncompressed_align_power argument
	to bfd_is_section_compressed_with_header call.
	(bfd_init_section_decompress_status): Get and set
	uncompressed_alignment_power.
	* elf.c (_bfd_elf_make_section_from_shdr): Add
	uncompressed_align_power argument to
	bfd_is_section_compressed_with_header call.
2018-11-27 11:59:10 +00:00
GDB Administrator 6a75ea85b1 Automatic date update in version.in 2018-11-27 00:00:24 +00:00
GDB Administrator 0a744d8f9d Automatic date update in version.in 2018-11-26 00:00:37 +00:00
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GDB Administrator f5e0fe29ee Automatic date update in version.in 2018-11-24 00:00:24 +00:00
GDB Administrator 8e4b639201 Automatic date update in version.in 2018-11-23 00:00:49 +00:00
GDB Administrator 79a9468c70 Automatic date update in version.in 2018-11-22 00:00:17 +00:00
Jozef Lawrynowicz ca94519e70 Fix linking MSP430 files created by gcc's LTO optimizer.
When invoking GCC with "-g -flto", the compiler will create LTO objects
with debug information. The objects created are "simple ELF" objects (see
libiberty/simple-object-elf.c) and do not have target-specific sections.

When the MSP430 linker sees one of these objects without a .MSP430.attributes
section it errors:

> error: /tmp/cc4LhbEI.ltrans0.ltrans.o uses MSP430X instructions but /tmp/ccynqIwudebugobj uses unknown
> error: /tmp/cc4LhbEI.ltrans0.ltrans.o uses the small code model whereas /tmp/ccynqIwudebugobj uses the unknown code model
> error: /tmp/cc4LhbEI.ltrans0.ltrans.o uses the small data model whereas /tmp/ccynqIwudebugobj uses the unknown data model
> error: /tmp/cc4LhbEI.ltrans0.ltrans.o uses the small code model but /tmp/ccynqIwudebugobj uses the unknown data model
> failed to merge target specific data of file /tmp/cc4LhbEI.ltrans0.ltrans.o

The following patch allows these debug LTO objects to be linked with other
MSP430 objects even if they do not have a .MSP430.attributes section.

bfd	* elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Do not
	error when .MSP430.attributes section is missing from objects
	created by LTO.
2018-11-21 16:21:25 +00:00
GDB Administrator 1b288e9bbf Automatic date update in version.in 2018-11-21 00:00:26 +00:00
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GDB Administrator a0cd42fcd1 Automatic date update in version.in 2018-11-15 00:00:41 +00:00
GDB Administrator dd9168931f Automatic date update in version.in 2018-11-14 00:01:05 +00:00
Jim Wilson 0242af4010 RISC-V: Improve linker error for FP mismatch.
bfd/
	* elfnn-riscv.c (riscv_float_abi_string): New.
	(_bfd_riscv_elf_merge_private_bfd_data): Use it for error message.
2018-11-13 15:56:29 -08:00
GDB Administrator 7322dd1f69 Automatic date update in version.in 2018-11-13 00:00:40 +00:00
GDB Administrator 417e50dbcf Automatic date update in version.in 2018-11-12 00:00:26 +00:00
GDB Administrator 0c57b50523 Automatic date update in version.in 2018-11-11 00:01:25 +00:00
GDB Administrator 00a9f4ce3d Automatic date update in version.in 2018-11-10 00:00:36 +00:00
Bernhard M. Wiedemann dfbfec241a Correct comment concerning PE timestamp insertion.
* peXXigen.c (_bfd_XXi_only_swap_filehdr_out): Correct comment
	concerning timestamp insertion.
2018-11-09 16:06:48 +00:00
Cupertino Miranda 20b233dc48 Fixed warning from previous patch. Added Changelog. 2018-11-09 15:53:30 +00:00
Cupertino Miranda d07b621f4c [ARC] More fixes for TLS.
Added warning for static TLS reloc.

Fixed issue related to TLS and partial static linking of libraries:
  This issue was detected when throwing exceptions in C++ while linking with
  -static-libstdc++.
  TLS relocation from the libstdc++ wasn't being patched as local now that it was
  static linked with the executable.

Fix for TLS with static and pie. Problem introduced by earlier patch:
  Fixes the following glibc tests:
   - elf/tst-tls1-static

bfd/
    xxxx-xx-xx  Cupertino Miranda  <cmiranda@synopsys.com>

	    * arc-got.h (arc_got_entry_type_for_reloc): Changed to
	      correct static TLS relocs.
            * elf32-arc.c (elf_arc_check_relocs): Introduced warning to
	      TLS relocs which require -fPIC.
	      (arc_create_forced_local_got_entries_for_tls): Created.
	      Traverses list of GOT entries to be resolved statically
	      when needed.
	      (elf_arc_finish_dynamic_sections): Changed. Calls
	      arc_create_forced_local_got_entries_for_tls for each known
	      possibly GOT symbol.
2018-11-09 15:34:37 +00:00
rhn d2eb0fb5a0 Stop corruption of ihex output shen addresses are sign extended.
PR 23699
	* ihex.c (ihex_write_object_contents): Check for sign extended
	addresses that cannot be supported in the ihex format.
2018-11-09 14:09:44 +00:00
Claudiu Zissulescu 0f2064107b [ARC] Fix local got entry list.
Fix a memory leak appearing when the local got entry list was constructed.

bfd/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-got.h (arc_get_local_got_ents): Revamp it; use
	elf_local_got_ents to store the local got list.
	(get_got_entry_list_for_symbo): Restructure it.
	* elf32-arc.c (elf_arc_relocate_section): Correct the call to
	get_got_entry_list_for_symbol.
2018-11-09 13:20:27 +02:00
GDB Administrator 663cc8c0fc Automatic date update in version.in 2018-11-09 00:00:25 +00:00
GDB Administrator 9e49efb79c Automatic date update in version.in 2018-11-08 00:00:32 +00:00
Nick Clifton 0661ae2e53 Add updated French and Portuguese translations.
gas	* po/fr.po: Updated French translation.
bfd	* po/fr.po: Updated French translation.
	* po/pt.po: Updated Portuguese translation.
binutils* po/pt.po: Updated Portuguese translation.
2018-11-07 16:09:27 +00:00
Roman Bolshakov fc7b364aba Add support for new load commands added by Apple to the MACH-O file format.
bfd	* mach-o.h: Add new enums for BFD_MACH_O_PLATFORM_MACOS,
	BFD_MACH_O_PLATFORM_IOS, BFD_MACH_O_PLATFORM_TVOS,
	BFD_MACH_O_PLATFORM_WATCHOS, BFD_MACH_O_PLATFORM_BRIDGEOS,
	BFD_MACH_O_TOOL_CLANG, BFD_MACH_O_TOOL_SWIFT, BFD_MACH_O_TOOL_LD.
	(struct bfd_mach_o_note_command): New.
	(struct bfd_mach_o_build_version_tool): New.
	(struct bfd_mach_o_build_version_command): New.
	(bfd_mach_o_read_version_min): Don't split version into
	a few fields. Rename reserved to sdk.
	* mach-o.c (bfd_mach_o_read_version_min): Don't split version into a
	few fields. Rename reserved to sdk.
	(bfd_mach_o_read_command): Handle LC_VERSION_MIN_TVOS, LC_NOTE,
	LC_BUILD_VERSION.
	(bfd_mach_o_read_note): New.
	(bfd_mach_o_read_build_version): New.

	PR 23728
binutils* od-macho.c (printf_version): New.
	(dump_load_command): Use it to print version. Print sdk version. Print
	version info for watchOS and tvOS. Print LC_NOTE, LC_BUILD_VERSION.
	(dump_buld_version): New.
	(bfd_mach_o_platform_name): New
	(bfd_mach_o_tool_name): New

	* mach-o/external.h (mach_o_nversion_min_command_external): Rename
	reserved to sdk.
	(mach_o_note_command_external): New.
	(mach_o_build_version_command_external): New.
	* mach-o/loader.h (BFD_MACH_O_LC_VERSION_MIN_TVOS): Define.
	(BFD_MACH_O_LC_NOTE): Define.
2018-11-07 15:20:22 +00:00
Alan Modra 42d4c301c4 Regen bfd/configure
* configure: Regenerate.
2018-11-07 21:55:06 +10:30