/* ARC Auxiliary register definitions Copyright (C) 2015-2016 Free Software Foundation, Inc. Contributed by Claudiu Zissulescu (claziss@synopsys.com) This file is part of libopcodes. This library is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version. It is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ DEF (0x0, NONE, STATUS) DEF (0x1, NONE, SEMAPHORE) DEF (0x2, NONE, LP_START) DEF (0x3, NONE, LP_END) DEF (0x4, NONE, IDENTITY) DEF (0x5, NONE, DEBUG) DEF (0x6, NONE, PC) DEF (0x7, NONE, ADCR) DEF (0x8, NONE, APCR) DEF (0x9, NONE, ACR) DEF (0xA, NONE, STATUS32) DEF (0xB, NONE, STATUS32_L1) DEF (0xC, NONE, STATUS32_L2) DEF (0xF, NONE, BPU_FLUSH) DEF (0x10, NONE, IVIC) DEF (0x10, NONE, IC_IVIC) DEF (0x11, NONE, CHE_MODE) DEF (0x11, NONE, IC_CTRL) DEF (0x12, NONE, MULHI) DEF (0x13, NONE, LOCKLINE) DEF (0x13, NONE, IC_LIL) DEF (0x14, NONE, DMC_CODE_RAM) DEF (0x15, NONE, TAG_ADDR_MASK) DEF (0x16, NONE, TAG_DATA_MASK) DEF (0x17, NONE, LINE_LENGTH_MASK) DEF (0x18, NONE, AUX_LDST_RAM) DEF (0x18, NONE, AUX_DCCM) DEF (0x19, NONE, UNLOCKLINE) DEF (0x19, NONE, IC_IVIL) DEF (0x1A, NONE, IC_RAM_ADDRESS) DEF (0x1B, NONE, IC_TAG) DEF (0x1C, NONE, IC_WP) DEF (0x1D, NONE, IC_DATA) DEF (0x20, NONE, SRAM_SEQ) DEF (0x21, NONE, COUNT0) DEF (0x22, NONE, CONTROL0) DEF (0x23, NONE, LIMIT0) DEF (0x24, NONE, PCPORT) DEF (0x25, NONE, INT_VECTOR_BASE) DEF (0x26, NONE, AUX_VBFDW_MODE) DEF (0x26, NONE, JLI_BASE) DEF (0x27, NONE, AUX_VBFDW_BM0) DEF (0x28, NONE, AUX_VBFDW_BM1) DEF (0x29, NONE, AUX_VBFDW_ACCU) DEF (0x2A, NONE, AUX_VBFDW_OFST) DEF (0x2B, NONE, AUX_VBFDW_INTSTAT) DEF (0x2C, NONE, AUX_XMAC0_24) DEF (0x2D, NONE, AUX_XMAC1_24) DEF (0x2E, NONE, AUX_XMAC2_24) DEF (0x2F, NONE, AUX_FBF_STORE_16) DEF (0x30, NONE, AX0) DEF (0x31, NONE, AX1) DEF (0x32, NONE, AUX_CRC_POLY) DEF (0x33, NONE, AUX_CRC_MODE) DEF (0x34, NONE, MX0) DEF (0x35, NONE, MX1) DEF (0x36, NONE, MY0) DEF (0x37, NONE, MY1) DEF (0x38, NONE, XYCONFIG) DEF (0x39, NONE, SCRATCH_A) DEF (0x3A, NONE, BURSTSYS) DEF (0x3A, NONE, TSCH) DEF (0x3B, NONE, BURSTXYM) DEF (0x3C, NONE, BURSTSZ) DEF (0x3D, NONE, BURSTVAL) DEF (0x40, NONE, XTP_NEWVAL) DEF (0x41, NONE, AUX_MACMODE) DEF (0x42, NONE, LSP_NEWVAL) DEF (0x43, NONE, AUX_IRQ_LV12) DEF (0x44, NONE, AUX_XMAC0) DEF (0x45, NONE, AUX_XMAC1) DEF (0x46, NONE, AUX_XMAC2) DEF (0x47, NONE, DC_IVDC) DEF (0x48, NONE, DC_CTRL) DEF (0x49, NONE, DC_LDL) DEF (0x4A, NONE, DC_IVDL) DEF (0x4B, NONE, DC_FLSH) DEF (0x4C, NONE, DC_FLDL) DEF (0x50, NONE, HEXDATA) DEF (0x51, NONE, HEXCTRL) DEF (0x52, NONE, LED) DEF (0x56, NONE, DILSTAT) DEF (0x57, NONE, SWSTAT) DEF (0x58, NONE, DC_RAM_ADDR) DEF (0x59, NONE, DC_TAG) DEF (0x5A, NONE, DC_WP) DEF (0x5B, NONE, DC_DATA) DEF (0x61, NONE, DCCM_BASE_BUILD) DEF (0x62, NONE, CRC_BUILD) DEF (0x63, NONE, BTA_LINK_BUILD) DEF (0x64, NONE, VBFDW_BUILD) DEF (0x65, NONE, EA_BUILD) DEF (0x66, NONE, DATASPACE) DEF (0x67, NONE, MEMSUBSYS) DEF (0x68, NONE, VECBASE_AC_BUILD) DEF (0x69, NONE, P_BASE_ADDR) DEF (0x6A, NONE, DATA_UNCACHED_BUILD) DEF (0x6B, NONE, FP_BUILD) DEF (0x6C, NONE, DPFP_BUILD) DEF (0x6D, NONE, MPU_BUILD) DEF (0x6E, NONE, RF_BUILD) DEF (0x6F, NONE, MMU_BUILD) DEF (0x70, NONE, AA2_BUILD) DEF (0x71, NONE, VECBASE_BUILD) DEF (0x72, NONE, D_CACHE_BUILD) DEF (0x73, NONE, MADI_BUILD) DEF (0x74, NONE, DCCM_BUILD) DEF (0x75, NONE, TIMER_BUILD) DEF (0x76, NONE, AP_BUILD) DEF (0x77, NONE, I_CACHE_BUILD) DEF (0x78, NONE, ICCM_BUILD) DEF (0x79, NONE, DSPRAM_BUILD) DEF (0x7A, NONE, MAC_BUILD) DEF (0x7B, NONE, MULTIPLY_BUILD) DEF (0x7C, NONE, SWAP_BUILD) DEF (0x7D, NONE, NORM_BUILD) DEF (0x7E, NONE, MINMAX_BUILD) DEF (0x7F, NONE, BARREL_BUILD) DEF (0x80, NONE, AX0) DEF (0x81, NONE, AX1) DEF (0x82, NONE, AX2) DEF (0x83, NONE, AX3) DEF (0x84, NONE, AY0) DEF (0x85, NONE, AY1) DEF (0x86, NONE, AY2) DEF (0x87, NONE, AY3) DEF (0x88, NONE, MX00) DEF (0x89, NONE, MX01) DEF (0x8A, NONE, MX10) DEF (0x8B, NONE, MX11) DEF (0x8C, NONE, MX20) DEF (0x8D, NONE, MX21) DEF (0x8E, NONE, MX30) DEF (0x8F, NONE, MX31) DEF (0x90, NONE, MY00) DEF (0x91, NONE, MY01) DEF (0x92, NONE, MY10) DEF (0x93, NONE, MY11) DEF (0x94, NONE, MY20) DEF (0x95, NONE, MY21) DEF (0x96, NONE, MY30) DEF (0x97, NONE, MY31) DEF (0x98, NONE, XYCONFIG) DEF (0x99, NONE, BURSTSYS) DEF (0x9A, NONE, BURSTXYM) DEF (0x9B, NONE, BURSTSZ) DEF (0x9C, NONE, BURSTVAL) DEF (0x9D, NONE, XYLSBASEX) DEF (0x9E, NONE, XYLSBASEY) DEF (0x9F, NONE, AUX_XMACLW_H) DEF (0xA0, NONE, AUX_XMACLW_L) DEF (0xA1, NONE, SE_CTRL) DEF (0xA2, NONE, SE_STAT) DEF (0xA3, NONE, SE_ERR) DEF (0xA4, NONE, SE_EADR) DEF (0xA5, NONE, SE_SPC) DEF (0xA6, NONE, SDM_BASE) DEF (0xA7, NONE, SCM_BASE) DEF (0xA8, NONE, SE_DBG_CTRL) DEF (0xA9, NONE, SE_DBG_DATA0) DEF (0xAA, NONE, SE_DBG_DATA1) DEF (0xAB, NONE, SE_DBG_DATA2) DEF (0xAC, NONE, SE_DBG_DATA3) DEF (0xAD, NONE, SE_WATCH) DEF (0xC0, NONE, BPU_BUILD) DEF (0xC1, NONE, ARC600_BUILD_CONFIG) DEF (0xC2, NONE, ISA_CONFIG) DEF (0xF4, NONE, HWP_BUILD) DEF (0xF5, NONE, PCT_BUILD) DEF (0xF6, NONE, CC_BUILD) DEF (0xF7, NONE, PM_BCR) DEF (0xF8, NONE, SCQ_SWITCH_BUILD) DEF (0xF9, NONE, VRAPTOR_BUILD) DEF (0xFA, NONE, DMA_CONFIG) DEF (0xFB, NONE, SIMD_CONFIG) DEF (0xFC, NONE, VLC_BUILD) DEF (0xFD, NONE, SIMD_DMA_BUILD) DEF (0xFE, NONE, IFETCH_QUEUE_BUILD) DEF (0xFF, NONE, SMART_BUILD) DEF (0x100, NONE, COUNT1) DEF (0x101, NONE, CONTROL1) DEF (0x102, NONE, LIMIT1) DEF (0x103, NONE, TIMER_XX) DEF (0x120, NONE, ARCANGEL_PERIPH_XX) DEF (0x140, NONE, PERIPH_XX) DEF (0x200, NONE, AUX_IRQ_LEV) DEF (0x201, NONE, AUX_IRQ_HINT) DEF (0x202, NONE, AUX_INTER_CORE_INTERRUPT) DEF (0x210, NONE, AES_AUX_0) DEF (0x211, NONE, AES_AUX_1) DEF (0x212, NONE, AES_AUX_2) DEF (0x213, NONE, AES_CRYPT_MODE) DEF (0x214, NONE, AES_AUXS) DEF (0x215, NONE, AES_AUXI) DEF (0x216, NONE, AES_AUX_3) DEF (0x217, NONE, AES_AUX_4) DEF (0x218, NONE, ARITH_CTL_AUX) DEF (0x219, NONE, DES_AUX) DEF (0x220, NONE, AP_AMV0) DEF (0x221, NONE, AP_AMM0) DEF (0x222, NONE, AP_AC0) DEF (0x223, NONE, AP_AMV1) DEF (0x224, NONE, AP_AMM1) DEF (0x225, NONE, AP_AC1) DEF (0x226, NONE, AP_AMV2) DEF (0x227, NONE, AP_AMM2) DEF (0x228, NONE, AP_AC2) DEF (0x229, NONE, AP_AMV3) DEF (0x22A, NONE, AP_AMM3) DEF (0x22B, NONE, AP_AC3) DEF (0x22C, NONE, AP_AMV4) DEF (0x22D, NONE, AP_AMM4) DEF (0x22E, NONE, AP_AC4) DEF (0x22F, NONE, AP_AMV5) DEF (0x230, NONE, AP_AMM5) DEF (0x231, NONE, AP_AC5) DEF (0x232, NONE, AP_AMV6) DEF (0x233, NONE, AP_AMM6) DEF (0x234, NONE, AP_AC6) DEF (0x235, NONE, AP_AMV7) DEF (0x236, NONE, AP_AMM7) DEF (0x237, NONE, AP_AC7) DEF (0x278, NONE, PCT_CONTROL) DEF (0x279, NONE, PCT_BANK) DEF (0x300, DPX, FP_STATUS) DEF (0x301, DPX, AUX_DPFP1L) DEF (0x301, DPX, D1L) DEF (0x302, DPX, AUX_DPFP1H) DEF (0x302, DPX, D1H) DEF (0x302, DPA, D1L) DEF (0x303, DPX, AUX_DPFP2L) DEF (0x303, DPX, D2L) DEF (0x303, DPA, D1H) DEF (0x304, DPX, AUX_DPFP2H) DEF (0x304, DPX, D2H) DEF (0x304, DPA, D2L) DEF (0x305, DPX, DPFP_STATUS) DEF (0x305, DPA, D2H) DEF (0x306, NONE, RTT) DEF (0x400, NONE, ERET) DEF (0x401, NONE, ERBTA) DEF (0x402, NONE, ERSTATUS) DEF (0x403, NONE, ECR) DEF (0x404, NONE, EFA) DEF (0x405, NONE, TLBPD0) DEF (0x406, NONE, TLBPD1) DEF (0x407, NONE, TLBIndex) DEF (0x408, NONE, TLBCommand) DEF (0x409, NONE, PID) DEF (0x409, NONE, MPUEN) DEF (0x40A, NONE, ICAUSE1) DEF (0x40B, NONE, ICAUSE2) DEF (0x40C, NONE, AUX_IENABLE) DEF (0x40D, NONE, AUX_ITRIGGER) DEF (0x410, NONE, XPU) DEF (0x412, NONE, BTA) DEF (0x413, NONE, BTA_L1) DEF (0x414, NONE, BTA_L2) DEF (0x415, NONE, AUX_IRQ_PULSE_CANCEL) DEF (0x416, NONE, AUX_IRQ_PENDING) DEF (0x418, NONE, SCRATCH_DATA0) DEF (0x420, NONE, MPUIC) DEF (0x421, NONE, MPUFA) DEF (0x422, NONE, MPURDB0) DEF (0x423, NONE, MPURDP0) DEF (0x424, NONE, MPURDB1) DEF (0x425, NONE, MPURDP1) DEF (0x426, NONE, MPURDB2) DEF (0x427, NONE, MPURDP2) DEF (0x428, NONE, MPURDB3) DEF (0x429, NONE, MPURDP3) DEF (0x42A, NONE, MPURDB4) DEF (0x42B, NONE, MPURDP4) DEF (0x42C, NONE, MPURDB5) DEF (0x42D, NONE, MPURDP5) DEF (0x42E, NONE, MPURDB6) DEF (0x42F, NONE, MPURDP6) DEF (0x430, NONE, MPURDB7) DEF (0x431, NONE, MPURDP7) DEF (0x432, NONE, MPURDB8) DEF (0x433, NONE, MPURDP8) DEF (0x434, NONE, MPURDB9) DEF (0x435, NONE, MPURDP9) DEF (0x436, NONE, MPURDB10) DEF (0x437, NONE, MPURDP10) DEF (0x438, NONE, MPURDB11) DEF (0x439, NONE, MPURDP11) DEF (0x43A, NONE, MPURDB12) DEF (0x43B, NONE, MPURDP12) DEF (0x43C, NONE, MPURDB13) DEF (0x43D, NONE, MPURDP13) DEF (0x43E, NONE, MPURDB14) DEF (0x43F, NONE, MPURDP14) DEF (0x440, NONE, MPURDB15) DEF (0x441, NONE, MPURDP15) DEF (0x44F, NONE, EIA_FLAGS) DEF (0x450, NONE, PM_STATUS) DEF (0x451, NONE, WAKE) DEF (0x452, NONE, DVFS_PERFORMANCE) DEF (0x453, NONE, PWR_CTRL) DEF (0x500, NONE, AUX_VLC_BUF_IDX) DEF (0x501, NONE, AUX_VLC_READ_BUF) DEF (0x502, NONE, AUX_VLC_VALID_BITS) DEF (0x503, NONE, AUX_VLC_BUF_IN) DEF (0x504, NONE, AUX_VLC_BUF_FREE) DEF (0x505, NONE, AUX_VLC_IBUF_STATUS) DEF (0x506, NONE, AUX_VLC_SETUP) DEF (0x507, NONE, AUX_VLC_BITS) DEF (0x508, NONE, AUX_VLC_TABLE) DEF (0x509, NONE, AUX_VLC_GET_SYMBOL) DEF (0x50A, NONE, AUX_VLC_READ_SYMBOL) DEF (0x510, NONE, AUX_UCAVLC_SETUP) DEF (0x511, NONE, AUX_UCAVLC_STATE) DEF (0x512, NONE, AUX_CAVLC_ZERO_LEFT) DEF (0x514, NONE, AUX_UVLC_I_STATE) DEF (0x51C, NONE, AUX_VLC_DMA_PTR) DEF (0x51D, NONE, AUX_VLC_DMA_END) DEF (0x51E, NONE, AUX_VLC_DMA_ESC) DEF (0x51F, NONE, AUX_VLC_DMA_CTRL) DEF (0x520, NONE, AUX_VLC_GET_0BIT) DEF (0x521, NONE, AUX_VLC_GET_1BIT) DEF (0x522, NONE, AUX_VLC_GET_2BIT) DEF (0x523, NONE, AUX_VLC_GET_3BIT) DEF (0x524, NONE, AUX_VLC_GET_4BIT) DEF (0x525, NONE, AUX_VLC_GET_5BIT) DEF (0x526, NONE, AUX_VLC_GET_6BIT) DEF (0x527, NONE, AUX_VLC_GET_7BIT) DEF (0x528, NONE, AUX_VLC_GET_8BIT) DEF (0x529, NONE, AUX_VLC_GET_9BIT) DEF (0x52A, NONE, AUX_VLC_GET_10BIT) DEF (0x52B, NONE, AUX_VLC_GET_11BIT) DEF (0x52C, NONE, AUX_VLC_GET_12BIT) DEF (0x52D, NONE, AUX_VLC_GET_13BIT) DEF (0x52E, NONE, AUX_VLC_GET_14BIT) DEF (0x52F, NONE, AUX_VLC_GET_15BIT) DEF (0x530, NONE, AUX_VLC_GET_16BIT) DEF (0x531, NONE, AUX_VLC_GET_17BIT) DEF (0x532, NONE, AUX_VLC_GET_18BIT) DEF (0x533, NONE, AUX_VLC_GET_19BIT) DEF (0x534, NONE, AUX_VLC_GET_20BIT) DEF (0x535, NONE, AUX_VLC_GET_21BIT) DEF (0x536, NONE, AUX_VLC_GET_22BIT) DEF (0x537, NONE, AUX_VLC_GET_23BIT) DEF (0x538, NONE, AUX_VLC_GET_24BIT) DEF (0x539, NONE, AUX_VLC_GET_25BIT) DEF (0x53A, NONE, AUX_VLC_GET_26BIT) DEF (0x53B, NONE, AUX_VLC_GET_27BIT) DEF (0x53C, NONE, AUX_VLC_GET_28BIT) DEF (0x53D, NONE, AUX_VLC_GET_29BIT) DEF (0x53E, NONE, AUX_VLC_GET_30BIT) DEF (0x53F, NONE, AUX_VLC_GET_31BIT) DEF (0x540, NONE, AUX_CABAC_CTRL) DEF (0x541, NONE, AUX_CABAC_CTX_STATE) DEF (0x542, NONE, AUX_CABAC_COD_PARAM) DEF (0x543, NONE, AUX_CABAC_MISC0) DEF (0x544, NONE, AUX_CABAC_MISC1) DEF (0x545, NONE, AUX_CABAC_MISC2) DEF (0x600, NONE, ARC600_BUILD_CONFIG) DEF (0x700, NONE, SMART_CONTROL) DEF (0x701, NONE, SMART_DATA_0) DEF (0x701, NONE, SMART_DATA_1) DEF (0x701, NONE, SMART_DATA_2) DEF (0x701, NONE, SMART_DATA_3)