binutils-gdb/sim
Yao Qi 003ca0fd22 Refactor disassembler selection
Nowadays, opcodes/disassemble.c:disassembler selects the proper
disassembler according to ABFD only.  However, it actually
selects disassemblers according to arch, mach, endianess, and
abfd.  This patch adds them to the parameters of disassembler,
so that its caller can still select disassemblers in case that
abfd is NULL (a typical case in GDB).

There isn't any functionality change.

binutils:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* objdump.c (disassemble_data): Caller update.

include:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* dis-asm.h (disassembler): Update declaration.

opcodes:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* disassemble.c (disassembler): Add arguments a, big and mach.
	Use them.

sim/common:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* sim-trace.c (trace_disasm): Caller update.
2017-05-24 17:23:52 +01:00
..
aarch64 Fix ldn/stn multiple instructions. Fix testcases with unaligned data. 2017-04-22 16:36:01 -07:00
arm
avr
bfin
common Refactor disassembler selection 2017-05-24 17:23:52 +01:00
cr16
cris
d10v
erc32
frv
ft32
h8300
igen
iq2000
lm32
m32c
m32r
m68hc11
mcore
microblaze
mips
mn10300
moxie
msp430
ppc
rl78
rx
sh
sh64
testsuite Fix ldn/stn multiple instructions. Fix testcases with unaligned data. 2017-04-22 16:36:01 -07:00
v850
.gitignore
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