867 lines
21 KiB
C
867 lines
21 KiB
C
/* Print National Semiconductor 32000 instructions.
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Copyright 1986, 1988, 1991, 1992, 1994, 1998, 2001, 2002, 2005, 2007,
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2009 Free Software Foundation, Inc.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
|
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "dis-asm.h"
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#if !defined(const) && !defined(__STDC__)
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#define const
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#endif
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#include "opcode/ns32k.h"
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#include "opintl.h"
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static disassemble_info *dis_info;
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/* Hacks to get it to compile <= READ THESE AS FIXES NEEDED. */
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#define INVALID_FLOAT(val, size) invalid_float ((bfd_byte *) val, size)
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static long
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read_memory_integer (unsigned char * addr, int nr)
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{
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long val;
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int i;
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for (val = 0, i = nr - 1; i >= 0; i--)
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{
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val = (val << 8);
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val |= (0xff & *(addr + i));
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}
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return val;
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}
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/* 32000 instructions are never longer than this. */
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#define MAXLEN 62
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#include <setjmp.h>
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struct private
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{
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/* Points to first byte not fetched. */
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bfd_byte *max_fetched;
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bfd_byte the_buffer[MAXLEN];
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bfd_vma insn_start;
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jmp_buf bailout;
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};
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/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
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to ADDR (exclusive) are valid. Returns 1 for success, longjmps
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on error. */
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#define FETCH_DATA(info, addr) \
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((addr) <= ((struct private *)(info->private_data))->max_fetched \
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? 1 : fetch_data ((info), (addr)))
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static int
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fetch_data (struct disassemble_info *info, bfd_byte *addr)
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{
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int status;
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struct private *priv = (struct private *) info->private_data;
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bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
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status = (*info->read_memory_func) (start,
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priv->max_fetched,
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addr - priv->max_fetched,
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info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, start, info);
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longjmp (priv->bailout, 1);
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}
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else
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priv->max_fetched = addr;
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return 1;
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}
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/* Number of elements in the opcode table. */
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#define NOPCODES (sizeof ns32k_opcodes / sizeof ns32k_opcodes[0])
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#define NEXT_IS_ADDR '|'
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struct ns32k_option
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{
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char *pattern; /* The option itself. */
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unsigned long value; /* Binary value of the option. */
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unsigned long match; /* These bits must match. */
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};
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static const struct ns32k_option opt_u[]= /* Restore, exit. */
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{
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{ "r0", 0x80, 0x80 },
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{ "r1", 0x40, 0x40 },
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{ "r2", 0x20, 0x20 },
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{ "r3", 0x10, 0x10 },
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{ "r4", 0x08, 0x08 },
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{ "r5", 0x04, 0x04 },
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{ "r6", 0x02, 0x02 },
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{ "r7", 0x01, 0x01 },
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{ 0 , 0x00, 0x00 }
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};
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static const struct ns32k_option opt_U[]= /* Save, enter. */
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{
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{ "r0", 0x01, 0x01 },
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{ "r1", 0x02, 0x02 },
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{ "r2", 0x04, 0x04 },
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{ "r3", 0x08, 0x08 },
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{ "r4", 0x10, 0x10 },
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{ "r5", 0x20, 0x20 },
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{ "r6", 0x40, 0x40 },
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{ "r7", 0x80, 0x80 },
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{ 0 , 0x00, 0x00 }
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};
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static const struct ns32k_option opt_O[]= /* Setcfg. */
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{
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{ "c", 0x8, 0x8 },
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{ "m", 0x4, 0x4 },
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{ "f", 0x2, 0x2 },
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{ "i", 0x1, 0x1 },
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{ 0 , 0x0, 0x0 }
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};
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static const struct ns32k_option opt_C[]= /* Cinv. */
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{
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{ "a", 0x4, 0x4 },
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{ "i", 0x2, 0x2 },
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{ "d", 0x1, 0x1 },
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{ 0 , 0x0, 0x0 }
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};
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static const struct ns32k_option opt_S[]= /* String inst. */
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{
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{ "b", 0x1, 0x1 },
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{ "u", 0x6, 0x6 },
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{ "w", 0x2, 0x2 },
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{ 0 , 0x0, 0x0 }
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};
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static const struct ns32k_option list_P532[]= /* Lpr spr. */
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{
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{ "us", 0x0, 0xf },
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{ "dcr", 0x1, 0xf },
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{ "bpc", 0x2, 0xf },
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{ "dsr", 0x3, 0xf },
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{ "car", 0x4, 0xf },
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{ "fp", 0x8, 0xf },
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{ "sp", 0x9, 0xf },
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{ "sb", 0xa, 0xf },
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{ "usp", 0xb, 0xf },
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{ "cfg", 0xc, 0xf },
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{ "psr", 0xd, 0xf },
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{ "intbase", 0xe, 0xf },
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{ "mod", 0xf, 0xf },
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{ 0 , 0x00, 0xf }
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};
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static const struct ns32k_option list_M532[]= /* Lmr smr. */
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{
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{ "mcr", 0x9, 0xf },
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{ "msr", 0xa, 0xf },
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{ "tear", 0xb, 0xf },
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{ "ptb0", 0xc, 0xf },
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{ "ptb1", 0xd, 0xf },
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{ "ivar0", 0xe, 0xf },
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{ "ivar1", 0xf, 0xf },
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{ 0 , 0x0, 0xf }
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};
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static const struct ns32k_option list_P032[]= /* Lpr spr. */
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{
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{ "upsr", 0x0, 0xf },
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{ "fp", 0x8, 0xf },
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{ "sp", 0x9, 0xf },
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{ "sb", 0xa, 0xf },
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{ "psr", 0xb, 0xf },
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{ "intbase", 0xe, 0xf },
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{ "mod", 0xf, 0xf },
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{ 0 , 0x0, 0xf }
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};
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static const struct ns32k_option list_M032[]= /* Lmr smr. */
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{
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{ "bpr0", 0x0, 0xf },
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{ "bpr1", 0x1, 0xf },
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{ "pf0", 0x4, 0xf },
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{ "pf1", 0x5, 0xf },
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{ "sc", 0x8, 0xf },
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{ "msr", 0xa, 0xf },
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{ "bcnt", 0xb, 0xf },
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{ "ptb0", 0xc, 0xf },
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{ "ptb1", 0xd, 0xf },
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{ "eia", 0xf, 0xf },
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{ 0 , 0x0, 0xf }
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};
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/* Figure out which options are present. */
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static void
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optlist (int options, const struct ns32k_option * optionP, char * result)
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{
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if (options == 0)
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{
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sprintf (result, "[]");
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return;
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}
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sprintf (result, "[");
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for (; (options != 0) && optionP->pattern; optionP++)
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{
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if ((options & optionP->match) == optionP->value)
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{
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/* We found a match, update result and options. */
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strcat (result, optionP->pattern);
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options &= ~optionP->value;
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if (options != 0) /* More options to come. */
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strcat (result, ",");
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}
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}
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if (options != 0)
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strcat (result, "undefined");
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strcat (result, "]");
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}
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static void
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list_search (int reg_value, const struct ns32k_option *optionP, char *result)
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{
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for (; optionP->pattern; optionP++)
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{
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if ((reg_value & optionP->match) == optionP->value)
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{
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sprintf (result, "%s", optionP->pattern);
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return;
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}
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}
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sprintf (result, "undefined");
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}
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/* Extract "count" bits starting "offset" bits into buffer. */
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static int
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bit_extract (bfd_byte *buffer, int offset, int count)
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{
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int result;
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int bit;
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buffer += offset >> 3;
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offset &= 7;
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bit = 1;
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result = 0;
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while (count--)
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{
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FETCH_DATA (dis_info, buffer + 1);
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if ((*buffer & (1 << offset)))
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result |= bit;
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if (++offset == 8)
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{
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offset = 0;
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buffer++;
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}
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bit <<= 1;
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}
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return result;
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}
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/* Like bit extract but the buffer is valid and doen't need to be fetched. */
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static int
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bit_extract_simple (bfd_byte *buffer, int offset, int count)
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{
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int result;
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int bit;
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buffer += offset >> 3;
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offset &= 7;
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bit = 1;
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result = 0;
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while (count--)
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{
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if ((*buffer & (1 << offset)))
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result |= bit;
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if (++offset == 8)
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{
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offset = 0;
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buffer++;
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}
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bit <<= 1;
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}
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return result;
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}
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static void
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bit_copy (bfd_byte *buffer, int offset, int count, char *to)
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{
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for (; count > 8; count -= 8, to++, offset += 8)
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*to = bit_extract (buffer, offset, 8);
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*to = bit_extract (buffer, offset, count);
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}
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static int
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sign_extend (int value, int bits)
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{
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value = value & ((1 << bits) - 1);
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return (value & (1 << (bits - 1))
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? value | (~((1 << bits) - 1))
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: value);
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}
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static void
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flip_bytes (char *ptr, int count)
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{
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char tmp;
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while (count > 0)
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{
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tmp = ptr[0];
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ptr[0] = ptr[count - 1];
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ptr[count - 1] = tmp;
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ptr++;
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count -= 2;
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}
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||
}
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||
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/* Given a character C, does it represent a general addressing mode? */
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||
#define Is_gen(c) \
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((c) == 'F' || (c) == 'L' || (c) == 'B' \
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|| (c) == 'W' || (c) == 'D' || (c) == 'A' || (c) == 'I' || (c) == 'Z')
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/* Adressing modes. */
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#define Adrmod_index_byte 0x1c
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#define Adrmod_index_word 0x1d
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#define Adrmod_index_doubleword 0x1e
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#define Adrmod_index_quadword 0x1f
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||
|
||
/* Is MODE an indexed addressing mode? */
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||
#define Adrmod_is_index(mode) \
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( mode == Adrmod_index_byte \
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|| mode == Adrmod_index_word \
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|| mode == Adrmod_index_doubleword \
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||
|| mode == Adrmod_index_quadword)
|
||
|
||
|
||
static int
|
||
get_displacement (bfd_byte *buffer, int *aoffsetp)
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||
{
|
||
int Ivalue;
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||
short Ivalue2;
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||
|
||
Ivalue = bit_extract (buffer, *aoffsetp, 8);
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||
switch (Ivalue & 0xc0)
|
||
{
|
||
case 0x00:
|
||
case 0x40:
|
||
Ivalue = sign_extend (Ivalue, 7);
|
||
*aoffsetp += 8;
|
||
break;
|
||
case 0x80:
|
||
Ivalue2 = bit_extract (buffer, *aoffsetp, 16);
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||
flip_bytes ((char *) & Ivalue2, 2);
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Ivalue = sign_extend (Ivalue2, 14);
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*aoffsetp += 16;
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break;
|
||
case 0xc0:
|
||
Ivalue = bit_extract (buffer, *aoffsetp, 32);
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||
flip_bytes ((char *) & Ivalue, 4);
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||
Ivalue = sign_extend (Ivalue, 30);
|
||
*aoffsetp += 32;
|
||
break;
|
||
}
|
||
return Ivalue;
|
||
}
|
||
|
||
#if 1 /* A version that should work on ns32k f's&d's on any machine. */
|
||
static int
|
||
invalid_float (bfd_byte *p, int len)
|
||
{
|
||
int val;
|
||
|
||
if (len == 4)
|
||
val = (bit_extract_simple (p, 23, 8)/*exponent*/ == 0xff
|
||
|| (bit_extract_simple (p, 23, 8)/*exponent*/ == 0
|
||
&& bit_extract_simple (p, 0, 23)/*mantisa*/ != 0));
|
||
else if (len == 8)
|
||
val = (bit_extract_simple (p, 52, 11)/*exponent*/ == 0x7ff
|
||
|| (bit_extract_simple (p, 52, 11)/*exponent*/ == 0
|
||
&& (bit_extract_simple (p, 0, 32)/*low mantisa*/ != 0
|
||
|| bit_extract_simple (p, 32, 20)/*high mantisa*/ != 0)));
|
||
else
|
||
val = 1;
|
||
return (val);
|
||
}
|
||
#else
|
||
/* Assumes the bytes have been swapped to local order. */
|
||
typedef union
|
||
{
|
||
double d;
|
||
float f;
|
||
struct { unsigned m:23, e:8, :1;} sf;
|
||
struct { unsigned lm; unsigned m:20, e:11, :1;} sd;
|
||
} float_type_u;
|
||
|
||
static int
|
||
invalid_float (float_type_u *p, int len)
|
||
{
|
||
int val;
|
||
|
||
if (len == sizeof (float))
|
||
val = (p->sf.e == 0xff
|
||
|| (p->sf.e == 0 && p->sf.m != 0));
|
||
else if (len == sizeof (double))
|
||
val = (p->sd.e == 0x7ff
|
||
|| (p->sd.e == 0 && (p->sd.m != 0 || p->sd.lm != 0)));
|
||
else
|
||
val = 1;
|
||
return val;
|
||
}
|
||
#endif
|
||
|
||
/* Print an instruction operand of category given by d. IOFFSET is
|
||
the bit position below which small (<1 byte) parts of the operand can
|
||
be found (usually in the basic instruction, but for indexed
|
||
addressing it can be in the index byte). AOFFSETP is a pointer to the
|
||
bit position of the addressing extension. BUFFER contains the
|
||
instruction. ADDR is where BUFFER was read from. Put the disassembled
|
||
version of the operand in RESULT. INDEX_OFFSET is the bit position
|
||
of the index byte (it contains garbage if this operand is not a
|
||
general operand using scaled indexed addressing mode). */
|
||
|
||
static int
|
||
print_insn_arg (int d,
|
||
int ioffset,
|
||
int *aoffsetp,
|
||
bfd_byte *buffer,
|
||
bfd_vma addr,
|
||
char *result,
|
||
int index_offset)
|
||
{
|
||
union
|
||
{
|
||
float f;
|
||
double d;
|
||
int i[2];
|
||
} value;
|
||
int Ivalue;
|
||
int addr_mode;
|
||
int disp1, disp2;
|
||
int size;
|
||
|
||
switch (d)
|
||
{
|
||
case 'f':
|
||
/* A "gen" operand but 5 bits from the end of instruction. */
|
||
ioffset -= 5;
|
||
case 'Z':
|
||
case 'F':
|
||
case 'L':
|
||
case 'I':
|
||
case 'B':
|
||
case 'W':
|
||
case 'D':
|
||
case 'A':
|
||
addr_mode = bit_extract (buffer, ioffset - 5, 5);
|
||
ioffset -= 5;
|
||
switch (addr_mode)
|
||
{
|
||
case 0x0: case 0x1: case 0x2: case 0x3:
|
||
case 0x4: case 0x5: case 0x6: case 0x7:
|
||
/* Register mode R0 -- R7. */
|
||
switch (d)
|
||
{
|
||
case 'F':
|
||
case 'L':
|
||
case 'Z':
|
||
sprintf (result, "f%d", addr_mode);
|
||
break;
|
||
default:
|
||
sprintf (result, "r%d", addr_mode);
|
||
}
|
||
break;
|
||
case 0x8: case 0x9: case 0xa: case 0xb:
|
||
case 0xc: case 0xd: case 0xe: case 0xf:
|
||
/* Register relative disp(R0 -- R7). */
|
||
disp1 = get_displacement (buffer, aoffsetp);
|
||
sprintf (result, "%d(r%d)", disp1, addr_mode & 7);
|
||
break;
|
||
case 0x10:
|
||
case 0x11:
|
||
case 0x12:
|
||
/* Memory relative disp2(disp1(FP, SP, SB)). */
|
||
disp1 = get_displacement (buffer, aoffsetp);
|
||
disp2 = get_displacement (buffer, aoffsetp);
|
||
sprintf (result, "%d(%d(%s))", disp2, disp1,
|
||
addr_mode == 0x10 ? "fp" : addr_mode == 0x11 ? "sp" : "sb");
|
||
break;
|
||
case 0x13:
|
||
/* Reserved. */
|
||
sprintf (result, "reserved");
|
||
break;
|
||
case 0x14:
|
||
/* Immediate. */
|
||
switch (d)
|
||
{
|
||
case 'I':
|
||
case 'Z':
|
||
case 'A':
|
||
/* I and Z are output operands and can`t be immediate
|
||
A is an address and we can`t have the address of
|
||
an immediate either. We don't know how much to increase
|
||
aoffsetp by since whatever generated this is broken
|
||
anyway! */
|
||
sprintf (result, _("$<undefined>"));
|
||
break;
|
||
case 'B':
|
||
Ivalue = bit_extract (buffer, *aoffsetp, 8);
|
||
Ivalue = sign_extend (Ivalue, 8);
|
||
*aoffsetp += 8;
|
||
sprintf (result, "$%d", Ivalue);
|
||
break;
|
||
case 'W':
|
||
Ivalue = bit_extract (buffer, *aoffsetp, 16);
|
||
flip_bytes ((char *) & Ivalue, 2);
|
||
*aoffsetp += 16;
|
||
Ivalue = sign_extend (Ivalue, 16);
|
||
sprintf (result, "$%d", Ivalue);
|
||
break;
|
||
case 'D':
|
||
Ivalue = bit_extract (buffer, *aoffsetp, 32);
|
||
flip_bytes ((char *) & Ivalue, 4);
|
||
*aoffsetp += 32;
|
||
sprintf (result, "$%d", Ivalue);
|
||
break;
|
||
case 'F':
|
||
bit_copy (buffer, *aoffsetp, 32, (char *) &value.f);
|
||
flip_bytes ((char *) &value.f, 4);
|
||
*aoffsetp += 32;
|
||
if (INVALID_FLOAT (&value.f, 4))
|
||
sprintf (result, "<<invalid float 0x%.8x>>", value.i[0]);
|
||
else /* Assume host has ieee float. */
|
||
sprintf (result, "$%g", value.f);
|
||
break;
|
||
case 'L':
|
||
bit_copy (buffer, *aoffsetp, 64, (char *) &value.d);
|
||
flip_bytes ((char *) &value.d, 8);
|
||
*aoffsetp += 64;
|
||
if (INVALID_FLOAT (&value.d, 8))
|
||
sprintf (result, "<<invalid double 0x%.8x%.8x>>",
|
||
value.i[1], value.i[0]);
|
||
else /* Assume host has ieee float. */
|
||
sprintf (result, "$%g", value.d);
|
||
break;
|
||
}
|
||
break;
|
||
case 0x15:
|
||
/* Absolute @disp. */
|
||
disp1 = get_displacement (buffer, aoffsetp);
|
||
sprintf (result, "@|%d|", disp1);
|
||
break;
|
||
case 0x16:
|
||
/* External EXT(disp1) + disp2 (Mod table stuff). */
|
||
disp1 = get_displacement (buffer, aoffsetp);
|
||
disp2 = get_displacement (buffer, aoffsetp);
|
||
sprintf (result, "EXT(%d) + %d", disp1, disp2);
|
||
break;
|
||
case 0x17:
|
||
/* Top of stack tos. */
|
||
sprintf (result, "tos");
|
||
break;
|
||
case 0x18:
|
||
/* Memory space disp(FP). */
|
||
disp1 = get_displacement (buffer, aoffsetp);
|
||
sprintf (result, "%d(fp)", disp1);
|
||
break;
|
||
case 0x19:
|
||
/* Memory space disp(SP). */
|
||
disp1 = get_displacement (buffer, aoffsetp);
|
||
sprintf (result, "%d(sp)", disp1);
|
||
break;
|
||
case 0x1a:
|
||
/* Memory space disp(SB). */
|
||
disp1 = get_displacement (buffer, aoffsetp);
|
||
sprintf (result, "%d(sb)", disp1);
|
||
break;
|
||
case 0x1b:
|
||
/* Memory space disp(PC). */
|
||
disp1 = get_displacement (buffer, aoffsetp);
|
||
*result++ = NEXT_IS_ADDR;
|
||
sprintf_vma (result, addr + disp1);
|
||
result += strlen (result);
|
||
*result++ = NEXT_IS_ADDR;
|
||
*result = '\0';
|
||
break;
|
||
case 0x1c:
|
||
case 0x1d:
|
||
case 0x1e:
|
||
case 0x1f:
|
||
{
|
||
int bit_index;
|
||
static const char *ind = "bwdq";
|
||
char *off;
|
||
|
||
/* Scaled index basemode[R0 -- R7:B,W,D,Q]. */
|
||
bit_index = bit_extract (buffer, index_offset - 8, 3);
|
||
print_insn_arg (d, index_offset, aoffsetp, buffer, addr,
|
||
result, 0);
|
||
off = result + strlen (result);
|
||
sprintf (off, "[r%d:%c]", bit_index, ind[addr_mode & 3]);
|
||
}
|
||
break;
|
||
}
|
||
break;
|
||
case 'H':
|
||
case 'q':
|
||
Ivalue = bit_extract (buffer, ioffset-4, 4);
|
||
Ivalue = sign_extend (Ivalue, 4);
|
||
sprintf (result, "%d", Ivalue);
|
||
ioffset -= 4;
|
||
break;
|
||
case 'r':
|
||
Ivalue = bit_extract (buffer, ioffset-3, 3);
|
||
sprintf (result, "r%d", Ivalue&7);
|
||
ioffset -= 3;
|
||
break;
|
||
case 'd':
|
||
sprintf (result, "%d", get_displacement (buffer, aoffsetp));
|
||
break;
|
||
case 'b':
|
||
Ivalue = get_displacement (buffer, aoffsetp);
|
||
/* Warning!! HACK ALERT!
|
||
Operand type 'b' is only used by the cmp{b,w,d} and
|
||
movm{b,w,d} instructions; we need to know whether
|
||
it's a `b' or `w' or `d' instruction; and for both
|
||
cmpm and movm it's stored at the same place so we
|
||
just grab two bits of the opcode and look at it... */
|
||
size = bit_extract(buffer, ioffset-6, 2);
|
||
if (size == 0) /* 00 => b. */
|
||
size = 1;
|
||
else if (size == 1) /* 01 => w. */
|
||
size = 2;
|
||
else
|
||
size = 4; /* 11 => d. */
|
||
|
||
sprintf (result, "%d", (Ivalue / size) + 1);
|
||
break;
|
||
case 'p':
|
||
*result++ = NEXT_IS_ADDR;
|
||
sprintf_vma (result, addr + get_displacement (buffer, aoffsetp));
|
||
result += strlen (result);
|
||
*result++ = NEXT_IS_ADDR;
|
||
*result = '\0';
|
||
break;
|
||
case 'i':
|
||
Ivalue = bit_extract (buffer, *aoffsetp, 8);
|
||
*aoffsetp += 8;
|
||
sprintf (result, "0x%x", Ivalue);
|
||
break;
|
||
case 'u':
|
||
Ivalue = bit_extract (buffer, *aoffsetp, 8);
|
||
optlist (Ivalue, opt_u, result);
|
||
*aoffsetp += 8;
|
||
break;
|
||
case 'U':
|
||
Ivalue = bit_extract (buffer, *aoffsetp, 8);
|
||
optlist (Ivalue, opt_U, result);
|
||
*aoffsetp += 8;
|
||
break;
|
||
case 'O':
|
||
Ivalue = bit_extract (buffer, ioffset - 9, 9);
|
||
optlist (Ivalue, opt_O, result);
|
||
ioffset -= 9;
|
||
break;
|
||
case 'C':
|
||
Ivalue = bit_extract (buffer, ioffset - 4, 4);
|
||
optlist (Ivalue, opt_C, result);
|
||
ioffset -= 4;
|
||
break;
|
||
case 'S':
|
||
Ivalue = bit_extract (buffer, ioffset - 8, 8);
|
||
optlist (Ivalue, opt_S, result);
|
||
ioffset -= 8;
|
||
break;
|
||
case 'M':
|
||
Ivalue = bit_extract (buffer, ioffset - 4, 4);
|
||
list_search (Ivalue, 0 ? list_M032 : list_M532, result);
|
||
ioffset -= 4;
|
||
break;
|
||
case 'P':
|
||
Ivalue = bit_extract (buffer, ioffset - 4, 4);
|
||
list_search (Ivalue, 0 ? list_P032 : list_P532, result);
|
||
ioffset -= 4;
|
||
break;
|
||
case 'g':
|
||
Ivalue = bit_extract (buffer, *aoffsetp, 3);
|
||
sprintf (result, "%d", Ivalue);
|
||
*aoffsetp += 3;
|
||
break;
|
||
case 'G':
|
||
Ivalue = bit_extract(buffer, *aoffsetp, 5);
|
||
sprintf (result, "%d", Ivalue + 1);
|
||
*aoffsetp += 5;
|
||
break;
|
||
}
|
||
return ioffset;
|
||
}
|
||
|
||
|
||
/* Print the 32000 instruction at address MEMADDR in debugged memory,
|
||
on STREAM. Returns length of the instruction, in bytes. */
|
||
|
||
int
|
||
print_insn_ns32k (bfd_vma memaddr, disassemble_info *info)
|
||
{
|
||
unsigned int i;
|
||
const char *d;
|
||
unsigned short first_word;
|
||
int ioffset; /* Bits into instruction. */
|
||
int aoffset; /* Bits into arguments. */
|
||
char arg_bufs[MAX_ARGS+1][ARG_LEN];
|
||
int argnum;
|
||
int maxarg;
|
||
struct private priv;
|
||
bfd_byte *buffer = priv.the_buffer;
|
||
dis_info = info;
|
||
|
||
info->private_data = & priv;
|
||
priv.max_fetched = priv.the_buffer;
|
||
priv.insn_start = memaddr;
|
||
if (setjmp (priv.bailout) != 0)
|
||
/* Error return. */
|
||
return -1;
|
||
|
||
/* Look for 8bit opcodes first. Other wise, fetching two bytes could take
|
||
us over the end of accessible data unnecessarilly. */
|
||
FETCH_DATA (info, buffer + 1);
|
||
for (i = 0; i < NOPCODES; i++)
|
||
if (ns32k_opcodes[i].opcode_id_size <= 8
|
||
&& ((buffer[0]
|
||
& (((unsigned long) 1 << ns32k_opcodes[i].opcode_id_size) - 1))
|
||
== ns32k_opcodes[i].opcode_seed))
|
||
break;
|
||
if (i == NOPCODES)
|
||
{
|
||
/* Maybe it is 9 to 16 bits big. */
|
||
FETCH_DATA (info, buffer + 2);
|
||
first_word = read_memory_integer(buffer, 2);
|
||
|
||
for (i = 0; i < NOPCODES; i++)
|
||
if ((first_word
|
||
& (((unsigned long) 1 << ns32k_opcodes[i].opcode_id_size) - 1))
|
||
== ns32k_opcodes[i].opcode_seed)
|
||
break;
|
||
|
||
/* Handle undefined instructions. */
|
||
if (i == NOPCODES)
|
||
{
|
||
(*dis_info->fprintf_func)(dis_info->stream, "0%o", buffer[0]);
|
||
return 1;
|
||
}
|
||
}
|
||
|
||
(*dis_info->fprintf_func)(dis_info->stream, "%s", ns32k_opcodes[i].name);
|
||
|
||
ioffset = ns32k_opcodes[i].opcode_size;
|
||
aoffset = ns32k_opcodes[i].opcode_size;
|
||
d = ns32k_opcodes[i].operands;
|
||
|
||
if (*d)
|
||
{
|
||
/* Offset in bits of the first thing beyond each index byte.
|
||
Element 0 is for operand A and element 1 is for operand B.
|
||
The rest are irrelevant, but we put them here so we don't
|
||
index outside the array. */
|
||
int index_offset[MAX_ARGS];
|
||
|
||
/* 0 for operand A, 1 for operand B, greater for other args. */
|
||
int whicharg = 0;
|
||
|
||
(*dis_info->fprintf_func)(dis_info->stream, "\t");
|
||
|
||
maxarg = 0;
|
||
|
||
/* First we have to find and keep track of the index bytes,
|
||
if we are using scaled indexed addressing mode, since the index
|
||
bytes occur right after the basic instruction, not as part
|
||
of the addressing extension. */
|
||
if (Is_gen(d[1]))
|
||
{
|
||
int addr_mode = bit_extract (buffer, ioffset - 5, 5);
|
||
|
||
if (Adrmod_is_index (addr_mode))
|
||
{
|
||
aoffset += 8;
|
||
index_offset[0] = aoffset;
|
||
}
|
||
}
|
||
|
||
if (d[2] && Is_gen(d[3]))
|
||
{
|
||
int addr_mode = bit_extract (buffer, ioffset - 10, 5);
|
||
|
||
if (Adrmod_is_index (addr_mode))
|
||
{
|
||
aoffset += 8;
|
||
index_offset[1] = aoffset;
|
||
}
|
||
}
|
||
|
||
while (*d)
|
||
{
|
||
argnum = *d - '1';
|
||
d++;
|
||
if (argnum > maxarg && argnum < MAX_ARGS)
|
||
maxarg = argnum;
|
||
ioffset = print_insn_arg (*d, ioffset, &aoffset, buffer,
|
||
memaddr, arg_bufs[argnum],
|
||
index_offset[whicharg]);
|
||
d++;
|
||
whicharg++;
|
||
}
|
||
for (argnum = 0; argnum <= maxarg; argnum++)
|
||
{
|
||
bfd_vma addr;
|
||
char *ch;
|
||
|
||
for (ch = arg_bufs[argnum]; *ch;)
|
||
{
|
||
if (*ch == NEXT_IS_ADDR)
|
||
{
|
||
++ch;
|
||
addr = bfd_scan_vma (ch, NULL, 16);
|
||
(*dis_info->print_address_func) (addr, dis_info);
|
||
while (*ch && *ch != NEXT_IS_ADDR)
|
||
++ch;
|
||
if (*ch)
|
||
++ch;
|
||
}
|
||
else
|
||
(*dis_info->fprintf_func)(dis_info->stream, "%c", *ch++);
|
||
}
|
||
if (argnum < maxarg)
|
||
(*dis_info->fprintf_func)(dis_info->stream, ", ");
|
||
}
|
||
}
|
||
return aoffset / 8;
|
||
}
|