276 lines
6.5 KiB
C
276 lines
6.5 KiB
C
/* Intel 386 native support for System V systems (pre-SVR4).
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Copyright 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
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1999, 2000, 2002 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#ifdef HAVE_PTRACE_H
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#include <ptrace.h>
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#else
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#ifdef HAVE_SYS_PTRACE_H
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#include <sys/ptrace.h>
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#endif
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#endif
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#include "frame.h"
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#include "inferior.h"
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#include "language.h"
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#include "gdbcore.h"
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#ifdef USG
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#include <sys/types.h>
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#endif
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#include <sys/param.h>
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#include <sys/dir.h>
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#include <signal.h>
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#include <sys/user.h>
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#include <sys/ioctl.h>
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#include <fcntl.h>
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#ifdef TARGET_HAS_HARDWARE_WATCHPOINTS
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#include <sys/debugreg.h>
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#endif
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#include <sys/file.h>
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#include "gdb_stat.h"
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#ifdef HAVE_SYS_REG_H
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#include <sys/reg.h>
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#endif
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#include "floatformat.h"
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#include "target.h"
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/* Mapping between the general-purpose registers in `struct user'
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format and GDB's register array layout. */
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static int regmap[] =
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{
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EAX, ECX, EDX, EBX,
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UESP, EBP, ESI, EDI,
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EIP, EFL, CS, SS,
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DS, ES, FS, GS,
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};
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/* Support for the user struct. */
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/* Return the address of register REGNUM. BLOCKEND is the value of
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u.u_ar0, and points to the place where GS is stored. */
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CORE_ADDR
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register_u_addr (CORE_ADDR blockend, int regnum)
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{
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struct user u;
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CORE_ADDR fpstate;
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if (FP_REGNUM_P (regnum))
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{
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#ifdef KSTKSZ /* SCO, and others? */
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blockend += 4 * (SS + 1) - KSTKSZ;
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fpstate = blockend + ((char *) &u.u_fps.u_fpstate - (char *) &u);
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return (fpstate + 0x1c + 10 * (regnum - FP0_REGNUM));
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#else
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fpstate = blockend + ((char *) &u.i387.st_space - (char *) &u);
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return (fpstate + 10 * (regnum - FP0_REGNUM));
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#endif
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}
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return (blockend + 4 * regmap[regnum]);
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}
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/* Return the size of the user struct. */
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int
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kernel_u_size (void)
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{
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return (sizeof (struct user));
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}
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#ifdef TARGET_HAS_HARDWARE_WATCHPOINTS
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#if !defined (offsetof)
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#define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
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#endif
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/* Record the value of the debug control register. */
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static int debug_control_mirror;
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/* Record which address associates with which register. */
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static CORE_ADDR address_lookup[DR_LASTADDR - DR_FIRSTADDR + 1];
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static int
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i386_insert_aligned_watchpoint (int, CORE_ADDR, CORE_ADDR, int, int);
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static int
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i386_insert_nonaligned_watchpoint (int, CORE_ADDR, CORE_ADDR, int, int);
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/* Insert a watchpoint. */
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int
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i386_insert_watchpoint (int pid, CORE_ADDR addr, int len, int rw)
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{
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return i386_insert_aligned_watchpoint (pid, addr, addr, len, rw);
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}
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static int
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i386_insert_aligned_watchpoint (int pid, CORE_ADDR waddr, CORE_ADDR addr,
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int len, int rw)
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{
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int i;
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int read_write_bits, len_bits;
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int free_debug_register;
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int register_number;
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/* Look for a free debug register. */
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for (i = DR_FIRSTADDR; i <= DR_LASTADDR; i++)
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{
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if (address_lookup[i - DR_FIRSTADDR] == 0)
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break;
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}
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/* No more debug registers! */
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if (i > DR_LASTADDR)
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return -1;
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read_write_bits = (rw & 1) ? DR_RW_READ : DR_RW_WRITE;
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if (len == 1)
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len_bits = DR_LEN_1;
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else if (len == 2)
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{
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if (addr % 2)
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return i386_insert_nonaligned_watchpoint (pid, waddr, addr, len, rw);
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len_bits = DR_LEN_2;
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}
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else if (len == 4)
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{
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if (addr % 4)
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return i386_insert_nonaligned_watchpoint (pid, waddr, addr, len, rw);
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len_bits = DR_LEN_4;
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}
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else
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return i386_insert_nonaligned_watchpoint (pid, waddr, addr, len, rw);
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free_debug_register = i;
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register_number = free_debug_register - DR_FIRSTADDR;
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debug_control_mirror |=
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((read_write_bits | len_bits)
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<< (DR_CONTROL_SHIFT + DR_CONTROL_SIZE * register_number));
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debug_control_mirror |=
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(1 << (DR_LOCAL_ENABLE_SHIFT + DR_ENABLE_SIZE * register_number));
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debug_control_mirror |= DR_LOCAL_SLOWDOWN;
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debug_control_mirror &= ~DR_CONTROL_RESERVED;
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ptrace (6, pid, offsetof (struct user, u_debugreg[DR_CONTROL]),
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debug_control_mirror);
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ptrace (6, pid, offsetof (struct user, u_debugreg[free_debug_register]),
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addr);
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/* Record where we came from. */
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address_lookup[register_number] = addr;
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return 0;
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}
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static int
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i386_insert_nonaligned_watchpoint (int pid, CORE_ADDR waddr, CORE_ADDR addr,
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int len, int rw)
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{
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int align;
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int size;
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int rv;
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static int size_try_array[4][4] =
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{
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{ 1, 1, 1, 1 }, /* trying size one */
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{ 2, 1, 2, 1 }, /* trying size two */
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{ 2, 1, 2, 1 }, /* trying size three */
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{ 4, 1, 2, 1 } /* trying size four */
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};
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rv = 0;
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while (len > 0)
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{
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align = addr % 4;
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/* Four is the maximum length for 386. */
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size = size_try_array[len > 4 ? 3 : len - 1][align];
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rv = i386_insert_aligned_watchpoint (pid, waddr, addr, size, rw);
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if (rv)
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{
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i386_remove_watchpoint (pid, waddr, size);
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return rv;
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}
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addr += size;
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len -= size;
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}
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return rv;
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}
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/* Remove a watchpoint. */
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int
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i386_remove_watchpoint (int pid, CORE_ADDR addr, int len)
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{
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int i;
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int register_number;
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for (i = DR_FIRSTADDR; i <= DR_LASTADDR; i++)
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{
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register_number = i - DR_FIRSTADDR;
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if (address_lookup[register_number] == addr)
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{
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debug_control_mirror &=
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~(1 << (DR_LOCAL_ENABLE_SHIFT + DR_ENABLE_SIZE * register_number));
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address_lookup[register_number] = 0;
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}
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}
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ptrace (6, pid, offsetof (struct user, u_debugreg[DR_CONTROL]),
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debug_control_mirror);
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ptrace (6, pid, offsetof (struct user, u_debugreg[DR_STATUS]), 0);
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return 0;
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}
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/* Check if stopped by a watchpoint. */
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CORE_ADDR
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i386_stopped_by_watchpoint (int pid)
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{
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int i;
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int status;
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status = ptrace (3, pid, offsetof (struct user, u_debugreg[DR_STATUS]), 0);
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ptrace (6, pid, offsetof (struct user, u_debugreg[DR_STATUS]), 0);
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for (i = DR_FIRSTADDR; i <= DR_LASTADDR; i++)
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{
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if (status & (1 << (i - DR_FIRSTADDR)))
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return address_lookup[i - DR_FIRSTADDR];
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}
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return 0;
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}
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#endif /* TARGET_HAS_HARDWARE_WATCHPOINTS */
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