c8e98e3692
This patch adds the new instruction and relocation as per proposal: https://openrisc.io/proposals/ladrp This is to be added to the spec in an upcoming revision. The new instruction l.adrp loads the page offset of the current instruction offset by a 21-bit immediate shifted left 13-bits. This is meant to be used with a 13-bit lower bit page offset. This allows us to free up the got register r16. l.adrp r3, foo l.ori r4, r3, po(foo) l.lbz r5, po(foo)(r3) l.sb po(foo)(r3), r6 The relocations we add are: - BFD_RELOC_OR1K_PLTA26 For PLT jump relocation with PLT entry asm: plta() implemented using l.ardp, meaning no need for r16 (the GOT reg) - BFD_RELOC_OR1K_GOT_PG21 Upper 21-bit Page offset got address asm: got() - BFD_RELOC_OR1K_TLS_GD_PG21 Upper 21-bit Page offset with TLS General asm: tlsgd() Dynamic calculation - BFD_RELOC_OR1K_TLS_LDM_PG21 Upper 21-bit Page offset with TLS local asm: tlsldm() dynamic calculation - BFD_RELOC_OR1K_TLS_IE_PG21 Upper 21-bit Page offset with TLS Initial asm: gottp() Executable calculation - BFD_RELOC_OR1K_PCREL_PG21 Default relocation for disp21 (l.adrp instructions) - BFD_RELOC_OR1K_LO13 low 13-bit page offset relocation asm: po() i.e. mem loads, addi etc - BFD_RELOC_OR1K_SLO13 low 13-bit page offset relocation asm: po() i.e. mem stores, with split immediate - BFD_RELOC_OR1K_GOT_LO13, low 13-bit page offset with GOT calcs asm: gotpo() - BFD_RELOC_OR1K_TLS_GD_LO13 Lower 13-bit offset with TLS GD calcs asm: tlsgdpo() - BFD_RELOC_OR1K_TLS_LDM_LO13 Lower 13-bit offset with TLS LD calcs asm: tlsldmpo() - BFD_RELOC_OR1K_TLS_IE_LO13 Lower 13-bit offset with TLS IE calcs asm: gottppo() bfd/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * bfd-in2.h: Regenerated. * elf32-or1k.c: (or1k_elf_howto_table): Fix formatting for R_OR1K_PLT26, Add R_OR1K_PCREL_PG21, R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21, R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13, R_OR1K_SLO13, R_OR1K_PLTA26. (or1k_reloc_map): Add BFD_RELOC_OR1K_PCREL_PG21, BFD_RELOC_OR1K_GOT_PG21, BFD_RELOC_OR1K_TLS_GD_PG21, BFD_RELOC_OR1K_TLS_LDM_PG21, BFD_RELOC_OR1K_TLS_IE_PG21, BFD_RELOC_OR1K_LO13, BFD_RELOC_OR1K_GOT_LO13, BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_LDM_LO13, BFD_RELOC_OR1K_TLS_IE_LO13, BFD_RELOC_OR1K_SLO13, BFD_RELOC_OR1K_PLTA26. (elf_or1k_link_hash_table): Add field saw_plta. (or1k_final_link_relocate): Add value calculations for new relocations. (or1k_elf_relocate_section): Add section relocations for new relocations. (or1k_write_plt_entry): New function. (or1k_elf_finish_dynamic_sections): Add support for PLTA relocations using new l.adrp instruction. Cleanup PLT relocation code generation. * libbfd.h: Regenerated. * reloc.c: Add BFD_RELOC_OR1K_PCREL_PG21, BFD_RELOC_OR1K_LO13, BFD_RELOC_OR1K_SLO13, BFD_RELOC_OR1K_GOT_PG21, BFD_RELOC_OR1K_GOT_LO13, BFD_RELOC_OR1K_PLTA26, BFD_RELOC_OR1K_TLS_GD_PG21, BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_LDM_PG21, BFD_RELOC_OR1K_TLS_LDM_LO13, BFD_RELOC_OR1K_TLS_IE_PG21, BFD_RELOC_OR1K_TLS_IE_LO13. cpu/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * or1k.opc (parse_disp26): Add support for plta() relocations. (parse_disp21): New function. (or1k_rclass): New enum. (or1k_rtype): New enum. (or1k_imm16_relocs): Define new PO and SPO relocation mappings. (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations. (parse_imm16): Add support for the new 21bit and 13bit relocations. * or1korbis.cpu (f-disp26): Don't assume SI. (f-disp21): New pc-relative 21-bit 13 shifted to right. (insn-opcode): Add ADRP. (l-adrp): New instruction. gas/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * config/tc-or1k.c (or1k_apply_fix): Add BFD_RELOC_OR1K_TLS_GD_PG21, BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_LDM_PG21, BFD_RELOC_OR1K_TLS_LDM_LO13, BFD_RELOC_OR1K_TLS_IE_PG21, BFD_RELOC_OR1K_TLS_IE_LO13. * testsuite/gas/or1k/allinsn.s: Add test for l.adrp. * testsuite/gas/or1k/allinsn.d: Add test results for new instructions. * testsuite/gas/or1k/reloc-1.s: Add tests to generate R_OR1K_PLTA26, R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21, R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13, R_OR1K_TLD_LDM_LO13, R_OR1K_TLS_IE_LO13, R_OR1K_LO13, R_OR1K_SLO13 relocations. * testsuite/gas/or1k/reloc-1.d: Add relocation results for tests. * testsuite/gas/or1k/reloc-2.s: Add negative tests for store to gotpo(). * testsuite/gas/or1k/reloc-2.l: Add expected error test results. ld/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * testsuite/ld-or1k/or1k.exp: Add test cases for plt generation. * testsuite/ld-or1k/plt1.dd: New file. * testsuite/ld-or1k/plt1.s: New file. * testsuite/ld-or1k/plt1.x.dd: New file. * testsuite/ld-or1k/plta1.dd: New file. * testsuite/ld-or1k/plta1.s: New file. * testsuite/ld-or1k/pltlib.s: New file. include/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21, R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21, R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13, R_OR1K_SLO13, R_OR1K_PLTA26. opcodes/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * or1k-asm.c: Regenerated. * or1k-desc.c: Regenerated. * or1k-desc.h: Regenerated. * or1k-dis.c: Regenerated. * or1k-ibld.c: Regenerated. * or1k-opc.c: Regenerated. * or1k-opc.h: Regenerated. * or1k-opinst.c: Regenerated.
922 lines
24 KiB
C
922 lines
24 KiB
C
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Assembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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- the resultant file is machine generated, cgen-asm.in isn't
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Copyright (C) 1996-2018 Free Software Foundation, Inc.
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This file is part of libopcodes.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
|
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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|
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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/* ??? Eventually more and more of this stuff can go to cpu-independent files.
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Keep that in mind. */
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#include "sysdep.h"
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#include <stdio.h>
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#include "ansidecl.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "or1k-desc.h"
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#include "or1k-opc.h"
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#include "opintl.h"
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#include "xregex.h"
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#include "libiberty.h"
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#include "safe-ctype.h"
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#undef min
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#define min(a,b) ((a) < (b) ? (a) : (b))
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#undef max
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#define max(a,b) ((a) > (b) ? (a) : (b))
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static const char * parse_insn_normal
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(CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
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/* -- assembler routines inserted here. */
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/* -- asm.c */
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static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
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static const char * INVALID_STORE_RELOC = N_("relocation invalid for store");
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static const char * INVALID_RELOC_TYPE = N_("internal relocation type invalid");
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#define CGEN_VERBOSE_ASSEMBLER_ERRORS
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static const char *
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parse_disp26 (CGEN_CPU_DESC cd,
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const char ** strp,
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int opindex,
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int opinfo ATTRIBUTE_UNUSED,
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enum cgen_parse_operand_result * resultp,
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bfd_vma * valuep)
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{
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const char *str = *strp;
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const char *errmsg = NULL;
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bfd_reloc_code_real_type reloc = BFD_RELOC_OR1K_REL_26;
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if (strncasecmp (str, "plta(", 5) == 0)
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{
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*strp = str + 5;
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reloc = BFD_RELOC_OR1K_PLTA26;
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}
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else if (strncasecmp (str, "plt(", 4) == 0)
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{
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*strp = str + 4;
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reloc = BFD_RELOC_OR1K_PLT26;
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}
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errmsg = cgen_parse_address (cd, strp, opindex, reloc, resultp, valuep);
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if (reloc != BFD_RELOC_OR1K_REL_26)
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{
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if (**strp != ')')
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errmsg = MISSING_CLOSING_PARENTHESIS;
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else
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++*strp;
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}
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return errmsg;
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}
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static const char *
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parse_disp21 (CGEN_CPU_DESC cd,
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const char ** strp,
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int opindex,
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int opinfo ATTRIBUTE_UNUSED,
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enum cgen_parse_operand_result * resultp,
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bfd_vma * valuep)
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{
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const char *str = *strp;
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const char *errmsg = NULL;
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bfd_reloc_code_real_type reloc = BFD_RELOC_OR1K_PCREL_PG21;
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if (strncasecmp (str, "got(", 4) == 0)
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{
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*strp = str + 4;
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reloc = BFD_RELOC_OR1K_GOT_PG21;
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}
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else if (strncasecmp (str, "tlsgd(", 6) == 0)
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{
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*strp = str + 6;
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reloc = BFD_RELOC_OR1K_TLS_GD_PG21;
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}
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else if (strncasecmp (str, "tlsldm(", 7) == 0)
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{
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*strp = str + 7;
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reloc = BFD_RELOC_OR1K_TLS_LDM_PG21;
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}
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else if (strncasecmp (str, "gottp(", 6) == 0)
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{
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*strp = str + 6;
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reloc = BFD_RELOC_OR1K_TLS_IE_PG21;
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}
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errmsg = cgen_parse_address (cd, strp, opindex, reloc, resultp, valuep);
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if (reloc != BFD_RELOC_OR1K_PCREL_PG21)
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{
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if (**strp != ')')
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errmsg = MISSING_CLOSING_PARENTHESIS;
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else
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++*strp;
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}
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return errmsg;
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}
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enum or1k_rclass
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{
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RCLASS_DIRECT = 0,
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RCLASS_GOT = 1,
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RCLASS_GOTPC = 2,
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RCLASS_GOTOFF = 3,
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RCLASS_TLSGD = 4,
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RCLASS_TLSLDM = 5,
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RCLASS_DTPOFF = 6,
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RCLASS_GOTTPOFF = 7,
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RCLASS_TPOFF = 8,
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};
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enum or1k_rtype
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{
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RTYPE_LO = 0,
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RTYPE_SLO = 1,
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RTYPE_PO = 2,
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RTYPE_SPO = 3,
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RTYPE_HI = 4,
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RTYPE_AHI = 5,
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};
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#define RCLASS_SHIFT 3
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#define RTYPE_MASK 7
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static const bfd_reloc_code_real_type or1k_imm16_relocs[][6] = {
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{ BFD_RELOC_LO16,
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BFD_RELOC_OR1K_SLO16,
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BFD_RELOC_OR1K_LO13,
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BFD_RELOC_OR1K_SLO13,
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BFD_RELOC_HI16,
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BFD_RELOC_HI16_S, },
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{ BFD_RELOC_OR1K_GOT16,
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BFD_RELOC_UNUSED,
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BFD_RELOC_OR1K_GOT_LO13,
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BFD_RELOC_UNUSED,
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BFD_RELOC_UNUSED,
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BFD_RELOC_UNUSED },
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{ BFD_RELOC_OR1K_GOTPC_LO16,
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BFD_RELOC_UNUSED,
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BFD_RELOC_UNUSED,
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BFD_RELOC_UNUSED,
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BFD_RELOC_OR1K_GOTPC_HI16,
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BFD_RELOC_UNUSED },
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{ BFD_RELOC_LO16_GOTOFF,
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BFD_RELOC_OR1K_GOTOFF_SLO16,
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BFD_RELOC_UNUSED,
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BFD_RELOC_UNUSED,
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BFD_RELOC_HI16_GOTOFF,
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BFD_RELOC_HI16_S_GOTOFF },
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{ BFD_RELOC_OR1K_TLS_GD_LO16,
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BFD_RELOC_UNUSED,
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BFD_RELOC_OR1K_TLS_GD_LO13,
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BFD_RELOC_UNUSED,
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BFD_RELOC_OR1K_TLS_GD_HI16,
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BFD_RELOC_UNUSED },
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{ BFD_RELOC_OR1K_TLS_LDM_LO16,
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BFD_RELOC_UNUSED,
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BFD_RELOC_OR1K_TLS_LDM_LO13,
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BFD_RELOC_UNUSED,
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BFD_RELOC_OR1K_TLS_LDM_HI16,
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BFD_RELOC_UNUSED },
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{ BFD_RELOC_OR1K_TLS_LDO_LO16,
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BFD_RELOC_UNUSED,
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BFD_RELOC_UNUSED,
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BFD_RELOC_UNUSED,
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BFD_RELOC_OR1K_TLS_LDO_HI16,
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BFD_RELOC_UNUSED },
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{ BFD_RELOC_OR1K_TLS_IE_LO16,
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BFD_RELOC_UNUSED,
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BFD_RELOC_OR1K_TLS_IE_LO13,
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BFD_RELOC_UNUSED,
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BFD_RELOC_OR1K_TLS_IE_HI16,
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BFD_RELOC_OR1K_TLS_IE_AHI16 },
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{ BFD_RELOC_OR1K_TLS_LE_LO16,
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BFD_RELOC_OR1K_TLS_LE_SLO16,
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BFD_RELOC_UNUSED,
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BFD_RELOC_UNUSED,
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BFD_RELOC_OR1K_TLS_LE_HI16,
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BFD_RELOC_OR1K_TLS_LE_AHI16 },
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};
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static int
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parse_reloc (const char **strp)
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{
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const char *str = *strp;
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enum or1k_rclass cls = RCLASS_DIRECT;
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enum or1k_rtype typ;
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if (strncasecmp (str, "got(", 4) == 0)
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{
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*strp = str + 4;
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return (RCLASS_GOT << RCLASS_SHIFT) | RTYPE_LO;
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}
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if (strncasecmp (str, "gotpo(", 6) == 0)
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{
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*strp = str + 6;
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return (RCLASS_GOT << RCLASS_SHIFT) | RTYPE_PO;
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}
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if (strncasecmp (str, "gottppo(", 8) == 0)
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{
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*strp = str + 8;
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return (RCLASS_GOTTPOFF << RCLASS_SHIFT) | RTYPE_PO;
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}
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if (strncasecmp (str, "gotpc", 5) == 0)
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{
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str += 5;
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cls = RCLASS_GOTPC;
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}
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else if (strncasecmp (str, "gotoff", 6) == 0)
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{
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str += 6;
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cls = RCLASS_GOTOFF;
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}
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else if (strncasecmp (str, "tlsgd", 5) == 0)
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{
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str += 5;
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cls = RCLASS_TLSGD;
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}
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else if (strncasecmp (str, "tlsldm", 6) == 0)
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{
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str += 6;
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cls = RCLASS_TLSLDM;
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}
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else if (strncasecmp (str, "dtpoff", 6) == 0)
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{
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str += 6;
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cls = RCLASS_DTPOFF;
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}
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else if (strncasecmp (str, "gottpoff", 8) == 0)
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{
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str += 8;
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cls = RCLASS_GOTTPOFF;
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}
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else if (strncasecmp (str, "tpoff", 5) == 0)
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{
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str += 5;
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cls = RCLASS_TPOFF;
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}
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if (strncasecmp (str, "hi(", 3) == 0)
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{
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str += 3;
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typ = RTYPE_HI;
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}
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else if (strncasecmp (str, "lo(", 3) == 0)
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{
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str += 3;
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typ = RTYPE_LO;
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}
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else if (strncasecmp (str, "ha(", 3) == 0)
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{
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str += 3;
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typ = RTYPE_AHI;
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}
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else if (strncasecmp (str, "po(", 3) == 0 && cls != RCLASS_GOTTPOFF)
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{
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str += 3;
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typ = RTYPE_PO;
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}
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else
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return -1;
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||
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*strp = str;
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return (cls << RCLASS_SHIFT) | typ;
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||
}
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||
|
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static const char *
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parse_imm16 (CGEN_CPU_DESC cd, const char **strp, int opindex,
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long *valuep, int splitp)
|
||
{
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const char *errmsg;
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enum cgen_parse_operand_result result_type;
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bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
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enum or1k_rtype reloc_type;
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int reloc_code;
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bfd_vma ret;
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||
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if (**strp == '#')
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++*strp;
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reloc_code = parse_reloc (strp);
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reloc_type = reloc_code & RTYPE_MASK;
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if (reloc_code >= 0)
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{
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enum or1k_rclass reloc_class = reloc_code >> RCLASS_SHIFT;
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if (splitp)
|
||
{
|
||
if ((reloc_type == RTYPE_LO || reloc_type == RTYPE_PO)
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&& reloc_class != RCLASS_GOT)
|
||
/* If split we or up the type to RTYPE_SLO or RTYPE_SPO. */
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reloc_type |= 1;
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else
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return INVALID_STORE_RELOC;
|
||
}
|
||
reloc = or1k_imm16_relocs[reloc_class][reloc_type];
|
||
}
|
||
|
||
if (reloc != BFD_RELOC_UNUSED)
|
||
{
|
||
bfd_vma value;
|
||
|
||
errmsg = cgen_parse_address (cd, strp, opindex, reloc,
|
||
&result_type, &value);
|
||
if (**strp != ')')
|
||
errmsg = MISSING_CLOSING_PARENTHESIS;
|
||
++*strp;
|
||
|
||
ret = value;
|
||
|
||
if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
|
||
switch (reloc_type)
|
||
{
|
||
case RTYPE_AHI:
|
||
ret += 0x8000;
|
||
/* FALLTHRU */
|
||
case RTYPE_HI:
|
||
ret >>= 16;
|
||
/* FALLTHRU */
|
||
case RTYPE_LO:
|
||
case RTYPE_SLO:
|
||
ret &= 0xffff;
|
||
ret = (ret ^ 0x8000) - 0x8000;
|
||
break;
|
||
case RTYPE_PO:
|
||
case RTYPE_SPO:
|
||
ret &= 0x1fff;
|
||
break;
|
||
default:
|
||
errmsg = INVALID_RELOC_TYPE;
|
||
}
|
||
}
|
||
else
|
||
{
|
||
long value;
|
||
errmsg = cgen_parse_signed_integer (cd, strp, opindex, &value);
|
||
ret = value;
|
||
}
|
||
|
||
if (errmsg == NULL)
|
||
*valuep = ret;
|
||
|
||
return errmsg;
|
||
}
|
||
|
||
static const char *
|
||
parse_simm16 (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep)
|
||
{
|
||
return parse_imm16(cd, strp, opindex, (long *) valuep, 0);
|
||
}
|
||
|
||
static const char *
|
||
parse_simm16_split (CGEN_CPU_DESC cd, const char **strp, int opindex,
|
||
long *valuep)
|
||
{
|
||
return parse_imm16(cd, strp, opindex, (long *) valuep, 1);
|
||
}
|
||
|
||
static const char *
|
||
parse_uimm16 (CGEN_CPU_DESC cd, const char **strp, int opindex,
|
||
unsigned long *valuep)
|
||
{
|
||
const char *errmsg = parse_imm16(cd, strp, opindex, (long *) valuep, 0);
|
||
if (errmsg == NULL)
|
||
*valuep &= 0xffff;
|
||
return errmsg;
|
||
}
|
||
|
||
static const char *
|
||
parse_uimm16_split (CGEN_CPU_DESC cd, const char **strp, int opindex,
|
||
unsigned long *valuep)
|
||
{
|
||
const char *errmsg = parse_imm16(cd, strp, opindex, (long *) valuep, 1);
|
||
if (errmsg == NULL)
|
||
*valuep &= 0xffff;
|
||
return errmsg;
|
||
}
|
||
|
||
/* -- */
|
||
|
||
const char * or1k_cgen_parse_operand
|
||
(CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
|
||
|
||
/* Main entry point for operand parsing.
|
||
|
||
This function is basically just a big switch statement. Earlier versions
|
||
used tables to look up the function to use, but
|
||
- if the table contains both assembler and disassembler functions then
|
||
the disassembler contains much of the assembler and vice-versa,
|
||
- there's a lot of inlining possibilities as things grow,
|
||
- using a switch statement avoids the function call overhead.
|
||
|
||
This function could be moved into `parse_insn_normal', but keeping it
|
||
separate makes clear the interface between `parse_insn_normal' and each of
|
||
the handlers. */
|
||
|
||
const char *
|
||
or1k_cgen_parse_operand (CGEN_CPU_DESC cd,
|
||
int opindex,
|
||
const char ** strp,
|
||
CGEN_FIELDS * fields)
|
||
{
|
||
const char * errmsg = NULL;
|
||
/* Used by scalar operands that still need to be parsed. */
|
||
long junk ATTRIBUTE_UNUSED;
|
||
|
||
switch (opindex)
|
||
{
|
||
case OR1K_OPERAND_DISP21 :
|
||
{
|
||
bfd_vma value = 0;
|
||
errmsg = parse_disp21 (cd, strp, OR1K_OPERAND_DISP21, 0, NULL, & value);
|
||
fields->f_disp21 = value;
|
||
}
|
||
break;
|
||
case OR1K_OPERAND_DISP26 :
|
||
{
|
||
bfd_vma value = 0;
|
||
errmsg = parse_disp26 (cd, strp, OR1K_OPERAND_DISP26, 0, NULL, & value);
|
||
fields->f_disp26 = value;
|
||
}
|
||
break;
|
||
case OR1K_OPERAND_RA :
|
||
errmsg = cgen_parse_keyword (cd, strp, & or1k_cgen_opval_h_gpr, & fields->f_r2);
|
||
break;
|
||
case OR1K_OPERAND_RADF :
|
||
errmsg = cgen_parse_keyword (cd, strp, & or1k_cgen_opval_h_fdr, & fields->f_r1);
|
||
break;
|
||
case OR1K_OPERAND_RASF :
|
||
errmsg = cgen_parse_keyword (cd, strp, & or1k_cgen_opval_h_fsr, & fields->f_r2);
|
||
break;
|
||
case OR1K_OPERAND_RB :
|
||
errmsg = cgen_parse_keyword (cd, strp, & or1k_cgen_opval_h_gpr, & fields->f_r3);
|
||
break;
|
||
case OR1K_OPERAND_RBDF :
|
||
errmsg = cgen_parse_keyword (cd, strp, & or1k_cgen_opval_h_fdr, & fields->f_r1);
|
||
break;
|
||
case OR1K_OPERAND_RBSF :
|
||
errmsg = cgen_parse_keyword (cd, strp, & or1k_cgen_opval_h_fsr, & fields->f_r3);
|
||
break;
|
||
case OR1K_OPERAND_RD :
|
||
errmsg = cgen_parse_keyword (cd, strp, & or1k_cgen_opval_h_gpr, & fields->f_r1);
|
||
break;
|
||
case OR1K_OPERAND_RDDF :
|
||
errmsg = cgen_parse_keyword (cd, strp, & or1k_cgen_opval_h_fdr, & fields->f_r1);
|
||
break;
|
||
case OR1K_OPERAND_RDSF :
|
||
errmsg = cgen_parse_keyword (cd, strp, & or1k_cgen_opval_h_fsr, & fields->f_r1);
|
||
break;
|
||
case OR1K_OPERAND_SIMM16 :
|
||
errmsg = parse_simm16 (cd, strp, OR1K_OPERAND_SIMM16, (long *) (& fields->f_simm16));
|
||
break;
|
||
case OR1K_OPERAND_SIMM16_SPLIT :
|
||
errmsg = parse_simm16_split (cd, strp, OR1K_OPERAND_SIMM16_SPLIT, (long *) (& fields->f_simm16_split));
|
||
break;
|
||
case OR1K_OPERAND_UIMM16 :
|
||
errmsg = parse_uimm16 (cd, strp, OR1K_OPERAND_UIMM16, (unsigned long *) (& fields->f_uimm16));
|
||
break;
|
||
case OR1K_OPERAND_UIMM16_SPLIT :
|
||
errmsg = parse_uimm16_split (cd, strp, OR1K_OPERAND_UIMM16_SPLIT, (unsigned long *) (& fields->f_uimm16_split));
|
||
break;
|
||
case OR1K_OPERAND_UIMM6 :
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, OR1K_OPERAND_UIMM6, (unsigned long *) (& fields->f_uimm6));
|
||
break;
|
||
|
||
default :
|
||
/* xgettext:c-format */
|
||
opcodes_error_handler
|
||
(_("internal error: unrecognized field %d while parsing"),
|
||
opindex);
|
||
abort ();
|
||
}
|
||
|
||
return errmsg;
|
||
}
|
||
|
||
cgen_parse_fn * const or1k_cgen_parse_handlers[] =
|
||
{
|
||
parse_insn_normal,
|
||
};
|
||
|
||
void
|
||
or1k_cgen_init_asm (CGEN_CPU_DESC cd)
|
||
{
|
||
or1k_cgen_init_opcode_table (cd);
|
||
or1k_cgen_init_ibld_table (cd);
|
||
cd->parse_handlers = & or1k_cgen_parse_handlers[0];
|
||
cd->parse_operand = or1k_cgen_parse_operand;
|
||
#ifdef CGEN_ASM_INIT_HOOK
|
||
CGEN_ASM_INIT_HOOK
|
||
#endif
|
||
}
|
||
|
||
|
||
|
||
/* Regex construction routine.
|
||
|
||
This translates an opcode syntax string into a regex string,
|
||
by replacing any non-character syntax element (such as an
|
||
opcode) with the pattern '.*'
|
||
|
||
It then compiles the regex and stores it in the opcode, for
|
||
later use by or1k_cgen_assemble_insn
|
||
|
||
Returns NULL for success, an error message for failure. */
|
||
|
||
char *
|
||
or1k_cgen_build_insn_regex (CGEN_INSN *insn)
|
||
{
|
||
CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
|
||
const char *mnem = CGEN_INSN_MNEMONIC (insn);
|
||
char rxbuf[CGEN_MAX_RX_ELEMENTS];
|
||
char *rx = rxbuf;
|
||
const CGEN_SYNTAX_CHAR_TYPE *syn;
|
||
int reg_err;
|
||
|
||
syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
|
||
|
||
/* Mnemonics come first in the syntax string. */
|
||
if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
|
||
return _("missing mnemonic in syntax string");
|
||
++syn;
|
||
|
||
/* Generate a case sensitive regular expression that emulates case
|
||
insensitive matching in the "C" locale. We cannot generate a case
|
||
insensitive regular expression because in Turkish locales, 'i' and 'I'
|
||
are not equal modulo case conversion. */
|
||
|
||
/* Copy the literal mnemonic out of the insn. */
|
||
for (; *mnem; mnem++)
|
||
{
|
||
char c = *mnem;
|
||
|
||
if (ISALPHA (c))
|
||
{
|
||
*rx++ = '[';
|
||
*rx++ = TOLOWER (c);
|
||
*rx++ = TOUPPER (c);
|
||
*rx++ = ']';
|
||
}
|
||
else
|
||
*rx++ = c;
|
||
}
|
||
|
||
/* Copy any remaining literals from the syntax string into the rx. */
|
||
for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
|
||
{
|
||
if (CGEN_SYNTAX_CHAR_P (* syn))
|
||
{
|
||
char c = CGEN_SYNTAX_CHAR (* syn);
|
||
|
||
switch (c)
|
||
{
|
||
/* Escape any regex metacharacters in the syntax. */
|
||
case '.': case '[': case '\\':
|
||
case '*': case '^': case '$':
|
||
|
||
#ifdef CGEN_ESCAPE_EXTENDED_REGEX
|
||
case '?': case '{': case '}':
|
||
case '(': case ')': case '*':
|
||
case '|': case '+': case ']':
|
||
#endif
|
||
*rx++ = '\\';
|
||
*rx++ = c;
|
||
break;
|
||
|
||
default:
|
||
if (ISALPHA (c))
|
||
{
|
||
*rx++ = '[';
|
||
*rx++ = TOLOWER (c);
|
||
*rx++ = TOUPPER (c);
|
||
*rx++ = ']';
|
||
}
|
||
else
|
||
*rx++ = c;
|
||
break;
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Replace non-syntax fields with globs. */
|
||
*rx++ = '.';
|
||
*rx++ = '*';
|
||
}
|
||
}
|
||
|
||
/* Trailing whitespace ok. */
|
||
* rx++ = '[';
|
||
* rx++ = ' ';
|
||
* rx++ = '\t';
|
||
* rx++ = ']';
|
||
* rx++ = '*';
|
||
|
||
/* But anchor it after that. */
|
||
* rx++ = '$';
|
||
* rx = '\0';
|
||
|
||
CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
|
||
reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
|
||
|
||
if (reg_err == 0)
|
||
return NULL;
|
||
else
|
||
{
|
||
static char msg[80];
|
||
|
||
regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
|
||
regfree ((regex_t *) CGEN_INSN_RX (insn));
|
||
free (CGEN_INSN_RX (insn));
|
||
(CGEN_INSN_RX (insn)) = NULL;
|
||
return msg;
|
||
}
|
||
}
|
||
|
||
|
||
/* Default insn parser.
|
||
|
||
The syntax string is scanned and operands are parsed and stored in FIELDS.
|
||
Relocs are queued as we go via other callbacks.
|
||
|
||
??? Note that this is currently an all-or-nothing parser. If we fail to
|
||
parse the instruction, we return 0 and the caller will start over from
|
||
the beginning. Backtracking will be necessary in parsing subexpressions,
|
||
but that can be handled there. Not handling backtracking here may get
|
||
expensive in the case of the m68k. Deal with later.
|
||
|
||
Returns NULL for success, an error message for failure. */
|
||
|
||
static const char *
|
||
parse_insn_normal (CGEN_CPU_DESC cd,
|
||
const CGEN_INSN *insn,
|
||
const char **strp,
|
||
CGEN_FIELDS *fields)
|
||
{
|
||
/* ??? Runtime added insns not handled yet. */
|
||
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
|
||
const char *str = *strp;
|
||
const char *errmsg;
|
||
const char *p;
|
||
const CGEN_SYNTAX_CHAR_TYPE * syn;
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
/* FIXME: wip */
|
||
int past_opcode_p;
|
||
#endif
|
||
|
||
/* For now we assume the mnemonic is first (there are no leading operands).
|
||
We can parse it without needing to set up operand parsing.
|
||
GAS's input scrubber will ensure mnemonics are lowercase, but we may
|
||
not be called from GAS. */
|
||
p = CGEN_INSN_MNEMONIC (insn);
|
||
while (*p && TOLOWER (*p) == TOLOWER (*str))
|
||
++p, ++str;
|
||
|
||
if (* p)
|
||
return _("unrecognized instruction");
|
||
|
||
#ifndef CGEN_MNEMONIC_OPERANDS
|
||
if (* str && ! ISSPACE (* str))
|
||
return _("unrecognized instruction");
|
||
#endif
|
||
|
||
CGEN_INIT_PARSE (cd);
|
||
cgen_init_parse_operand (cd);
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
past_opcode_p = 0;
|
||
#endif
|
||
|
||
/* We don't check for (*str != '\0') here because we want to parse
|
||
any trailing fake arguments in the syntax string. */
|
||
syn = CGEN_SYNTAX_STRING (syntax);
|
||
|
||
/* Mnemonics come first for now, ensure valid string. */
|
||
if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
|
||
abort ();
|
||
|
||
++syn;
|
||
|
||
while (* syn != 0)
|
||
{
|
||
/* Non operand chars must match exactly. */
|
||
if (CGEN_SYNTAX_CHAR_P (* syn))
|
||
{
|
||
/* FIXME: While we allow for non-GAS callers above, we assume the
|
||
first char after the mnemonic part is a space. */
|
||
/* FIXME: We also take inappropriate advantage of the fact that
|
||
GAS's input scrubber will remove extraneous blanks. */
|
||
if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
|
||
{
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
if (CGEN_SYNTAX_CHAR(* syn) == ' ')
|
||
past_opcode_p = 1;
|
||
#endif
|
||
++ syn;
|
||
++ str;
|
||
}
|
||
else if (*str)
|
||
{
|
||
/* Syntax char didn't match. Can't be this insn. */
|
||
static char msg [80];
|
||
|
||
/* xgettext:c-format */
|
||
sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
|
||
CGEN_SYNTAX_CHAR(*syn), *str);
|
||
return msg;
|
||
}
|
||
else
|
||
{
|
||
/* Ran out of input. */
|
||
static char msg [80];
|
||
|
||
/* xgettext:c-format */
|
||
sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
|
||
CGEN_SYNTAX_CHAR(*syn));
|
||
return msg;
|
||
}
|
||
continue;
|
||
}
|
||
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
(void) past_opcode_p;
|
||
#endif
|
||
/* We have an operand of some sort. */
|
||
errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields);
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
/* Done with this operand, continue with next one. */
|
||
++ syn;
|
||
}
|
||
|
||
/* If we're at the end of the syntax string, we're done. */
|
||
if (* syn == 0)
|
||
{
|
||
/* FIXME: For the moment we assume a valid `str' can only contain
|
||
blanks now. IE: We needn't try again with a longer version of
|
||
the insn and it is assumed that longer versions of insns appear
|
||
before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
|
||
while (ISSPACE (* str))
|
||
++ str;
|
||
|
||
if (* str != '\0')
|
||
return _("junk at end of line"); /* FIXME: would like to include `str' */
|
||
|
||
return NULL;
|
||
}
|
||
|
||
/* We couldn't parse it. */
|
||
return _("unrecognized instruction");
|
||
}
|
||
|
||
/* Main entry point.
|
||
This routine is called for each instruction to be assembled.
|
||
STR points to the insn to be assembled.
|
||
We assume all necessary tables have been initialized.
|
||
The assembled instruction, less any fixups, is stored in BUF.
|
||
Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
|
||
still needs to be converted to target byte order, otherwise BUF is an array
|
||
of bytes in target byte order.
|
||
The result is a pointer to the insn's entry in the opcode table,
|
||
or NULL if an error occured (an error message will have already been
|
||
printed).
|
||
|
||
Note that when processing (non-alias) macro-insns,
|
||
this function recurses.
|
||
|
||
??? It's possible to make this cpu-independent.
|
||
One would have to deal with a few minor things.
|
||
At this point in time doing so would be more of a curiosity than useful
|
||
[for example this file isn't _that_ big], but keeping the possibility in
|
||
mind helps keep the design clean. */
|
||
|
||
const CGEN_INSN *
|
||
or1k_cgen_assemble_insn (CGEN_CPU_DESC cd,
|
||
const char *str,
|
||
CGEN_FIELDS *fields,
|
||
CGEN_INSN_BYTES_PTR buf,
|
||
char **errmsg)
|
||
{
|
||
const char *start;
|
||
CGEN_INSN_LIST *ilist;
|
||
const char *parse_errmsg = NULL;
|
||
const char *insert_errmsg = NULL;
|
||
int recognized_mnemonic = 0;
|
||
|
||
/* Skip leading white space. */
|
||
while (ISSPACE (* str))
|
||
++ str;
|
||
|
||
/* The instructions are stored in hashed lists.
|
||
Get the first in the list. */
|
||
ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
|
||
|
||
/* Keep looking until we find a match. */
|
||
start = str;
|
||
for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
|
||
{
|
||
const CGEN_INSN *insn = ilist->insn;
|
||
recognized_mnemonic = 1;
|
||
|
||
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
|
||
/* Not usually needed as unsupported opcodes
|
||
shouldn't be in the hash lists. */
|
||
/* Is this insn supported by the selected cpu? */
|
||
if (! or1k_cgen_insn_supported (cd, insn))
|
||
continue;
|
||
#endif
|
||
/* If the RELAXED attribute is set, this is an insn that shouldn't be
|
||
chosen immediately. Instead, it is used during assembler/linker
|
||
relaxation if possible. */
|
||
if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
|
||
continue;
|
||
|
||
str = start;
|
||
|
||
/* Skip this insn if str doesn't look right lexically. */
|
||
if (CGEN_INSN_RX (insn) != NULL &&
|
||
regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
|
||
continue;
|
||
|
||
/* Allow parse/insert handlers to obtain length of insn. */
|
||
CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
|
||
|
||
parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
|
||
if (parse_errmsg != NULL)
|
||
continue;
|
||
|
||
/* ??? 0 is passed for `pc'. */
|
||
insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
|
||
(bfd_vma) 0);
|
||
if (insert_errmsg != NULL)
|
||
continue;
|
||
|
||
/* It is up to the caller to actually output the insn and any
|
||
queued relocs. */
|
||
return insn;
|
||
}
|
||
|
||
{
|
||
static char errbuf[150];
|
||
const char *tmp_errmsg;
|
||
#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
|
||
#define be_verbose 1
|
||
#else
|
||
#define be_verbose 0
|
||
#endif
|
||
|
||
if (be_verbose)
|
||
{
|
||
/* If requesting verbose error messages, use insert_errmsg.
|
||
Failing that, use parse_errmsg. */
|
||
tmp_errmsg = (insert_errmsg ? insert_errmsg :
|
||
parse_errmsg ? parse_errmsg :
|
||
recognized_mnemonic ?
|
||
_("unrecognized form of instruction") :
|
||
_("unrecognized instruction"));
|
||
|
||
if (strlen (start) > 50)
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
|
||
else
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
|
||
}
|
||
else
|
||
{
|
||
if (strlen (start) > 50)
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, _("bad instruction `%.50s...'"), start);
|
||
else
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, _("bad instruction `%.50s'"), start);
|
||
}
|
||
|
||
*errmsg = errbuf;
|
||
return NULL;
|
||
}
|
||
}
|