462 lines
17 KiB
C
462 lines
17 KiB
C
/* tc-xtensa.h -- Header file for tc-xtensa.c.
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Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009
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Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#ifndef TC_XTENSA
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#define TC_XTENSA 1
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struct fix;
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#ifndef OBJ_ELF
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#error Xtensa support requires ELF object format
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#endif
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#include "xtensa-isa.h"
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#include "xtensa-config.h"
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#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
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/* Maximum number of opcode slots in a VLIW instruction. */
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#define MAX_SLOTS 15
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/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
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RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
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in the fr_var field. For the two exceptions, fr_var is a float value
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that records the frequency with which the following instruction is
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executed as a branch target. The aligner uses this information to
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tell which targets are most important to be aligned. */
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enum xtensa_relax_statesE
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{
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RELAX_XTENSA_NONE,
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RELAX_ALIGN_NEXT_OPCODE,
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/* Use the first opcode of the next fragment to determine the
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alignment requirements. This is ONLY used for LOOPs currently. */
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RELAX_CHECK_ALIGN_NEXT_OPCODE,
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/* The next non-empty frag contains a loop instruction. Check to see
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if it is correctly aligned, but do not align it. */
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RELAX_DESIRE_ALIGN_IF_TARGET,
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/* These are placed in front of labels and converted to either
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RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
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relaxation begins. */
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RELAX_ADD_NOP_IF_A0_B_RETW,
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/* These are placed in front of conditional branches. Before
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relaxation begins, they are turned into either NOPs for branches
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immediately followed by RETW or RETW.N or rs_fills of 0. This is
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used to avoid a hardware bug in some early versions of the
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processor. */
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RELAX_ADD_NOP_IF_PRE_LOOP_END,
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/* These are placed after JX instructions. Before relaxation begins,
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they are turned into either NOPs, if the JX is one instruction
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before a loop end label, or rs_fills of 0. This is used to avoid a
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hardware interlock issue prior to Xtensa version T1040. */
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RELAX_ADD_NOP_IF_SHORT_LOOP,
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/* These are placed after LOOP instructions and turned into NOPs when:
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(1) there are less than 3 instructions in the loop; we place 2 of
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these in a row to add up to 2 NOPS in short loops; or (2) the
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instructions in the loop do not include a branch or jump.
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Otherwise they are turned into rs_fills of 0 before relaxation
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begins. This is used to avoid hardware bug PR3830. */
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RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
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/* These are placed after LOOP instructions and turned into NOPs if
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there are less than 12 bytes to the end of some other loop's end.
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Otherwise they are turned into rs_fills of 0 before relaxation
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begins. This is used to avoid hardware bug PR3830. */
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RELAX_DESIRE_ALIGN,
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/* The next fragment would like its first instruction to NOT cross an
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instruction fetch boundary. */
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RELAX_MAYBE_DESIRE_ALIGN,
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/* The next fragment might like its first instruction to NOT cross an
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instruction fetch boundary. These are placed after a branch that
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might be relaxed. If the branch is relaxed, then this frag will be
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a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
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frag. */
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RELAX_LOOP_END,
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/* This will be turned into a NOP or NOP.N if the previous instruction
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is expanded to negate a loop. */
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RELAX_LOOP_END_ADD_NOP,
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/* When the code density option is available, this will generate a
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NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
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fragment with a NOP in it. Once a frag has been converted to
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RELAX_LOOP_END_ADD_NOP, it should never be changed back to
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RELAX_LOOP_END. */
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RELAX_LITERAL,
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/* Another fragment could generate an expansion here but has not yet. */
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RELAX_LITERAL_NR,
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/* Expansion has been generated by an instruction that generates a
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literal. However, the stretch has NOT been reported yet in this
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fragment. */
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RELAX_LITERAL_FINAL,
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/* Expansion has been generated by an instruction that generates a
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literal. */
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RELAX_LITERAL_POOL_BEGIN,
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RELAX_LITERAL_POOL_END,
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/* Technically these are not relaxations at all but mark a location
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to store literals later. Note that fr_var stores the frchain for
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BEGIN frags and fr_var stores now_seg for END frags. */
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RELAX_NARROW,
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/* The last instruction in this fragment (at->fr_opcode) can be
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freely replaced with a single wider instruction if a future
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alignment desires or needs it. */
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RELAX_IMMED,
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/* The last instruction in this fragment (at->fr_opcode) contains
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an immediate or symbol. If the value does not fit, relax the
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opcode using expansions from the relax table. */
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RELAX_IMMED_STEP1,
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/* The last instruction in this fragment (at->fr_opcode) contains a
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literal. It has already been expanded 1 step. */
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RELAX_IMMED_STEP2,
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/* The last instruction in this fragment (at->fr_opcode) contains a
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literal. It has already been expanded 2 steps. */
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RELAX_IMMED_STEP3,
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/* The last instruction in this fragment (at->fr_opcode) contains a
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literal. It has already been expanded 3 steps. */
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RELAX_SLOTS,
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/* There are instructions within the last VLIW instruction that need
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relaxation. Find the relaxation based on the slot info in
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xtensa_frag_type. Relaxations that deal with particular opcodes
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are slot-based (e.g., converting a MOVI to an L32R). Relaxations
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that deal with entire instructions, such as alignment, are not
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slot-based. */
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RELAX_FILL_NOP,
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/* This marks the location of a pipeline stall. We can fill these guys
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in for alignment of any size. */
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RELAX_UNREACHABLE,
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/* This marks the location as unreachable. The assembler may widen or
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narrow this area to meet alignment requirements of nearby
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instructions. */
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RELAX_MAYBE_UNREACHABLE,
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/* This marks the location as possibly unreachable. These are placed
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after a branch that may be relaxed into a branch and jump. If the
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branch is relaxed, then this frag will be converted to a
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RELAX_UNREACHABLE frag. */
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RELAX_ORG,
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/* This marks the location as having previously been an rs_org frag.
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rs_org frags are converted to fill-zero frags immediately after
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relaxation. However, we need to remember where they were so we can
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prevent the linker from changing the size of any frag between the
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section start and the org frag. */
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RELAX_NONE
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};
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/* This is used as a stopper to bound the number of steps that
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can be taken. */
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#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)
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struct xtensa_frag_type
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{
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/* Info about the current state of assembly, e.g., transform,
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absolute_literals, etc. These need to be passed to the backend and
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then to the object file.
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When is_assembly_state_set is false, the frag inherits some of the
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state settings from the previous frag in this segment. Because it
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is not possible to intercept all fragment closures (frag_more and
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frag_append_1_char can close a frag), we use a pass after initial
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assembly to fill in the assembly states. */
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unsigned int is_assembly_state_set : 1;
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unsigned int is_no_density : 1;
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unsigned int is_no_transform : 1;
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unsigned int use_longcalls : 1;
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unsigned int use_absolute_literals : 1;
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/* Inhibits relaxation of machine-dependent alignment frags the
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first time through a relaxation.... */
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unsigned int relax_seen : 1;
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/* Information that is needed in the object file and set when known. */
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unsigned int is_literal : 1;
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unsigned int is_loop_target : 1;
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unsigned int is_branch_target : 1;
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unsigned int is_insn : 1;
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unsigned int is_unreachable : 1;
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unsigned int is_specific_opcode : 1; /* also implies no_transform */
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unsigned int is_align : 1;
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unsigned int is_text_align : 1;
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unsigned int alignment : 5;
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/* A frag with this bit set is the first in a loop that actually
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contains an instruction. */
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unsigned int is_first_loop_insn : 1;
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/* A frag with this bit set is a branch that we are using to
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align branch targets as if it were a normal narrow instruction. */
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unsigned int is_aligning_branch : 1;
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/* For text fragments that can generate literals at relax time, this
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variable points to the frag where the literal will be stored. For
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literal frags, this variable points to the nearest literal pool
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location frag. This literal frag will be moved to after this
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location. For RELAX_LITERAL_POOL_BEGIN frags, this field points
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to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
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frag, to make moving frags for this literal pool efficient. */
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fragS *literal_frag;
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/* The destination segment for literal frags. (Note that this is only
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valid after xtensa_move_literals.) This field is also used for
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LITERAL_POOL_END frags. */
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segT lit_seg;
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/* Frag chain for LITERAL_POOL_BEGIN frags. */
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struct frchain *lit_frchain;
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/* For the relaxation scheme, some literal fragments can have their
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expansions modified by an instruction that relaxes. */
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int text_expansion[MAX_SLOTS];
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int literal_expansion[MAX_SLOTS];
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int unreported_expansion;
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/* For slots that have a free register for relaxation, record that
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register. */
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expressionS free_reg[MAX_SLOTS];
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/* For text fragments that can generate literals at relax time: */
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fragS *literal_frags[MAX_SLOTS];
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enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
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symbolS *slot_symbols[MAX_SLOTS];
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offsetT slot_offsets[MAX_SLOTS];
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/* When marking frags after this one in the chain as no transform,
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cache the last one in the chain, so that we can skip to the
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end of the chain. */
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fragS *no_transform_end;
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};
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/* For VLIW support, we need to know what slot a fixup applies to. */
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typedef struct xtensa_fix_data_struct
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{
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int slot;
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symbolS *X_add_symbol;
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offsetT X_add_number;
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} xtensa_fix_data;
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/* Structure to record xtensa-specific symbol information. */
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typedef struct xtensa_symfield_type
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{
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unsigned int is_loop_target : 1;
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unsigned int is_branch_target : 1;
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symbolS *next_expr_symbol;
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} xtensa_symfield_type;
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/* Structure for saving information about a block of property data
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for frags that have the same flags. The forward reference is
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in this header file. The actual definition is in tc-xtensa.c. */
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struct xtensa_block_info_struct;
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typedef struct xtensa_block_info_struct xtensa_block_info;
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/* Property section types. */
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typedef enum
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{
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xt_literal_sec,
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xt_prop_sec,
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max_xt_sec
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} xt_section_type;
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typedef struct xtensa_segment_info_struct
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{
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fragS *literal_pool_loc;
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xtensa_block_info *blocks[max_xt_sec];
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} xtensa_segment_info;
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extern const char *xtensa_target_format (void);
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extern void xtensa_init_fix_data (struct fix *);
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extern void xtensa_frag_init (fragS *);
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extern int xtensa_force_relocation (struct fix *);
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extern int xtensa_validate_fix_sub (struct fix *);
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extern void xtensa_frob_label (struct symbol *);
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extern void xtensa_end (void);
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extern void xtensa_post_relax_hook (void);
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extern void xtensa_file_arch_init (bfd *);
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extern void xtensa_flush_pending_output (void);
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extern bfd_boolean xtensa_fix_adjustable (struct fix *);
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extern void xtensa_symbol_new_hook (symbolS *);
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extern long xtensa_relax_frag (fragS *, long, int *);
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extern void xtensa_elf_section_change_hook (void);
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extern int xtensa_unrecognized_line (int);
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extern bfd_boolean xtensa_check_inside_bundle (void);
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extern void xtensa_handle_align (fragS *);
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extern char *xtensa_section_rename (char *);
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#define TARGET_FORMAT xtensa_target_format ()
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#define TARGET_ARCH bfd_arch_xtensa
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#define TC_SEGMENT_INFO_TYPE xtensa_segment_info
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#define TC_SYMFIELD_TYPE struct xtensa_symfield_type
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#define TC_FIX_TYPE xtensa_fix_data
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#define TC_INIT_FIX_DATA(x) xtensa_init_fix_data (x)
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#define TC_FRAG_TYPE struct xtensa_frag_type
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#define TC_FRAG_INIT(frag) xtensa_frag_init (frag)
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#define TC_FORCE_RELOCATION(fix) xtensa_force_relocation (fix)
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#define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
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(! SEG_NORMAL (seg) || xtensa_force_relocation (fix))
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#define TC_VALIDATE_FIX_SUB(fix, seg) xtensa_validate_fix_sub (fix)
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#define NO_PSEUDO_DOT xtensa_check_inside_bundle ()
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#define tc_canonicalize_symbol_name(s) xtensa_section_rename (s)
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#define tc_canonicalize_section_name(s) xtensa_section_rename (s)
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#define tc_init_after_args() xtensa_file_arch_init (stdoutput)
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#define tc_fix_adjustable(fix) xtensa_fix_adjustable (fix)
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#define tc_frob_label(sym) xtensa_frob_label (sym)
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#define tc_unrecognized_line(ch) xtensa_unrecognized_line (ch)
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#define tc_symbol_new_hook(sym) xtensa_symbol_new_hook (sym)
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#define md_do_align(a,b,c,d,e) xtensa_flush_pending_output ()
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#define md_elf_section_change_hook xtensa_elf_section_change_hook
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#define md_end xtensa_end
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#define md_flush_pending_output() xtensa_flush_pending_output ()
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#define md_operand(x)
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#define TEXT_SECTION_NAME xtensa_section_rename (".text")
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#define DATA_SECTION_NAME xtensa_section_rename (".data")
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#define BSS_SECTION_NAME xtensa_section_rename (".bss")
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#define HANDLE_ALIGN(fragP) xtensa_handle_align (fragP)
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#define MAX_MEM_FOR_RS_ALIGN_CODE 1
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/* The renumber_section function must be mapped over all the sections
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after calling xtensa_post_relax_hook. That function is static in
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write.c so it cannot be called from xtensa_post_relax_hook itself. */
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#define md_post_relax_hook \
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do \
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{ \
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int i = 0; \
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xtensa_post_relax_hook (); \
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bfd_map_over_sections (stdoutput, renumber_sections, &i); \
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} \
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while (0)
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/* Because xtensa relaxation can insert a new literal into the middle of
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fragment and thus require re-running the relaxation pass on the
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section, we need an explicit flag here. We explicitly use the name
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"stretched" here to avoid changing the source code in write.c. */
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#define md_relax_frag(segment, fragP, stretch) \
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xtensa_relax_frag (fragP, stretch, &stretched)
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/* Only allow call frame debug info optimization when linker relaxation is
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not enabled as otherwise we could generate the DWARF directives without
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the relocs necessary to patch them up. */
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#define md_allow_eh_opt (linkrelax == 0)
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#define LOCAL_LABELS_FB 1
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#define WORKING_DOT_WORD 1
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#define DOUBLESLASH_LINE_COMMENTS
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#define TC_HANDLES_FX_DONE
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#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
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#define TC_LINKRELAX_FIXUP(SEG) 0
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#define MD_APPLY_SYM_VALUE(FIX) 0
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#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
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/* Use line number format that is amenable to linker relaxation. */
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#define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)
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/* Resource reservation info functions. */
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/* Returns the number of copies of a particular unit. */
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typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);
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/* Returns the number of units the opcode uses. */
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typedef int (*opcode_num_units_func) (void *, xtensa_opcode);
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/* Given an opcode and an index into the opcode's funcUnit list,
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returns the unit used for the index. */
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typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);
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/* Given an opcode and an index into the opcode's funcUnit list,
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returns the cycle during which the unit is used. */
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typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);
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/* The above typedefs parameterize the resource_table so that the
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optional scheduler doesn't need its own resource reservation system.
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For simple resource checking, which is all that happens normally,
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the functions will be as follows (with some wrapping to make the
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interface more convenient):
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unit_num_copies_func = xtensa_funcUnit_num_copies
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opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
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opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
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opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
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Of course the optional scheduler has its own reservation table
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and functions. */
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int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
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int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
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typedef struct
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{
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void *data;
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int cycles;
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int allocated_cycles;
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int num_units;
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unit_num_copies_func unit_num_copies;
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opcode_num_units_func opcode_num_units;
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opcode_funcUnit_use_unit_func opcode_unit_use;
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opcode_funcUnit_use_stage_func opcode_unit_stage;
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unsigned char **units;
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} resource_table;
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resource_table *new_resource_table
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(void *, int, int, unit_num_copies_func, opcode_num_units_func,
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opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
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void resize_resource_table (resource_table *, int);
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void clear_resource_table (resource_table *);
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bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
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void reserve_resources (resource_table *, xtensa_opcode, int);
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void release_resources (resource_table *, xtensa_opcode, int);
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#endif /* TC_XTENSA */
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