Mike Frysinger fa8f87e53b sim: trace: add a basic cpu register class ... The bfin/msp430 ports already had trace logic set up for reading/writing cpu registers, albeit using different unrelated levels (core & vpu). Add a proper register class for these and for other ports.		2015-06-24 10:40:17 -04:00
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ChangeLog	sim: trace: add a basic cpu register class	2015-06-24 10:40:17 -04:00
Makefile.in	sim: unify sim-cpu usage	2015-04-15 02:19:52 -04:00
aclocal.m4	sim: msp430: use common warnings options	2015-03-14 07:28:26 -04:00
config.in	sim: update zlib handling	2015-04-01 01:07:57 -04:00
configure	sim: use AS_HELP_STRING everywhere	2015-06-23 15:02:08 -04:00
configure.ac	sim: msp430: use common warnings options	2015-03-14 07:28:26 -04:00
msp430-sim.c	sim: trace: add a basic cpu register class	2015-06-24 10:40:17 -04:00
msp430-sim.h	Update year range in copyright notice of all files owned by the GDB project.	2015-01-01 13:32:14 +04:00
sim-main.h	sim: msp430: delete unused trace macros	2015-06-11 12:52:20 -04:00
trace.c	sim: msp430: use common warnings options	2015-03-14 07:28:26 -04:00
trace.h	sim: msp430: use common warnings options	2015-03-14 07:28:26 -04:00